settings_defines.h
/* Teensy 4, 3.x, LC ADC library
* https://github.com/pedvide/ADC
* Copyright (c) 2019 Pedro Villanueva
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef ADC_SETTINGS_H
#define ADC_SETTINGS_H
#include <Arduino.h>
namespace ADC_settings {
// Easier names for the boards
#if defined(__MK20DX256__) // Teensy 3.1/3.2
#define ADC_TEENSY_3_1
#elif defined(__MK20DX128__) // Teensy 3.0
#define ADC_TEENSY_3_0
#elif defined(__MKL26Z64__) // Teensy LC
#define ADC_TEENSY_LC
#elif defined(__MK64FX512__) // Teensy 3.5
#define ADC_TEENSY_3_5
#elif defined(__MK66FX1M0__) // Teensy 3.6
#define ADC_TEENSY_3_6
#elif defined(__IMXRT1062__) // Teensy 4.0
#define ADC_TEENSY_4
#else
#error "Board not supported!"
#endif
// Teensy 3.1 has 2 ADCs, Teensy 3.0 and LC only 1.
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_NUM_ADCS (2)
#define ADC_DUAL_ADCS
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_NUM_ADCS (1)
#define ADC_SINGLE_ADC
#elif defined(ADC_TEENSY_LC) // Teensy LC
#define ADC_NUM_ADCS (1)
#define ADC_SINGLE_ADC
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_NUM_ADCS (2)
#define ADC_DUAL_ADCS
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_NUM_ADCS (2)
#define ADC_DUAL_ADCS
#elif defined(ADC_TEENSY_4) // Teensy 3.6
#define ADC_NUM_ADCS (2)
#define ADC_DUAL_ADCS
#endif
// Use DMA?
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_USE_DMA
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_USE_DMA
#elif defined(ADC_TEENSY_LC) // Teensy LC
#define ADC_USE_DMA
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_USE_DMA
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_USE_DMA
#elif defined(ADC_TEENSY_4) // Teensy 4.0
#define ADC_USE_DMA
#endif
// Use PGA?
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_USE_PGA
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#elif defined(ADC_TEENSY_LC) // Teensy LC
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#elif defined(ADC_TEENSY_4) // Teensy 4
#endif
// Use PDB?
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_USE_PDB
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_USE_PDB
#elif defined(ADC_TEENSY_LC) // Teensy LC
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_USE_PDB
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_USE_PDB
#elif defined(ADC_TEENSY_4) // Teensy 4
#endif
// Use Quad Timer
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_USE_QUAD_TIMER // TODO: Not implemented
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_USE_QUAD_TIMER // TODO: Not implemented
#elif defined(ADC_TEENSY_LC) // Teensy LC
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_USE_QUAD_TIMER // TODO: Not implemented
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_USE_QUAD_TIMER // TODO: Not implemented
#elif defined(ADC_TEENSY_4) // Teensy 4
#define ADC_USE_QUAD_TIMER
#endif
// Has internal reference?
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_USE_INTERNAL_VREF
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_USE_INTERNAL_VREF
#elif defined(ADC_TEENSY_LC) // Teensy LC
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_USE_INTERNAL_VREF
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_USE_INTERNAL_VREF
#elif defined(ADC_TEENSY_4) // Teensy 4
#endif
enum class ADC_REF_SOURCE : uint8_t {REF_DEFAULT = 0, REF_ALT = 1, REF_NONE = 2}; // internal, do not use
#if defined(ADC_TEENSY_3_0) || defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_5) || defined(ADC_TEENSY_3_6)
// default is the external, that is connected to the 3.3V supply.
// To use the external simply connect AREF to a different voltage
// alt is connected to the 1.2 V ref.
enum class ADC_REFERENCE : uint8_t {
REF_3V3 = static_cast<uint8_t>(ADC_REF_SOURCE::REF_DEFAULT),
REF_1V2 = static_cast<uint8_t>(ADC_REF_SOURCE::REF_ALT),
REF_EXT = static_cast<uint8_t>(ADC_REF_SOURCE::REF_DEFAULT),
NONE = static_cast<uint8_t>(ADC_REF_SOURCE::REF_NONE) // internal, do not use
};
#elif defined(ADC_TEENSY_LC)
// alt is the internal ref, 3.3 V
// the default is AREF
enum class ADC_REFERENCE : uint8_t {
REF_3V3 = static_cast<uint8_t>(ADC_REF_SOURCE::REF_ALT),
REF_EXT = static_cast<uint8_t>(ADC_REF_SOURCE::REF_DEFAULT),
NONE = static_cast<uint8_t>(ADC_REF_SOURCE::REF_NONE) // internal, do not use
};
#elif defined(ADC_TEENSY_4)
// default is the external, that is connected to the 3.3V supply.
enum class ADC_REFERENCE : uint8_t {
REF_3V3 = static_cast<uint8_t>(ADC_REF_SOURCE::REF_DEFAULT),
NONE = static_cast<uint8_t>(ADC_REF_SOURCE::REF_NONE) // internal, do not use
};
#endif
// max number of pins, size of channel2sc1aADCx
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_MAX_PIN (43)
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_MAX_PIN (43)
#elif defined(ADC_TEENSY_LC) // Teensy LC
#define ADC_MAX_PIN (43)
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_MAX_PIN (69)
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_MAX_PIN (67)
#elif defined(ADC_TEENSY_4) // Teensy 4
#define ADC_MAX_PIN (27)
#endif
// number of differential pairs PER ADC!
#if defined(ADC_TEENSY_3_1) // Teensy 3.1
#define ADC_DIFF_PAIRS (2) // normal and with PGA
#elif defined(ADC_TEENSY_3_0) // Teensy 3.0
#define ADC_DIFF_PAIRS (2)
#elif defined(ADC_TEENSY_LC) // Teensy LC
#define ADC_DIFF_PAIRS (1)
#elif defined(ADC_TEENSY_3_5) // Teensy 3.5
#define ADC_DIFF_PAIRS (1)
#elif defined(ADC_TEENSY_3_6) // Teensy 3.6
#define ADC_DIFF_PAIRS (1)
#elif defined(ADC_TEENSY_4) // Teensy 4
#define ADC_DIFF_PAIRS (0)
#endif
// Other things to measure with the ADC that don't use external pins
// In my Teensy I read 1.22 V for the ADC_VREF_OUT (see VREF.h), 1.0V for ADC_BANDGAP (after PMC_REGSC |= PMC_REGSC_BGBE),
// 3.3 V for ADC_VREFH and 0.0 V for ADC_VREFL.
#if defined(ADC_TEENSY_LC)
enum class ADC_INTERNAL_SOURCE : uint8_t{
TEMP_SENSOR = 38, // 0.719 V at 25ºC and slope of 1.715 mV/ºC for Teensy 3.x and 0.716 V, 1.62 mV/ºC for Teensy LC
BANDGAP = 41, // Enable the Bandgap with PMC_REGSC |= PMC_REGSC_BGBE; (see VREF.h)
VREFH = 42,
VREFL = 43,
};
#elif defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_0)
enum class ADC_INTERNAL_SOURCE : uint8_t{
TEMP_SENSOR = 38, // 0.719 V at 25ºC and slope of 1.715 mV/ºC for Teensy 3.x and 0.716 V, 1.62 mV/ºC for Teensy LC
VREF_OUT = 39,
BANDGAP = 41, // Enable the Bandgap with PMC_REGSC |= PMC_REGSC_BGBE; (see VREF.h)
VREFH = 42,
VREFL = 43,
};
#elif defined(ADC_TEENSY_3_5) || defined(ADC_TEENSY_3_6)
enum class ADC_INTERNAL_SOURCE : uint8_t{
TEMP_SENSOR = 24, // 0.719 V at 25ºC and slope of 1.715 mV/ºC for Teensy 3.x and 0.716 V, 1.62 mV/ºC for Teensy LC
VREF_OUT = 28, // only on ADC1
BANDGAP = 25, // Enable the Bandgap with PMC_REGSC |= PMC_REGSC_BGBE; (see VREF::start in VREF.h)
VREFH = 26,
VREFL = 27,
};
#elif defined(ADC_TEENSY_4)
enum class ADC_INTERNAL_SOURCE : uint8_t{
VREFSH = 25,
};
#endif
#if defined(ADC_TEENSY_4)
typedef struct {
volatile uint32_t HC0;
volatile uint32_t HC1;
volatile uint32_t HC2;
volatile uint32_t HC3;
volatile uint32_t HC4;
volatile uint32_t HC5;
volatile uint32_t HC6;
volatile uint32_t HC7;
volatile uint32_t HS;
volatile uint32_t R0;
volatile uint32_t R1;
volatile uint32_t R2;
volatile uint32_t R3;
volatile uint32_t R4;
volatile uint32_t R5;
volatile uint32_t R6;
volatile uint32_t R7;
volatile uint32_t CFG;
volatile uint32_t GC;
volatile uint32_t GS;
volatile uint32_t CV;
volatile uint32_t OFS;
volatile uint32_t CAL;
} ADC_REGS_t;
#define ADC0_START (*(ADC_REGS_t *)0x400C4000)
#define ADC1_START (*(ADC_REGS_t *)0x400C8000)
#else
typedef struct {
volatile uint32_t SC1A;
volatile uint32_t SC1B;
volatile uint32_t CFG1;
volatile uint32_t CFG2;
volatile uint32_t RA;
volatile uint32_t RB;
volatile uint32_t CV1;
volatile uint32_t CV2;
volatile uint32_t SC2;
volatile uint32_t SC3;
volatile uint32_t OFS;
volatile uint32_t PG;
volatile uint32_t MG;
volatile uint32_t CLPD;
volatile uint32_t CLPS;
volatile uint32_t CLP4;
volatile uint32_t CLP3;
volatile uint32_t CLP2;
volatile uint32_t CLP1;
volatile uint32_t CLP0;
volatile uint32_t PGA;
volatile uint32_t CLMD;
volatile uint32_t CLMS;
volatile uint32_t CLM4;
volatile uint32_t CLM3;
volatile uint32_t CLM2;
volatile uint32_t CLM1;
volatile uint32_t CLM0;
} ADC_REGS_t;
#define ADC0_START (*(ADC_REGS_t *)0x4003B000)
#define ADC1_START (*(ADC_REGS_t *)0x400BB000)
#endif
/* MK20DX256 Datasheet:
The 16-bit accuracy specifications listed in Table 24 and Table 25 are achievable on the
differential pins ADCx_DP0, ADCx_DM0
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
The results in this data sheet were derived from a system which has < 8 Ohm analog source resistance. The RAS/CAS
time constant should be kept to < 1ns.
ADC clock should be 2 to 12 MHz for 16 bit mode
ADC clock should be 1 to 18 MHz for 8-12 bit mode, and 1-24 MHz for Teensy 3.6 (NOT 3.5)
To use the maximum ADC conversion clock frequency, the ADHSC bit must be set and the ADLPC bit must be clear
The ADHSC bit is used to configure a higher clock input frequency. This will allow
faster overall conversion times. To meet internal ADC timing requirements, the ADHSC
bit adds additional ADCK cycles. Conversions with ADHSC = 1 take two more ADCK
cycles. ADHSC should be used when the ADCLK exceeds the limit for ADHSC = 0.
*/
// the alternate clock is connected to OSCERCLK (16 MHz).
// datasheet says ADC clock should be 2 to 12 MHz for 16 bit mode
// datasheet says ADC clock should be 1 to 18 MHz for 8-12 bit mode, and 1-24 MHz for Teensy 3.6 (NOT 3.5)
// calibration works best when averages are 32 and speed is less than 4 MHz
// ADC_CFG1_ADICLK: 0=bus, 1=bus/2, 2=(alternative clk) altclk, 3=(async. clk) adack
// See below for an explanation of VERY_LOW_SPEED, LOW_SPEED, etc.
#define ADC_MHz (1000000) // not so many zeros
// Min freq for 8-12 bit mode is 1 MHz, 4 MHz for Teensy 4
#if defined(ADC_TEENSY_4)
#define ADC_MIN_FREQ (4*ADC_MHz)
#else
#define ADC_MIN_FREQ (1*ADC_MHz)
#endif
// Max freq for 8-12 bit mode is 18 MHz, 24 MHz for Teensy 3.6, and 40 for Teensy 4
#if defined(ADC_TEENSY_3_6)
#define ADC_MAX_FREQ (24*ADC_MHz)
#elif defined(ADC_TEENSY_4)
#define ADC_MAX_FREQ (40*ADC_MHz)
#else
#define ADC_MAX_FREQ (18*ADC_MHz)
#endif
// Min and max for 16 bits. For Teensy 4 is the same as before (no 16 bit mode)
#if defined(ADC_TEENSY_4)
#define ADC_MIN_FREQ_16BITS ADC_MIN_FREQ
#define ADC_MAX_FREQ_16BITS ADC_MAX_FREQ
#else
// Min freq for 16 bit mode is 2 MHz
#define ADC_MIN_FREQ_16BITS (2*ADC_MHz)
// Max freq for 16 bit mode is 12 MHz
#define ADC_MAX_FREQ_16BITS (12*ADC_MHz)
#endif
// We can divide F_BUS by 1, 2, 4, 8, or 16:
/*
Divide by ADC_CFG1_ADIV ADC_CFG1_ADICLK TOTAL VALUE
1 0 0 0 0x00
2 1 0 1 0x20
4 2 0 2 0x40
8 3 0 3 0x60
16 3 1 4 0x61
(Other combinations are possible)
*/
// Redefine from kinetis.h to remove (uint32_t) casts that the preprocessor doesn't understand
// so we can do arithmetic with them when defining ADC_CFG1_MED_SPEED
#define ADC_LIB_CFG1_ADIV(n) (((n) & 0x03) << 5)
#define ADC_LIB_CFG1_ADICLK(n) (((n) & 0x03) << 0)
#if defined(ADC_TEENSY_4)
#define ADC_F_BUS F_BUS_ACTUAL // (150*ADC_MHz)
#else
#define ADC_F_BUS F_BUS
#endif
constexpr uint32_t get_CFG_VERY_LOW_SPEED(uint32_t f_adc_clock) {
if (f_adc_clock/16 >= ADC_MIN_FREQ) {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
} else if (f_adc_clock/8 >= ADC_MIN_FREQ){
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/4 >= ADC_MIN_FREQ) {
return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/2 >= ADC_MIN_FREQ) {
return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
} else {
return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
}
}
constexpr uint32_t get_CFG_LOW_SPEED(uint32_t f_adc_clock) {
if (f_adc_clock/16 >= ADC_MIN_FREQ_16BITS) {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
} else if (f_adc_clock/8 >= ADC_MIN_FREQ_16BITS){
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/4 >= ADC_MIN_FREQ_16BITS) {
return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/2 >= ADC_MIN_FREQ_16BITS) {
return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
} else {
return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
}
}
constexpr uint32_t get_CFG_HI_SPEED_16_BITS(uint32_t f_adc_clock) {
if (f_adc_clock <= ADC_MAX_FREQ_16BITS) {
return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/2 <= ADC_MAX_FREQ_16BITS){
return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/4 <= ADC_MAX_FREQ_16BITS) {
return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/8 <= ADC_MAX_FREQ_16BITS) {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
} else {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
}
}
// ADC_CFG1_LOW_SPEED and ADC_CFG1_HI_SPEED_16_BITS @internal
constexpr uint32_t get_CFG_MEDIUM_SPEED(uint32_t f_adc_clock) {
uint32_t ADC_CFG1_LOW_SPEED = get_CFG_LOW_SPEED(f_adc_clock);
uint32_t ADC_CFG1_HI_SPEED_16_BITS = get_CFG_HI_SPEED_16_BITS(f_adc_clock);
if (ADC_CFG1_LOW_SPEED - ADC_CFG1_HI_SPEED_16_BITS > 0x20) {
return ADC_CFG1_HI_SPEED_16_BITS + 0x20;
} else {
return ADC_CFG1_HI_SPEED_16_BITS;
}
}
constexpr uint32_t get_CFG_HIGH_SPEED(uint32_t f_adc_clock) {
if (f_adc_clock <= ADC_MAX_FREQ) {
return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/2 <= ADC_MAX_FREQ){
return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/4 <= ADC_MAX_FREQ) {
return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/8 <= ADC_MAX_FREQ) {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
} else {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
}
}
// but not more than ADC_VERY_HIGH_SPEED_FACTOR*ADC_MAX_FREQ
constexpr uint32_t get_CFG_VERY_HIGH_SPEED(uint32_t f_adc_clock) {
const uint8_t speed_factor = 2;
if (f_adc_clock <= speed_factor*ADC_MAX_FREQ) {
return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/2 <= speed_factor*ADC_MAX_FREQ){
return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/4 <= speed_factor*ADC_MAX_FREQ) {
return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
} else if (f_adc_clock/8 <= speed_factor*ADC_MAX_FREQ) {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
} else {
return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
}
}
// Settings for the power/speed of conversions/sampling
enum class ADC_CONVERSION_SPEED : uint8_t {
#if defined(ADC_TEENSY_4)
VERY_LOW_SPEED, /* Same as LOW_SPEED, here for compatibility*/
LOW_SPEED = VERY_LOW_SPEED,
MED_SPEED,
HIGH_SPEED,
VERY_HIGH_SPEED = HIGH_SPEED, /* Same as HIGH_SPEED, here for compatibility*/
ADACK_10,
ADACK_20
#else
VERY_LOW_SPEED,
LOW_SPEED,
MED_SPEED,
HIGH_SPEED_16BITS,
HIGH_SPEED,
VERY_HIGH_SPEED,
ADACK_2_4,
ADACK_4_0,
ADACK_5_2,
ADACK_6_2
#endif
};
enum class ADC_SAMPLING_SPEED : uint8_t {
#if defined(ADC_TEENSY_4)
VERY_LOW_SPEED,
LOW_SPEED,
LOW_MED_SPEED,
MED_SPEED,
MED_HIGH_SPEED,
HIGH_SPEED,
HIGH_VERY_HIGH_SPEED,
VERY_HIGH_SPEED,
#else
VERY_LOW_SPEED,
LOW_SPEED,
MED_SPEED,
HIGH_SPEED,
VERY_HIGH_SPEED,
#endif
};
// Mask for the channel selection in ADCx_SC1A,
// useful if you want to get the channel number from ADCx_SC1A
#define ADC_SC1A_CHANNELS (0x1F)
// 0x1F=31 in the channel2sc1aADCx means the pin doesn't belong to the ADC module
#define ADC_SC1A_PIN_INVALID (0x1F)
// Muxsel mask, pins in channel2sc1aADCx with bit 7 set use mux A.
#define ADC_SC1A_PIN_MUX (0x80)
// Differential pin mask, pins in channel2sc1aADCx with bit 6 set are differential pins.
#define ADC_SC1A_PIN_DIFF (0x40)
// PGA mask. The pins can use PGA on that ADC
#define ADC_SC1A_PIN_PGA (0x80)
// Error codes for analogRead and analogReadDifferential
#define ADC_ERROR_DIFF_VALUE (-70000)
#define ADC_ERROR_VALUE ADC_ERROR_DIFF_VALUE
} // namespace settings
namespace ADC_Error {
enum class ADC_ERROR : uint16_t {
OTHER = 1<<0,
CALIB = 1<<1,
WRONG_PIN = 1<<2,
ANALOG_READ = 1<<3,
ANALOG_DIFF_READ = 1<<4,
CONT = 1<<5,
CONT_DIFF = 1<<6,
COMPARISON = 1<<7,
WRONG_ADC = 1<<8,
SYNCH = 1<<9,
CLEAR = 0,
};
inline constexpr ADC_ERROR operator|(ADC_ERROR lhs, ADC_ERROR rhs) {
return static_cast< ADC_ERROR > (static_cast<uint16_t>(lhs) | static_cast<uint16_t>(rhs));
}
inline constexpr ADC_ERROR operator&(ADC_ERROR lhs, ADC_ERROR rhs) {
return static_cast< ADC_ERROR > (static_cast<uint16_t>(lhs) & static_cast<uint16_t>(rhs));
}
inline ADC_ERROR operator|=(volatile ADC_ERROR& lhs, ADC_ERROR rhs) {
return lhs = static_cast< ADC_ERROR > (static_cast<uint16_t>(lhs) | static_cast<uint16_t>(rhs));
}
inline ADC_ERROR operator&=(volatile ADC_ERROR& lhs, ADC_ERROR rhs) {
return lhs = static_cast< ADC_ERROR > (static_cast<uint16_t>(lhs) & static_cast<uint16_t>(rhs));
}
// Prints the human-readable error, if any.
// Moved to util.h.
// inline const char* getError(ADC_ERROR fail_flag)
inline void resetError(volatile ADC_ERROR& fail_flag) {
fail_flag = ADC_ERROR::CLEAR;
}
}
#endif // ADC_SETTINGS_H
ADC_settings::ADC_INTERNAL_SOURCE::VREFH
@ VREFH
ADC_settings::ADC_CONVERSION_SPEED::ADACK_5_2
@ ADACK_5_2
ADC_settings::ADC_INTERNAL_SOURCE::BANDGAP
@ BANDGAP
ADC_settings::ADC_INTERNAL_SOURCE::VREFL
@ VREFL
ADC_settings::ADC_INTERNAL_SOURCE::VREF_OUT
@ VREF_OUT
ADC_settings::ADC_INTERNAL_SOURCE::TEMP_SENSOR
@ TEMP_SENSOR
ADC_settings::ADC_CONVERSION_SPEED::ADACK_4_0
@ ADACK_4_0
ADC_Error::ADC_ERROR::CLEAR
@ CLEAR
ADC_settings::ADC_CONVERSION_SPEED::ADACK_2_4
@ ADACK_2_4
ADC_settings::ADC_CONVERSION_SPEED::LOW_SPEED
@ LOW_SPEED
ADC_settings
Board-dependent settings.
Definition: settings_defines.h:37
ADC_settings::ADC_REFERENCE::REF_3V3
@ REF_3V3
ADC_settings::ADC_SAMPLING_SPEED::VERY_HIGH_SPEED
@ VERY_HIGH_SPEED
ADC_settings::ADC_SAMPLING_SPEED::MED_SPEED
@ MED_SPEED
ADC_Error::ADC_ERROR::WRONG_ADC
@ WRONG_ADC
ADC_settings::ADC_CONVERSION_SPEED::VERY_LOW_SPEED
@ VERY_LOW_SPEED
ADC_Error::ADC_ERROR::COMPARISON
@ COMPARISON
ADC_settings::ADC_REFERENCE::REF_1V2
@ REF_1V2
ADC_settings::ADC_SAMPLING_SPEED
ADC_SAMPLING_SPEED
Definition: settings_defines.h:514
ADC_settings::ADC_CONVERSION_SPEED::VERY_HIGH_SPEED
@ VERY_HIGH_SPEED
ADC_settings::ADC_CONVERSION_SPEED::ADACK_6_2
@ ADACK_6_2
ADC_Error::ADC_ERROR::CONT_DIFF
@ CONT_DIFF
ADC_settings::ADC_INTERNAL_SOURCE
ADC_INTERNAL_SOURCE
Definition: settings_defines.h:231
ADC_settings::ADC_CONVERSION_SPEED::HIGH_SPEED
@ HIGH_SPEED
ADC_settings::ADC_CONVERSION_SPEED::MED_SPEED
@ MED_SPEED
ADC_settings::ADC_REFERENCE::REF_EXT
@ REF_EXT
ADC_Error::ADC_ERROR
ADC_ERROR
ADC errors.
Definition: settings_defines.h:566
ADC_Error::ADC_ERROR::SYNCH
@ SYNCH
ADC_settings::ADC_SAMPLING_SPEED::VERY_LOW_SPEED
@ VERY_LOW_SPEED
ADC_settings::ADC_SAMPLING_SPEED::LOW_SPEED
@ LOW_SPEED
ADC_Error
Handle ADC errors.
Definition: settings_defines.h:559
ADC_Error::ADC_ERROR::CALIB
@ CALIB
ADC_settings::ADC_SAMPLING_SPEED::HIGH_SPEED
@ HIGH_SPEED
ADC_settings::ADC_REFERENCE
ADC_REFERENCE
Voltage reference for the ADC.
Definition: settings_defines.h:151
ADC_Error::ADC_ERROR::ANALOG_READ
@ ANALOG_READ
ADC_Error::ADC_ERROR::CONT
@ CONT
ADC_Error::ADC_ERROR::OTHER
@ OTHER
ADC_Error::ADC_ERROR::WRONG_PIN
@ WRONG_PIN
ADC_settings::ADC_CONVERSION_SPEED::HIGH_SPEED_16BITS
@ HIGH_SPEED_16BITS
ADC_settings::ADC_CONVERSION_SPEED
ADC_CONVERSION_SPEED
Definition: settings_defines.h:487
ADC_Error::ADC_ERROR::ANALOG_DIFF_READ
@ ANALOG_DIFF_READ