31 #ifndef ADC_SETTINGS_H
32 #define ADC_SETTINGS_H
40 #if defined(__MK20DX256__) // Teensy 3.1/3.2
41 #define ADC_TEENSY_3_1
42 #elif defined(__MK20DX128__) // Teensy 3.0
43 #define ADC_TEENSY_3_0
44 #elif defined(__MKL26Z64__) // Teensy LC
46 #elif defined(__MK64FX512__) // Teensy 3.5
47 #define ADC_TEENSY_3_5
48 #elif defined(__MK66FX1M0__) // Teensy 3.6
49 #define ADC_TEENSY_3_6
50 #elif defined(__IMXRT1062__) // Teensy 4.0
53 #error "Board not supported!"
57 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
58 #define ADC_NUM_ADCS (2)
60 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
61 #define ADC_NUM_ADCS (1)
62 #define ADC_SINGLE_ADC
63 #elif defined(ADC_TEENSY_LC) // Teensy LC
64 #define ADC_NUM_ADCS (1)
65 #define ADC_SINGLE_ADC
66 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
67 #define ADC_NUM_ADCS (2)
69 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
70 #define ADC_NUM_ADCS (2)
72 #elif defined(ADC_TEENSY_4) // Teensy 3.6
73 #define ADC_NUM_ADCS (2)
78 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
80 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
82 #elif defined(ADC_TEENSY_LC) // Teensy LC
84 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
86 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
88 #elif defined(ADC_TEENSY_4) // Teensy 4.0
93 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
95 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
96 #elif defined(ADC_TEENSY_LC) // Teensy LC
97 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
98 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
99 #elif defined(ADC_TEENSY_4) // Teensy 4
103 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
105 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
107 #elif defined(ADC_TEENSY_LC) // Teensy LC
108 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
110 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
112 #elif defined(ADC_TEENSY_4) // Teensy 4
116 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
117 #define ADC_USE_QUAD_TIMER // TODO: Not implemented
118 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
119 #define ADC_USE_QUAD_TIMER // TODO: Not implemented
120 #elif defined(ADC_TEENSY_LC) // Teensy LC
121 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
122 #define ADC_USE_QUAD_TIMER // TODO: Not implemented
123 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
124 #define ADC_USE_QUAD_TIMER // TODO: Not implemented
125 #elif defined(ADC_TEENSY_4) // Teensy 4
126 #define ADC_USE_QUAD_TIMER
130 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
131 #define ADC_USE_INTERNAL_VREF
132 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
133 #define ADC_USE_INTERNAL_VREF
134 #elif defined(ADC_TEENSY_LC) // Teensy LC
135 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
136 #define ADC_USE_INTERNAL_VREF
137 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
138 #define ADC_USE_INTERNAL_VREF
139 #elif defined(ADC_TEENSY_4) // Teensy 4
144 enum class ADC_REF_SOURCE : uint8_t {REF_DEFAULT = 0, REF_ALT = 1, REF_NONE = 2};
146 #if defined(ADC_TEENSY_3_0) || defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_5) || defined(ADC_TEENSY_3_6)
152 REF_3V3 =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_DEFAULT),
153 REF_1V2 =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_ALT),
154 REF_EXT =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_DEFAULT),
155 NONE =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_NONE)
157 #elif defined(ADC_TEENSY_LC)
162 REF_3V3 =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_ALT),
163 REF_EXT =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_DEFAULT),
164 NONE =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_NONE)
166 #elif defined(ADC_TEENSY_4)
170 REF_3V3 =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_DEFAULT),
171 NONE =
static_cast<uint8_t
>(ADC_REF_SOURCE::REF_NONE)
176 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
177 #define ADC_MAX_PIN (43)
178 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
179 #define ADC_MAX_PIN (43)
180 #elif defined(ADC_TEENSY_LC) // Teensy LC
181 #define ADC_MAX_PIN (43)
182 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
183 #define ADC_MAX_PIN (69)
184 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
185 #define ADC_MAX_PIN (67)
186 #elif defined(ADC_TEENSY_4) // Teensy 4
187 #define ADC_MAX_PIN (27)
191 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
192 #define ADC_DIFF_PAIRS (2) // normal and with PGA
193 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
194 #define ADC_DIFF_PAIRS (2)
195 #elif defined(ADC_TEENSY_LC) // Teensy LC
196 #define ADC_DIFF_PAIRS (1)
197 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5
198 #define ADC_DIFF_PAIRS (1)
199 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6
200 #define ADC_DIFF_PAIRS (1)
201 #elif defined(ADC_TEENSY_4) // Teensy 4
202 #define ADC_DIFF_PAIRS (0)
209 #if defined(ADC_TEENSY_LC)
218 #elif defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_0)
228 #elif defined(ADC_TEENSY_3_5) || defined(ADC_TEENSY_3_6)
238 #elif defined(ADC_TEENSY_4)
248 #if defined(ADC_TEENSY_4)
250 volatile uint32_t HC0;
251 volatile uint32_t HC1;
252 volatile uint32_t HC2;
253 volatile uint32_t HC3;
254 volatile uint32_t HC4;
255 volatile uint32_t HC5;
256 volatile uint32_t HC6;
257 volatile uint32_t HC7;
258 volatile uint32_t HS;
259 volatile uint32_t R0;
260 volatile uint32_t R1;
261 volatile uint32_t R2;
262 volatile uint32_t R3;
263 volatile uint32_t R4;
264 volatile uint32_t R5;
265 volatile uint32_t R6;
266 volatile uint32_t R7;
267 volatile uint32_t CFG;
268 volatile uint32_t GC;
269 volatile uint32_t GS;
270 volatile uint32_t CV;
271 volatile uint32_t OFS;
272 volatile uint32_t CAL;
274 #define ADC0_START (*(ADC_REGS_t *)0x400C4000)
275 #define ADC1_START (*(ADC_REGS_t *)0x400C8000)
278 volatile uint32_t SC1A;
279 volatile uint32_t SC1B;
280 volatile uint32_t CFG1;
281 volatile uint32_t CFG2;
282 volatile uint32_t RA;
283 volatile uint32_t RB;
284 volatile uint32_t CV1;
285 volatile uint32_t CV2;
286 volatile uint32_t SC2;
287 volatile uint32_t SC3;
288 volatile uint32_t OFS;
289 volatile uint32_t PG;
290 volatile uint32_t MG;
291 volatile uint32_t CLPD;
292 volatile uint32_t CLPS;
293 volatile uint32_t CLP4;
294 volatile uint32_t CLP3;
295 volatile uint32_t CLP2;
296 volatile uint32_t CLP1;
297 volatile uint32_t CLP0;
298 volatile uint32_t PGA;
299 volatile uint32_t CLMD;
300 volatile uint32_t CLMS;
301 volatile uint32_t CLM4;
302 volatile uint32_t CLM3;
303 volatile uint32_t CLM2;
304 volatile uint32_t CLM1;
305 volatile uint32_t CLM0;
307 #define ADC0_START (*(ADC_REGS_t *)0x4003B000)
308 #define ADC1_START (*(ADC_REGS_t *)0x400BB000)
339 #define ADC_MHz (1000000) // not so many zeros
341 #if defined(ADC_TEENSY_4)
342 #define ADC_MIN_FREQ (4*ADC_MHz)
344 #define ADC_MIN_FREQ (1*ADC_MHz)
347 #if defined(ADC_TEENSY_3_6)
348 #define ADC_MAX_FREQ (24*ADC_MHz)
349 #elif defined(ADC_TEENSY_4)
350 #define ADC_MAX_FREQ (40*ADC_MHz)
352 #define ADC_MAX_FREQ (18*ADC_MHz)
356 #if defined(ADC_TEENSY_4)
357 #define ADC_MIN_FREQ_16BITS ADC_MIN_FREQ
358 #define ADC_MAX_FREQ_16BITS ADC_MAX_FREQ
361 #define ADC_MIN_FREQ_16BITS (2*ADC_MHz)
363 #define ADC_MAX_FREQ_16BITS (12*ADC_MHz)
379 #define ADC_LIB_CFG1_ADIV(n) (((n) & 0x03) << 5)
380 #define ADC_LIB_CFG1_ADICLK(n) (((n) & 0x03) << 0)
382 #if defined(ADC_TEENSY_4)
383 #define ADC_F_BUS F_BUS_ACTUAL // (150*ADC_MHz)
385 #define ADC_F_BUS F_BUS
390 constexpr uint32_t get_CFG_VERY_LOW_SPEED(uint32_t f_adc_clock) {
391 if (f_adc_clock/16 >= ADC_MIN_FREQ) {
392 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
393 }
else if (f_adc_clock/8 >= ADC_MIN_FREQ){
394 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
395 }
else if (f_adc_clock/4 >= ADC_MIN_FREQ) {
396 return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
397 }
else if (f_adc_clock/2 >= ADC_MIN_FREQ) {
398 return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
400 return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
405 constexpr uint32_t get_CFG_LOW_SPEED(uint32_t f_adc_clock) {
406 if (f_adc_clock/16 >= ADC_MIN_FREQ_16BITS) {
407 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
408 }
else if (f_adc_clock/8 >= ADC_MIN_FREQ_16BITS){
409 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
410 }
else if (f_adc_clock/4 >= ADC_MIN_FREQ_16BITS) {
411 return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
412 }
else if (f_adc_clock/2 >= ADC_MIN_FREQ_16BITS) {
413 return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
415 return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
420 constexpr uint32_t get_CFG_HI_SPEED_16_BITS(uint32_t f_adc_clock) {
421 if (f_adc_clock <= ADC_MAX_FREQ_16BITS) {
422 return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
423 }
else if (f_adc_clock/2 <= ADC_MAX_FREQ_16BITS){
424 return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
425 }
else if (f_adc_clock/4 <= ADC_MAX_FREQ_16BITS) {
426 return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
427 }
else if (f_adc_clock/8 <= ADC_MAX_FREQ_16BITS) {
428 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
430 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
436 constexpr uint32_t get_CFG_MEDIUM_SPEED(uint32_t f_adc_clock) {
437 uint32_t ADC_CFG1_LOW_SPEED = get_CFG_LOW_SPEED(f_adc_clock);
438 uint32_t ADC_CFG1_HI_SPEED_16_BITS = get_CFG_HI_SPEED_16_BITS(f_adc_clock);
439 if (ADC_CFG1_LOW_SPEED - ADC_CFG1_HI_SPEED_16_BITS > 0x20) {
440 return ADC_CFG1_HI_SPEED_16_BITS + 0x20;
442 return ADC_CFG1_HI_SPEED_16_BITS;
448 constexpr uint32_t get_CFG_HIGH_SPEED(uint32_t f_adc_clock) {
449 if (f_adc_clock <= ADC_MAX_FREQ) {
450 return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
451 }
else if (f_adc_clock/2 <= ADC_MAX_FREQ){
452 return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
453 }
else if (f_adc_clock/4 <= ADC_MAX_FREQ) {
454 return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
455 }
else if (f_adc_clock/8 <= ADC_MAX_FREQ) {
456 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
458 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
464 constexpr uint32_t get_CFG_VERY_HIGH_SPEED(uint32_t f_adc_clock) {
465 const uint8_t speed_factor = 2;
466 if (f_adc_clock <= speed_factor*ADC_MAX_FREQ) {
467 return (ADC_LIB_CFG1_ADIV(0) + ADC_LIB_CFG1_ADICLK(0));
468 }
else if (f_adc_clock/2 <= speed_factor*ADC_MAX_FREQ){
469 return (ADC_LIB_CFG1_ADIV(1) + ADC_LIB_CFG1_ADICLK(0));
470 }
else if (f_adc_clock/4 <= speed_factor*ADC_MAX_FREQ) {
471 return (ADC_LIB_CFG1_ADIV(2) + ADC_LIB_CFG1_ADICLK(0));
472 }
else if (f_adc_clock/8 <= speed_factor*ADC_MAX_FREQ) {
473 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(0));
475 return (ADC_LIB_CFG1_ADIV(3) + ADC_LIB_CFG1_ADICLK(1));
488 #if defined(ADC_TEENSY_4)
515 #if defined(ADC_TEENSY_4)
522 HIGH_VERY_HIGH_SPEED,
537 #define ADC_SC1A_CHANNELS (0x1F)
539 #define ADC_SC1A_PIN_INVALID (0x1F)
541 #define ADC_SC1A_PIN_MUX (0x80)
543 #define ADC_SC1A_PIN_DIFF (0x40)
545 #define ADC_SC1A_PIN_PGA (0x80)
549 #define ADC_ERROR_DIFF_VALUE (-70000)
550 #define ADC_ERROR_VALUE ADC_ERROR_DIFF_VALUE
583 return static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) |
static_cast<uint16_t
>(rhs));
587 return static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) &
static_cast<uint16_t
>(rhs));
591 return lhs =
static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) |
static_cast<uint16_t
>(rhs));
595 return lhs =
static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) &
static_cast<uint16_t
>(rhs));
604 inline void resetError(
volatile ADC_ERROR& fail_flag) {
611 #endif // ADC_SETTINGS_H