PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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FreqMeasureCapture.h 13KB

il y a 3 ans
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  1. /* FreqMeasure Library, for measuring relatively low frequencies
  2. * http://www.pjrc.com/teensy/td_libs_FreqMeasure.html
  3. * Copyright (c) 2011 PJRC.COM, LLC - Paul Stoffregen <paul@pjrc.com>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. #ifndef FreqMeasure_capture_h_
  24. #define FreqMeasure_capture_h_
  25. // Arduino Uno, Duemilanove, LilyPad, Mini, Fio, etc
  26. #if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega168__)
  27. #define CAPTURE_USE_TIMER1 // ICP1 is pin 8
  28. // Teensy 3.1, 3.2, 3.5, 3.6
  29. #elif defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
  30. #define CAPTURE_USE_FTM1_CH0 3 // FTM1 CH0 is pin 3
  31. //#define CAPTURE_USE_FTM1_CH1 4 // FTM1 CH1 is pin 4
  32. //#define CAPTURE_USE_FTM2_CH0 32 // FTM2 CH0 is pin 32 (Teensy 3.1 and 3.2)
  33. //#define CAPTURE_USE_FTM2_CH1 25 // FTM2 CH1 is pin 25 (Teensy 3.1 and 3.2)
  34. //#define CAPTURE_USE_FTM2_CH0 29 // FTM2 CH0 is pin 29 (Teensy 3.5 and 3.6)
  35. //#define CAPTURE_USE_FTM2_CH1 30 // FTM2 CH1 is pin 30 (Teensy 3.5 and 3.6)
  36. // Teensy 3.0
  37. #elif defined(__MK20DX128__)
  38. #define CAPTURE_USE_FTM1_CH0 3 // FTM1 CH0 is pin 3
  39. //#define CAPTURE_USE_FTM1_CH1 4 // FTM1 CH1 is pin 4
  40. // Teensy-LC
  41. #elif defined(__MKL26Z64__)
  42. #define CAPTURE_USE_FTM1_CH0 16 // FTM1 CH0 is pin 16
  43. //#define CAPTURE_USE_FTM1_CH1 17 // FTM1 CH1 is pin 17
  44. //#define CAPTURE_USE_FTM2_CH0 3 // FTM2 CH0 is pin 3
  45. //#define CAPTURE_USE_FTM2_CH1 4 // FTM2 CH1 is pin 4
  46. #elif defined(__IMXRT1052__) || defined(__IMXRT1062__)
  47. #define CAPTURE_USE_FLEXPWM4_CH0A 22 // FlexPWM CH0-A is pin 22
  48. // Teensy 2.0
  49. #elif defined(__AVR_ATmega32U4__)
  50. // #define CAPTURE_USE_TIMER1 // ICP1 is pin 22
  51. #define CAPTURE_USE_TIMER3 // ICP3 is pin 10
  52. // Teensy++ 1.0 & 2.0
  53. #elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
  54. // #define CAPTURE_USE_TIMER1 // ICP1 is pin 4
  55. #define CAPTURE_USE_TIMER3 // ICP3 is pin 17
  56. // Teensy 1.0
  57. #elif defined(__AVR_AT90USB162__)
  58. #define CAPTURE_USE_TIMER1 // ICP1 is pin 16
  59. // Sanguino
  60. #elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
  61. #define CAPTURE_USE_TIMER1 // ICP1 is pin 14
  62. // Arduino Mega
  63. #elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
  64. // #define CAPTURE_USE_TIMER1 // ICP1 is not connected
  65. // #define CAPTURE_USE_TIMER3 // ICP3 is not connected
  66. #define CAPTURE_USE_TIMER4 // ICP4 is pin 49
  67. // #define CAPTURE_USE_TIMER5 // ICP5 is pin 48
  68. #else
  69. #error "Unknown chip, please edit me with timer+counter definitions"
  70. #endif
  71. #if defined(CAPTURE_USE_FTM1_CH0)
  72. #define FTM_SC_VALUE (FTM_SC_TOIE | FTM_SC_CLKS(1) | FTM_SC_PS(0))
  73. #define FTM_ISR_NAME ftm1_isr
  74. static inline void capture_init(void)
  75. {
  76. if (FTM1_MOD != 0xFFFF || (FTM1_SC & 0x7F) != FTM_SC_VALUE) {
  77. FTM1_SC = 0;
  78. FTM1_CNT = 0;
  79. FTM1_MOD = 0xFFFF;
  80. FTM1_SC = FTM_SC_VALUE;
  81. #ifdef KINETISK
  82. FTM1_MODE = 0;
  83. #endif
  84. }
  85. NVIC_SET_PRIORITY(IRQ_FTM1, 48);
  86. }
  87. static inline void capture_start(void)
  88. {
  89. #if defined(KINETISL)
  90. FTM1_C0SC = 0;
  91. delayMicroseconds(1);
  92. #endif
  93. FTM1_C0SC = 0b01000100;
  94. *portConfigRegister(CAPTURE_USE_FTM1_CH0) = PORT_PCR_MUX(3);
  95. NVIC_ENABLE_IRQ(IRQ_FTM1);
  96. }
  97. static inline uint16_t capture_event(void)
  98. {
  99. return (FTM1_C0SC & 0x80) ? 1 : 0;
  100. }
  101. static inline uint32_t capture_read(void)
  102. {
  103. uint32_t val = FTM1_C0V;
  104. #if defined(KINETISK)
  105. FTM1_C0SC = 0b01000100;
  106. #elif defined(KINETISL)
  107. FTM1_C0SC = 0b01000100 | FTM_CSC_CHF;
  108. #endif
  109. return val;
  110. }
  111. static inline uint8_t capture_overflow(void)
  112. {
  113. return (FTM1_SC & FTM_SC_TOF) ? 1 : 0;
  114. }
  115. static inline void capture_overflow_reset(void)
  116. {
  117. #if defined(KINETISK)
  118. FTM1_SC = FTM_SC_VALUE;
  119. #elif defined(KINETISL)
  120. FTM1_SC = FTM_SC_VALUE | FTM_SC_TOF;
  121. #endif
  122. }
  123. static inline void capture_shutdown(void)
  124. {
  125. FTM1_C0SC = 0;
  126. *portConfigRegister(CAPTURE_USE_FTM1_CH0) = 0;
  127. NVIC_DISABLE_IRQ(IRQ_FTM1);
  128. }
  129. #elif defined(CAPTURE_USE_FTM1_CH1)
  130. #define FTM_SC_VALUE (FTM_SC_TOIE | FTM_SC_CLKS(1) | FTM_SC_PS(0))
  131. #define FTM_ISR_NAME ftm1_isr
  132. static inline void capture_init(void)
  133. {
  134. if (FTM1_MOD != 0xFFFF || (FTM1_SC & 0x7F) != FTM_SC_VALUE) {
  135. FTM1_SC = 0;
  136. FTM1_CNT = 0;
  137. FTM1_MOD = 0xFFFF;
  138. FTM1_SC = FTM_SC_VALUE;
  139. #ifdef KINETISK
  140. FTM1_MODE = 0;
  141. #endif
  142. }
  143. NVIC_SET_PRIORITY(IRQ_FTM1, 48);
  144. }
  145. static inline void capture_start(void)
  146. {
  147. #if defined(KINETISL)
  148. FTM1_C1SC = 0;
  149. delayMicroseconds(1);
  150. #endif
  151. FTM1_C1SC = 0b01000100;
  152. *portConfigRegister(CAPTURE_USE_FTM1_CH1) = PORT_PCR_MUX(3);
  153. NVIC_ENABLE_IRQ(IRQ_FTM1);
  154. }
  155. static inline uint16_t capture_event(void)
  156. {
  157. return (FTM1_C1SC & 0x80) ? 1 : 0;
  158. }
  159. static inline uint32_t capture_read(void)
  160. {
  161. uint32_t val = FTM1_C1V;
  162. #if defined(KINETISK)
  163. FTM1_C1SC = 0b01000100;
  164. #elif defined(KINETISL)
  165. FTM1_C1SC = 0b01000100 | FTM_CSC_CHF;
  166. #endif
  167. return val;
  168. }
  169. static inline uint8_t capture_overflow(void)
  170. {
  171. return (FTM1_SC & FTM_SC_TOF) ? 1 : 0;
  172. }
  173. static inline void capture_overflow_reset(void)
  174. {
  175. FTM1_SC = FTM_SC_VALUE;
  176. #if defined(KINETISK)
  177. FTM1_SC = FTM_SC_VALUE;
  178. #elif defined(KINETISL)
  179. FTM1_SC = FTM_SC_VALUE | FTM_SC_TOF;
  180. #endif
  181. }
  182. static inline void capture_shutdown(void)
  183. {
  184. FTM1_C1SC = 0;
  185. *portConfigRegister(CAPTURE_USE_FTM1_CH1) = 0;
  186. NVIC_DISABLE_IRQ(IRQ_FTM1);
  187. }
  188. #elif defined(CAPTURE_USE_FTM2_CH0)
  189. #define FTM_SC_VALUE (FTM_SC_TOIE | FTM_SC_CLKS(1) | FTM_SC_PS(0))
  190. #define FTM_ISR_NAME ftm2_isr
  191. static inline void capture_init(void)
  192. {
  193. if (FTM2_MOD != 0xFFFF || (FTM2_SC & 0x7F) != FTM_SC_VALUE) {
  194. FTM2_SC = 0;
  195. FTM2_CNT = 0;
  196. FTM2_MOD = 0xFFFF;
  197. FTM2_SC = FTM_SC_VALUE;
  198. #ifdef KINETISK
  199. FTM2_MODE = 0;
  200. #endif
  201. }
  202. NVIC_SET_PRIORITY(IRQ_FTM2, 48);
  203. }
  204. static inline void capture_start(void)
  205. {
  206. #if defined(KINETISL)
  207. FTM2_C0SC = 0;
  208. delayMicroseconds(1);
  209. #endif
  210. FTM2_C0SC = 0b01000100;
  211. *portConfigRegister(CAPTURE_USE_FTM2_CH0) = PORT_PCR_MUX(3);
  212. NVIC_ENABLE_IRQ(IRQ_FTM2);
  213. }
  214. static inline uint16_t capture_event(void)
  215. {
  216. return (FTM2_C0SC & 0x80) ? 1 : 0;
  217. }
  218. static inline uint32_t capture_read(void)
  219. {
  220. uint32_t val = FTM2_C0V;
  221. #if defined(KINETISK)
  222. FTM2_C0SC = 0b01000100;
  223. #elif defined(KINETISL)
  224. FTM2_C0SC = 0b01000100 | FTM_CSC_CHF;
  225. #endif
  226. return val;
  227. }
  228. static inline uint8_t capture_overflow(void)
  229. {
  230. return (FTM2_SC & FTM_SC_TOF) ? 1 : 0;
  231. }
  232. static inline void capture_overflow_reset(void)
  233. {
  234. #if defined(KINETISK)
  235. FTM2_SC = FTM_SC_VALUE;
  236. #elif defined(KINETISL)
  237. FTM2_SC = FTM_SC_VALUE | FTM_SC_TOF;
  238. #endif
  239. }
  240. static inline void capture_shutdown(void)
  241. {
  242. FTM2_C0SC = 0;
  243. *portConfigRegister(CAPTURE_USE_FTM2_CH0) = 0;
  244. NVIC_DISABLE_IRQ(IRQ_FTM2);
  245. }
  246. #elif defined(CAPTURE_USE_FTM2_CH1)
  247. #define FTM_SC_VALUE (FTM_SC_TOIE | FTM_SC_CLKS(1) | FTM_SC_PS(0))
  248. #define FTM_ISR_NAME ftm2_isr
  249. static inline void capture_init(void)
  250. {
  251. if (FTM2_MOD != 0xFFFF || (FTM2_SC & 0x7F) != FTM_SC_VALUE) {
  252. FTM2_SC = 0;
  253. FTM2_CNT = 0;
  254. FTM2_MOD = 0xFFFF;
  255. FTM2_SC = FTM_SC_VALUE;
  256. #ifdef KINETISK
  257. FTM2_MODE = 0;
  258. #endif
  259. }
  260. NVIC_SET_PRIORITY(IRQ_FTM2, 48);
  261. }
  262. static inline void capture_start(void)
  263. {
  264. #if defined(KINETISL)
  265. FTM2_C1SC = 0;
  266. delayMicroseconds(1);
  267. #endif
  268. FTM2_C1SC = 0b01000100;
  269. *portConfigRegister(CAPTURE_USE_FTM2_CH1) = PORT_PCR_MUX(3);
  270. NVIC_ENABLE_IRQ(IRQ_FTM2);
  271. }
  272. static inline uint16_t capture_event(void)
  273. {
  274. return (FTM2_C1SC & 0x80) ? 1 : 0;
  275. }
  276. static inline uint32_t capture_read(void)
  277. {
  278. uint32_t val = FTM2_C1V;
  279. #if defined(KINETISK)
  280. FTM2_C1SC = 0b01000100;
  281. #elif defined(KINETISL)
  282. FTM2_C1SC = 0b01000100 | FTM_CSC_CHF;
  283. #endif
  284. return val;
  285. }
  286. static inline uint8_t capture_overflow(void)
  287. {
  288. return (FTM2_SC & FTM_SC_TOF) ? 1 : 0;
  289. }
  290. static inline void capture_overflow_reset(void)
  291. {
  292. #if defined(KINETISK)
  293. FTM2_SC = FTM_SC_VALUE;
  294. #elif defined(KINETISL)
  295. FTM2_SC = FTM_SC_VALUE | FTM_SC_TOF;
  296. #endif
  297. }
  298. static inline void capture_shutdown(void)
  299. {
  300. FTM2_C1SC = 0;
  301. *portConfigRegister(CAPTURE_USE_FTM2_CH1) = 0;
  302. NVIC_DISABLE_IRQ(IRQ_FTM2);
  303. }
  304. #elif defined(CAPTURE_USE_FLEXPWM4_CH0A)
  305. #define FTM_ISR_NAME flexpwm_4_0_isr
  306. void flexpwm_4_0_isr(void);
  307. static inline void capture_init(void)
  308. {
  309. FLEXPWM4_FCTRL0 |= FLEXPWM_FCTRL0_FLVL(1);
  310. FLEXPWM4_FSTS0 = 0x0001;
  311. FLEXPWM4_MCTRL |= FLEXPWM_MCTRL_CLDOK(1);
  312. FLEXPWM4_SM0CTRL2 = FLEXPWM_SMCTRL2_INDEP;
  313. FLEXPWM4_SM0CTRL = FLEXPWM_SMCTRL_HALF;
  314. FLEXPWM4_SM0INIT = 0;
  315. FLEXPWM4_SM0VAL0 = 0;
  316. FLEXPWM4_SM0VAL1 = 65535;
  317. FLEXPWM4_SM0VAL2 = 0;
  318. FLEXPWM4_SM0VAL3 = 0;
  319. FLEXPWM4_SM0VAL4 = 0;
  320. FLEXPWM4_SM0VAL5 = 0;
  321. FLEXPWM4_MCTRL |= FLEXPWM_MCTRL_LDOK(1) | FLEXPWM_MCTRL_RUN(1);
  322. attachInterruptVector(IRQ_FLEXPWM4_0, flexpwm_4_0_isr);
  323. NVIC_SET_PRIORITY(IRQ_FLEXPWM4_0, 48);
  324. FLEXPWM4_SM0INTEN = FLEXPWM_SMINTEN_CA0IE | FLEXPWM_SMINTEN_RIE;
  325. }
  326. static inline void capture_start(void)
  327. {
  328. FLEXPWM4_SM0CAPTCTRLA = FLEXPWM_SMCAPTCTRLA_EDGA0(2) | FLEXPWM_SMCAPTCTRLA_ARMA;
  329. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_08 = 1 | 0x10; // pin 22, AD_B1_08, FLEXPWM4_PWM0_A
  330. IOMUXC_FLEXPWM4_PWMA0_SELECT_INPUT = 1;
  331. FLEXPWM4_SM0STS = FLEXPWM_SMSTS_CFA0 | FLEXPWM_SMSTS_RF;
  332. NVIC_ENABLE_IRQ(IRQ_FLEXPWM4_0);
  333. }
  334. static inline uint16_t capture_event(void)
  335. {
  336. return (FLEXPWM4_SM0STS & FLEXPWM_SMSTS_CFA0) ? 1 : 0;
  337. }
  338. static inline uint32_t capture_read(void)
  339. {
  340. uint32_t val = FLEXPWM4_SM0CVAL2;
  341. FLEXPWM4_SM0STS = FLEXPWM_SMSTS_CFA0;
  342. return val;
  343. }
  344. static inline uint8_t capture_overflow(void)
  345. {
  346. return (FLEXPWM4_SM0STS & FLEXPWM_SMSTS_RF) ? 1 : 0;
  347. }
  348. static inline void capture_overflow_reset(void)
  349. {
  350. FLEXPWM4_SM0STS = FLEXPWM_SMSTS_RF;
  351. }
  352. static inline void capture_shutdown(void)
  353. {
  354. FLEXPWM4_SM0INTEN = 0;
  355. FLEXPWM4_SM0CAPTCTRLA = 0;
  356. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_08 = 5 | 0x10;
  357. NVIC_DISABLE_IRQ(IRQ_FLEXPWM4_0);
  358. }
  359. #elif defined(CAPTURE_USE_TIMER1)
  360. static uint8_t saveTCCR1A, saveTCCR1B;
  361. static inline void capture_init(void)
  362. {
  363. saveTCCR1A = TCCR1A;
  364. saveTCCR1B = TCCR1B;
  365. TCCR1B = 0;
  366. TCCR1A = 0;
  367. TCNT1 = 0;
  368. TIFR1 = (1<<ICF1) | (1<<TOV1);
  369. TIMSK1 = (1<<ICIE1) | (1<<TOIE1);
  370. }
  371. static inline void capture_start(void)
  372. {
  373. TCCR1B = (1<<ICNC1) | (1<<ICES1) | (1<<CS10);
  374. }
  375. static inline uint16_t capture_read(void)
  376. {
  377. return ICR1;
  378. }
  379. static inline uint8_t capture_overflow(void)
  380. {
  381. return TIFR1 & (1<<TOV1);
  382. }
  383. static inline void capture_overflow_reset(void)
  384. {
  385. TIFR1 = (1<<TOV1);
  386. }
  387. static inline void capture_shutdown(void)
  388. {
  389. TCCR1B = 0;
  390. TIMSK1 = 0;
  391. TCCR1A = saveTCCR1A;
  392. TCCR1B = saveTCCR1B;
  393. }
  394. #define TIMER_OVERFLOW_VECTOR TIMER1_OVF_vect
  395. #define TIMER_CAPTURE_VECTOR TIMER1_CAPT_vect
  396. #elif defined(CAPTURE_USE_TIMER3)
  397. static uint8_t saveTCCR3A, saveTCCR3B;
  398. static inline void capture_init(void)
  399. {
  400. saveTCCR3A = TCCR3A;
  401. saveTCCR3B = TCCR3B;
  402. TCCR3B = 0;
  403. TCCR3A = 0;
  404. TCNT3 = 0;
  405. TIFR3 = (1<<ICF3) | (1<<TOV3);
  406. TIMSK3 = (1<<ICIE3) | (1<<TOIE3);
  407. }
  408. static inline void capture_start(void)
  409. {
  410. TCCR3B = (1<<ICNC3) | (1<<ICES3) | (1<<CS30);
  411. }
  412. static inline uint16_t capture_read(void)
  413. {
  414. return ICR3;
  415. }
  416. static inline uint8_t capture_overflow(void)
  417. {
  418. return TIFR3 & (1<<TOV3);
  419. }
  420. static inline void capture_overflow_reset(void)
  421. {
  422. TIFR3 = (1<<TOV3);
  423. }
  424. static inline void capture_shutdown(void)
  425. {
  426. TCCR3B = 0;
  427. TIMSK3 = 0;
  428. TCCR3A = saveTCCR3A;
  429. TCCR3B = saveTCCR3B;
  430. }
  431. #define TIMER_OVERFLOW_VECTOR TIMER3_OVF_vect
  432. #define TIMER_CAPTURE_VECTOR TIMER3_CAPT_vect
  433. #elif defined(CAPTURE_USE_TIMER4)
  434. static uint8_t saveTCCR4A, saveTCCR4B;
  435. static inline void capture_init(void)
  436. {
  437. saveTCCR4A = TCCR4A;
  438. saveTCCR4B = TCCR4B;
  439. TCCR4B = 0;
  440. TCCR4A = 0;
  441. TCNT4 = 0;
  442. TIFR4 = (1<<ICF4) | (1<<TOV4);
  443. TIMSK4 = (1<<ICIE4) | (1<<TOIE4);
  444. }
  445. static inline void capture_start(void)
  446. {
  447. TCCR4B = (1<<ICNC4) | (1<<ICES4) | (1<<CS40);
  448. }
  449. static inline uint16_t capture_read(void)
  450. {
  451. return ICR4;
  452. }
  453. static inline uint8_t capture_overflow(void)
  454. {
  455. return TIFR4 & (1<<TOV4);
  456. }
  457. static inline void capture_overflow_reset(void)
  458. {
  459. TIFR4 = (1<<TOV4);
  460. }
  461. static inline void capture_shutdown(void)
  462. {
  463. TCCR4B = 0;
  464. TIMSK4 = 0;
  465. TCCR4A = saveTCCR4A;
  466. TCCR4B = saveTCCR4B;
  467. }
  468. #define TIMER_OVERFLOW_VECTOR TIMER4_OVF_vect
  469. #define TIMER_CAPTURE_VECTOR TIMER4_CAPT_vect
  470. #elif defined(CAPTURE_USE_TIMER5)
  471. static uint8_t saveTCCR5A, saveTCCR5B;
  472. static inline void capture_init(void)
  473. {
  474. saveTCCR5A = TCCR5A;
  475. saveTCCR5B = TCCR5B;
  476. TCCR5B = 0;
  477. TCCR5A = 0;
  478. TCNT5 = 0;
  479. TIFR5 = (1<<ICF5) | (1<<TOV5);
  480. TIMSK5 = (1<<ICIE5) | (1<<TOIE5);
  481. }
  482. static inline void capture_start(void)
  483. {
  484. TCCR5B = (1<<ICNC5) | (1<<ICES5) | (1<<CS50);
  485. }
  486. static inline uint16_t capture_read(void)
  487. {
  488. return ICR5;
  489. }
  490. static inline uint8_t capture_overflow(void)
  491. {
  492. return TIFR5 & (1<<TOV5);
  493. }
  494. static inline void capture_overflow_reset(void)
  495. {
  496. TIFR5 = (1<<TOV5);
  497. }
  498. static inline void capture_shutdown(void)
  499. {
  500. TCCR5B = 0;
  501. TIMSK5 = 0;
  502. TCCR5A = saveTCCR5A;
  503. TCCR5B = saveTCCR5B;
  504. }
  505. #define TIMER_OVERFLOW_VECTOR TIMER5_OVF_vect
  506. #define TIMER_CAPTURE_VECTOR TIMER5_CAPT_vect
  507. #endif // CAPTURE_USE_***
  508. #endif