PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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  1. /* Optimized SD Library for Teensy 3.X
  2. * Copyright (c) 2015, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this SD library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing genuine Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #ifndef _SD_t3_ioreg_h_
  27. #define _SD_t3_ioreg_h_
  28. // from OneWire.h
  29. #include "Arduino.h"
  30. #if defined(__AVR__)
  31. #define PIN_TO_BASEREG(pin) (portInputRegister(digitalPinToPort(pin)))
  32. #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
  33. #define IO_REG_TYPE uint8_t
  34. #define IO_REG_ASM asm("r30")
  35. #define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0)
  36. #define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) &= ~(mask))
  37. #define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+1)) |= (mask))
  38. #define DIRECT_WRITE_LOW(base, mask) ((*((base)+2)) &= ~(mask))
  39. #define DIRECT_WRITE_HIGH(base, mask) ((*((base)+2)) |= (mask))
  40. #elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
  41. #define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
  42. #define PIN_TO_BITMASK(pin) (1)
  43. #define IO_REG_TYPE uint8_t
  44. #define IO_REG_ASM
  45. #define DIRECT_READ(base, mask) (*((base)+512))
  46. #define DIRECT_MODE_INPUT(base, mask) (*((base)+640) = 0)
  47. #define DIRECT_MODE_OUTPUT(base, mask) (*((base)+640) = 1)
  48. #define DIRECT_WRITE_LOW(base, mask) (*((base)+256) = 1)
  49. #define DIRECT_WRITE_HIGH(base, mask) (*((base)+128) = 1)
  50. #elif defined(__MKL26Z64__)
  51. #define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
  52. #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
  53. #define IO_REG_TYPE uint8_t
  54. #define IO_REG_ASM
  55. #define DIRECT_READ(base, mask) ((*((base)+16) & (mask)) ? 1 : 0)
  56. #define DIRECT_MODE_INPUT(base, mask) (*((base)+20) &= ~(mask))
  57. #define DIRECT_MODE_OUTPUT(base, mask) (*((base)+20) |= (mask))
  58. #define DIRECT_WRITE_LOW(base, mask) (*((base)+8) = (mask))
  59. #define DIRECT_WRITE_HIGH(base, mask) (*((base)+4) = (mask))
  60. #elif defined(__SAM3X8E__)
  61. #define PIN_TO_BASEREG(pin) (&(digitalPinToPort(pin)->PIO_PER))
  62. #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
  63. #define IO_REG_TYPE uint32_t
  64. #define IO_REG_ASM
  65. #define DIRECT_READ(base, mask) (((*((base)+15)) & (mask)) ? 1 : 0)
  66. #define DIRECT_MODE_INPUT(base, mask) ((*((base)+5)) = (mask))
  67. #define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+4)) = (mask))
  68. #define DIRECT_WRITE_LOW(base, mask) ((*((base)+13)) = (mask))
  69. #define DIRECT_WRITE_HIGH(base, mask) ((*((base)+12)) = (mask))
  70. #elif defined(__PIC32MX__)
  71. #define PIN_TO_BASEREG(pin) (portModeRegister(digitalPinToPort(pin)))
  72. #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
  73. #define IO_REG_TYPE uint32_t
  74. #define IO_REG_ASM
  75. #define DIRECT_READ(base, mask) (((*(base+4)) & (mask)) ? 1 : 0) //PORTX + 0x10
  76. #define DIRECT_MODE_INPUT(base, mask) ((*(base+2)) = (mask)) //TRISXSET + 0x08
  77. #define DIRECT_MODE_OUTPUT(base, mask) ((*(base+1)) = (mask)) //TRISXCLR + 0x04
  78. #define DIRECT_WRITE_LOW(base, mask) ((*(base+8+1)) = (mask)) //LATXCLR + 0x24
  79. #define DIRECT_WRITE_HIGH(base, mask) ((*(base+8+2)) = (mask)) //LATXSET + 0x28
  80. #else
  81. #define PIN_TO_BASEREG(pin) (0)
  82. #define PIN_TO_BITMASK(pin) (pin)
  83. #define IO_REG_TYPE unsigned int
  84. #define IO_REG_ASM
  85. #define DIRECT_READ(base, pin) digitalRead(pin)
  86. #define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW)
  87. #define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH)
  88. #define DIRECT_MODE_INPUT(base, pin) pinMode(pin,INPUT)
  89. #define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin,OUTPUT)
  90. #endif // CPU types
  91. #endif