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PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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framework-arduinoteensy-cxx20/libraries/CapacitiveSensor/CapacitiveSensor.h

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  1. /*

  2.  CapacitiveSense.h - Capacitive Sensing Library for 'duino / Wiring

  3.  https://github.com/PaulStoffregen/CapacitiveSensor

  4.  http://www.pjrc.com/teensy/td_libs_CapacitiveSensor.html

  5.  http://playground.arduino.cc/Main/CapacitiveSensor

  6.  Copyright (c) 2009 Paul Bagder

  7.  Updates for other hardare by Paul Stoffregen, 2010-2016

  8.  vim: set ts=4:

  9. 

  10.  Permission is hereby granted, free of charge, to any person obtaining a

  11.  copy of this software and associated documentation files (the "Software"),

  12.  to deal in the Software without restriction, including without limitation

  13.  the rights to use, copy, modify, merge, publish, distribute, sublicense,

  14.  and/or sell copies of the Software, and to permit persons to whom the

  15.  Software is furnished to do so, subject to the following conditions:

  16. 

  17.  The above copyright notice and this permission notice shall be included in

  18.  all copies or substantial portions of the Software.

  19. 

  20.  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

  21.  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

  22.  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

  23.  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

  24.  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

  25.  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

  26.  DEALINGS IN THE SOFTWARE.

  27. */

  28. 

  29. // ensure this library description is only included once

  30. #ifndef CapacitiveSensor_h

  31. #define CapacitiveSensor_h

  32. 

  33. #if ARDUINO >= 100

  34. #include "Arduino.h"

  35. #else

  36. #include "WProgram.h"

  37. #endif

  38. 

  39. // Direct I/O through registers and bitmask (from OneWire library)

  40. 

  41. #if defined(__AVR__)

  42. #define PIN_TO_BASEREG(pin)             (portInputRegister(digitalPinToPort(pin)))

  43. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  44. #define IO_REG_TYPE uint8_t

  45. #define DIRECT_READ(base, mask)         (((*(base)) & (mask)) ? 1 : 0)

  46. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+1)) &= ~(mask), (*((base)+2)) &= ~(mask))

  47. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+1)) |= (mask))

  48. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+2)) &= ~(mask))

  49. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+2)) |= (mask))

  50. 

  51. #elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__)

  52. #define PIN_TO_BASEREG(pin)             (portOutputRegister(pin))

  53. #define PIN_TO_BITMASK(pin)             (1)

  54. #define IO_REG_TYPE uint8_t

  55. #define IO_REG_ASM

  56. #define DIRECT_READ(base, mask)         (*((base)+512))

  57. #define DIRECT_MODE_INPUT(base, mask)   (*((base)+640) = 0)

  58. #define DIRECT_MODE_OUTPUT(base, mask)  (*((base)+640) = 1)

  59. #define DIRECT_WRITE_LOW(base, mask)    (*((base)+256) = 1)

  60. #define DIRECT_WRITE_HIGH(base, mask)   (*((base)+128) = 1)

  61. 

  62. #elif defined(__MKL26Z64__)

  63. #define PIN_TO_BASEREG(pin)             (portOutputRegister(pin))

  64. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  65. #define IO_REG_TYPE uint8_t

  66. #define IO_REG_ASM

  67. #define DIRECT_READ(base, mask)         ((*((base)+16) & (mask)) ? 1 : 0)

  68. #define DIRECT_MODE_INPUT(base, mask)   (*((base)+20) &= ~(mask))

  69. #define DIRECT_MODE_OUTPUT(base, mask)  (*((base)+20) |= (mask))

  70. #define DIRECT_WRITE_LOW(base, mask)    (*((base)+8) = (mask))

  71. #define DIRECT_WRITE_HIGH(base, mask)   (*((base)+4) = (mask))

  72. 

  73. #elif defined(__IMXRT1052__) || defined(__IMXRT1062__)

  74. #define PIN_TO_BASEREG(pin)             (portOutputRegister(pin))

  75. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  76. #define IO_REG_TYPE uint32_t

  77. #define IO_REG_ASM

  78. #define DIRECT_READ(base, mask)         ((*((base)+2) & (mask)) ? 1 : 0)

  79. #define DIRECT_MODE_INPUT(base, mask)   (*((base)+1) &= ~(mask))

  80. #define DIRECT_MODE_OUTPUT(base, mask)  (*((base)+1) |= (mask))

  81. #define DIRECT_WRITE_LOW(base, mask)    (*((base)+34) = (mask))

  82. #define DIRECT_WRITE_HIGH(base, mask)   (*((base)+33) = (mask))

  83. 

  84. #elif defined(__SAM3X8E__)

  85. #define PIN_TO_BASEREG(pin)             (&(digitalPinToPort(pin)->PIO_PER))

  86. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  87. #define IO_REG_TYPE uint32_t

  88. #define IO_REG_ASM

  89. #define DIRECT_READ(base, mask)         (((*((base)+15)) & (mask)) ? 1 : 0)

  90. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+5)) = (mask))

  91. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+4)) = (mask))

  92. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+13)) = (mask))

  93. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+12)) = (mask))

  94. 

  95. #elif defined(__PIC32MX__)

  96. #define PIN_TO_BASEREG(pin)             (portModeRegister(digitalPinToPort(pin)))

  97. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  98. #define IO_REG_TYPE uint32_t

  99. #define IO_REG_ASM

  100. #define DIRECT_READ(base, mask)         (((*(base+4)) & (mask)) ? 1 : 0)  //PORTX + 0x10

  101. #define DIRECT_MODE_INPUT(base, mask)   ((*(base+2)) = (mask))            //TRISXSET + 0x08

  102. #define DIRECT_MODE_OUTPUT(base, mask)  ((*(base+1)) = (mask))            //TRISXCLR + 0x04

  103. #define DIRECT_WRITE_LOW(base, mask)    ((*(base+8+1)) = (mask))          //LATXCLR  + 0x24

  104. #define DIRECT_WRITE_HIGH(base, mask)   ((*(base+8+2)) = (mask))          //LATXSET + 0x28

  105. 

  106. #elif defined(ARDUINO_ARCH_ESP8266)

  107. #define PIN_TO_BASEREG(pin) ((volatile uint32_t*) GPO)

  108. #define PIN_TO_BITMASK(pin) (1 << pin)

  109. #define IO_REG_TYPE uint32_t

  110. #define IO_REG_ASM

  111. #define DIRECT_READ(base, mask) ((GPI & (mask)) ? 1 : 0) //GPIO_IN_ADDRESS

  112. #define DIRECT_MODE_INPUT(base, mask) (GPE &= ~(mask)) //GPIO_ENABLE_W1TC_ADDRESS

  113. #define DIRECT_MODE_OUTPUT(base, mask) (GPE |= (mask)) //GPIO_ENABLE_W1TS_ADDRESS

  114. #define DIRECT_WRITE_LOW(base, mask) (GPOC = (mask)) //GPIO_OUT_W1TC_ADDRESS

  115. #define DIRECT_WRITE_HIGH(base, mask) (GPOS = (mask)) //GPIO_OUT_W1TS_ADDRESS

  116. 

  117. #elif defined(ARDUINO_ARCH_ESP32)

  118. #include <driver/rtc_io.h>

  119. #define PIN_TO_BASEREG(pin)             (0)

  120. #define PIN_TO_BITMASK(pin)             (pin)

  121. #define IO_REG_TYPE uint32_t

  122. #define IO_REG_BASE_ATTR

  123. #define IO_REG_MASK_ATTR

  124. 

  125. static inline __attribute__((always_inline))

  126. IO_REG_TYPE directRead(IO_REG_TYPE pin)

  127. {

  128.     if ( pin < 32 )

  129.         return (GPIO.in >> pin) & 0x1;

  130.     else if ( pin < 40 )

  131.         return (GPIO.in1.val >> (pin - 32)) & 0x1;

  132. 

  133.     return 0;

  134. }

  135. 

  136. static inline __attribute__((always_inline))

  137. void directWriteLow(IO_REG_TYPE pin)

  138. {

  139.     if ( pin < 32 )

  140.         GPIO.out_w1tc = ((uint32_t)1 << pin);

  141.     else if ( pin < 34 )

  142.         GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));

  143. }

  144. 

  145. static inline __attribute__((always_inline))

  146. void directWriteHigh(IO_REG_TYPE pin)

  147. {

  148.     if ( pin < 32 )

  149.         GPIO.out_w1ts = ((uint32_t)1 << pin);

  150.     else if ( pin < 34 )

  151.         GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));

  152. }

  153. 

  154. static inline __attribute__((always_inline))

  155. void directModeInput(IO_REG_TYPE pin)

  156. {

  157.     if ( digitalPinIsValid(pin) )

  158.     {

  159.         uint32_t rtc_reg(rtc_gpio_desc[pin].reg);

  160. 

  161.         if ( rtc_reg ) // RTC pins PULL settings

  162.         {

  163.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);

  164.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);

  165.         }

  166. 

  167.         if ( pin < 32 )

  168.             GPIO.enable_w1tc = ((uint32_t)1 << pin);

  169.         else

  170.             GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));

  171. 

  172.         uint32_t pinFunction((uint32_t)2 << FUN_DRV_S); // what are the drivers?

  173.         pinFunction |= FUN_IE; // input enable but required for output as well?

  174.         pinFunction |= ((uint32_t)2 << MCU_SEL_S);

  175. 

  176.         ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;

  177. 

  178.         GPIO.pin[pin].val = 0;

  179.     }

  180. }

  181. 

  182. static inline __attribute__((always_inline))

  183. void directModeOutput(IO_REG_TYPE pin)

  184. {

  185.     if ( digitalPinIsValid(pin) && pin <= 33 ) // pins above 33 can be only inputs

  186.     {

  187.         uint32_t rtc_reg(rtc_gpio_desc[pin].reg);

  188. 

  189.         if ( rtc_reg ) // RTC pins PULL settings

  190.         {

  191.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);

  192.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);

  193.         }

  194. 

  195.         if ( pin < 32 )

  196.             GPIO.enable_w1ts = ((uint32_t)1 << pin);

  197.         else // already validated to pins <= 33

  198.             GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));

  199. 

  200.         uint32_t pinFunction((uint32_t)2 << FUN_DRV_S); // what are the drivers?

  201.         pinFunction |= FUN_IE; // input enable but required for output as well?

  202.         pinFunction |= ((uint32_t)2 << MCU_SEL_S);

  203. 

  204.         ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;

  205. 

  206.         GPIO.pin[pin].val = 0;

  207.     }

  208. }

  209. 

  210. #define DIRECT_READ(base, pin)          directRead(pin)

  211. #define DIRECT_WRITE_LOW(base, pin)     directWriteLow(pin)

  212. #define DIRECT_WRITE_HIGH(base, pin)    directWriteHigh(pin)

  213. #define DIRECT_MODE_INPUT(base, pin)    directModeInput(pin)

  214. #define DIRECT_MODE_OUTPUT(base, pin)   directModeOutput(pin)

  215. // https://github.com/PaulStoffregen/OneWire/pull/47

  216. // https://github.com/stickbreaker/OneWire/commit/6eb7fc1c11a15b6ac8c60e5671cf36eb6829f82c

  217. #ifdef  interrupts

  218. #undef  interrupts

  219. #endif

  220. #ifdef  noInterrupts

  221. #undef  noInterrupts

  222. #endif

  223. #define noInterrupts() {portMUX_TYPE mux = portMUX_INITIALIZER_UNLOCKED;portENTER_CRITICAL(&mux)

  224. #define interrupts() portEXIT_CRITICAL(&mux);}

  225. //#warning, code is copied from "ESP32 OneWire testing"

  226. 

  227. #elif defined(__SAMD21G18A__)

  228. // runs extremely slow/unreliable on Arduino Zero - help wanted....

  229. #define PIN_TO_BASEREG(pin)             portModeRegister(digitalPinToPort(pin))

  230. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  231. #define IO_REG_TYPE uint32_t

  232. #define IO_REG_ASM

  233. #define DIRECT_READ(base, mask)         (((*((base)+8)) & (mask)) ? 1 : 0)

  234. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+1)) = (mask))

  235. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+2)) = (mask))

  236. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+5)) = (mask))

  237. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+6)) = (mask))

  238. 

  239. #elif defined(__SAMD51__)

  240. #define PIN_TO_BASEREG(pin)             portModeRegister(digitalPinToPort(pin))

  241. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  242. #define IO_REG_TYPE uint32_t

  243. #define IO_REG_ASM

  244. #define DIRECT_READ(base, mask)         (((*((base)+8)) & (mask)) ? 1 : 0) // IN

  245. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+1)) = (mask)) // DIRCLR

  246. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+2)) = (mask)) // DIRSET

  247. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+5)) = (mask)) // OUTCLR

  248. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+6)) = (mask)) /// OUTSET

  249. 

  250. #elif defined(ARDUINO_NRF52_ADAFRUIT)

  251. #define PIN_TO_BASEREG(pin)             (0)

  252. #define PIN_TO_BITMASK(pin)             digitalPinToPinName(pin)

  253. #define IO_REG_TYPE uint32_t

  254. #define IO_REG_ASM

  255. #define DIRECT_READ(base, pin)          nrf_gpio_pin_read(pin)

  256. #define DIRECT_WRITE_LOW(base, pin)     nrf_gpio_pin_clear(pin)

  257. #define DIRECT_WRITE_HIGH(base, pin)    nrf_gpio_pin_set(pin)

  258. #define DIRECT_MODE_INPUT(base, pin)    nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL)

  259. #define DIRECT_MODE_OUTPUT(base, pin)   nrf_gpio_cfg_output(pin)

  260. 

  261. #elif defined(RBL_NRF51822)

  262. #define PIN_TO_BASEREG(pin)             (0)

  263. #define PIN_TO_BITMASK(pin)             (pin)

  264. #define IO_REG_TYPE uint32_t

  265. #define IO_REG_ASM

  266. #define DIRECT_READ(base, pin)          nrf_gpio_pin_read(pin)

  267. #define DIRECT_WRITE_LOW(base, pin)     nrf_gpio_pin_clear(pin)

  268. #define DIRECT_WRITE_HIGH(base, pin)    nrf_gpio_pin_set(pin)

  269. #define DIRECT_MODE_INPUT(base, pin)    nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL)

  270. #define DIRECT_MODE_OUTPUT(base, pin)   nrf_gpio_cfg_output(pin)

  271. 

  272. #elif defined(__arc__)

  273. 

  274. #include "scss_registers.h"

  275. #include "portable.h"

  276. #include "avr/pgmspace.h"

  277. 

  278. #define GPIO_ID(pin)			(g_APinDescription[pin].ulGPIOId)

  279. #define GPIO_TYPE(pin)			(g_APinDescription[pin].ulGPIOType)

  280. #define GPIO_BASE(pin)			(g_APinDescription[pin].ulGPIOBase)

  281. #define DIR_OFFSET_SS			0x01

  282. #define DIR_OFFSET_SOC			0x04

  283. #define EXT_PORT_OFFSET_SS		0x0A

  284. #define EXT_PORT_OFFSET_SOC		0x50

  285. 

  286. /* GPIO registers base address */

  287. #define PIN_TO_BASEREG(pin)		((volatile uint32_t *)g_APinDescription[pin].ulGPIOBase)

  288. #define PIN_TO_BITMASK(pin)		pin

  289. #define IO_REG_TYPE				uint32_t

  290. #define IO_REG_ASM

  291. 

  292. static inline __attribute__((always_inline))

  293. IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  294. {

  295.     IO_REG_TYPE ret;

  296.     if (SS_GPIO == GPIO_TYPE(pin)) {

  297.         ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));

  298.     } else {

  299.         ret = MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, EXT_PORT_OFFSET_SOC);

  300.     }

  301.     return ((ret >> GPIO_ID(pin)) & 0x01);

  302. }

  303. 

  304. static inline __attribute__((always_inline))

  305. void directModeInput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  306. {

  307.     if (SS_GPIO == GPIO_TYPE(pin)) {

  308.         WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)),

  309. 			((IO_REG_TYPE)(base) + DIR_OFFSET_SS));

  310.     } else {

  311.         MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));

  312.     }

  313. }

  314. 

  315. static inline __attribute__((always_inline))

  316. void directModeOutput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  317. {

  318.     if (SS_GPIO == GPIO_TYPE(pin)) {

  319.         WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)),

  320. 			((IO_REG_TYPE)(base) + DIR_OFFSET_SS));

  321.     } else {

  322.         MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));

  323.     }

  324. }

  325. 

  326. static inline __attribute__((always_inline))

  327. void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  328. {

  329.     if (SS_GPIO == GPIO_TYPE(pin)) {

  330.         WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);

  331.     } else {

  332.         MMIO_REG_VAL(base) &= ~(0x01 << GPIO_ID(pin));

  333.     }

  334. }

  335. 

  336. static inline __attribute__((always_inline))

  337. void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  338. {

  339.     if (SS_GPIO == GPIO_TYPE(pin)) {

  340.         WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);

  341.     } else {

  342.         MMIO_REG_VAL(base) |= (0x01 << GPIO_ID(pin));

  343.     }

  344. }

  345. 

  346. #define DIRECT_READ(base, pin)		directRead(base, pin)

  347. #define DIRECT_MODE_INPUT(base, pin)	directModeInput(base, pin)

  348. #define DIRECT_MODE_OUTPUT(base, pin)	directModeOutput(base, pin)

  349. #define DIRECT_WRITE_LOW(base, pin)	directWriteLow(base, pin)

  350. #define DIRECT_WRITE_HIGH(base, pin)	directWriteHigh(base, pin)

  351. 

  352. 

  353. #elif defined(ARDUINO_ARCH_STM32)

  354. 

  355. #define PIN_TO_BASEREG(pin)             (0)

  356. #define PIN_TO_BITMASK(pin)             (pin)

  357. #define IO_REG_TYPE uint32_t

  358. #define IO_REG_ASM

  359. 

  360. #define DIRECT_READ(base, pin)          digitalRead(pin)

  361. #define DIRECT_MODE_INPUT(base, pin)    pinMode(pin,INPUT)

  362. #define DIRECT_MODE_OUTPUT(base, pin)   pinMode(pin,OUTPUT)

  363. #define DIRECT_WRITE_LOW(base, pin)     digitalWrite(pin, LOW)

  364. #define DIRECT_WRITE_HIGH(base, pin)    digitalWrite(pin, HIGH)

  365. 

  366. #elif defined(ARDUINO_ARCH_APOLLO3)

  367. #define PIN_TO_BASEREG(pin) (0)

  368. #define PIN_TO_BITMASK(pin) (pin)

  369. #define IO_REG_TYPE uint32_t

  370. #define IO_REG_ASM

  371. #define DIRECT_READ(base, mask) (am_hal_gpio_input_read(mask))

  372. #define DIRECT_MODE_INPUT(base, mask) (am_hal_gpio_pinconfig(mask, g_AM_HAL_GPIO_INPUT))

  373. #define DIRECT_MODE_OUTPUT(base, mask) (am_hal_gpio_pinconfig(mask, g_AM_HAL_GPIO_OUTPUT))

  374. #define DIRECT_WRITE_LOW(base, mask) (am_hal_gpio_output_clear(mask))

  375. #define DIRECT_WRITE_HIGH(base, mask) (am_hal_gpio_output_set(mask))

  376. 

  377. #endif

  378. 

  379. // some 3.3V chips with 5V tolerant pins need this workaround

  380. //

  381. #if defined(__MK20DX256__)

  382. #define FIVE_VOLT_TOLERANCE_WORKAROUND

  383. #endif

  384. 

  385. // library interface description

  386. class CapacitiveSensor

  387. {

  388.   // user-accessible "public" interface

  389.   public:

  390.   // methods

  391. 	CapacitiveSensor(uint8_t sendPin, uint8_t receivePin);

  392. 	long capacitiveSensorRaw(uint8_t samples);

  393. 	long capacitiveSensor(uint8_t samples);

  394. 	void set_CS_Timeout_Millis(unsigned long timeout_millis);

  395. 	void reset_CS_AutoCal();

  396. 	void set_CS_AutocaL_Millis(unsigned long autoCal_millis);

  397.   // library-accessible "private" interface

  398.   private:

  399.   // variables

  400. 	int error;

  401. 	unsigned long  leastTotal;

  402. 	unsigned int   loopTimingFactor;

  403. 	unsigned long  CS_Timeout_Millis;

  404. 	unsigned long  CS_AutocaL_Millis;

  405. 	unsigned long  lastCal;

  406. 	unsigned long  total;

  407. 	IO_REG_TYPE sBit;   // send pin's ports and bitmask

  408. 	volatile IO_REG_TYPE *sReg;

  409. 	IO_REG_TYPE rBit;    // receive pin's ports and bitmask

  410. 	volatile IO_REG_TYPE *rReg;

  411.   // methods

  412. 	int SenseOneCycle(void);

  413. };

  414. 

  415. #endif