PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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  1. /* OctoWS2811 - High Performance WS2811 LED Display Library
  2. http://www.pjrc.com/teensy/td_libs_OctoWS2811.html
  3. Copyright (c) 2013 Paul Stoffregen, PJRC.COM, LLC
  4. Some Teensy-LC support contributed by Mark Baysinger.
  5. https://forum.pjrc.com/threads/40863-Teensy-LC-port-of-OctoWS2811
  6. Permission is hereby granted, free of charge, to any person obtaining a copy
  7. of this software and associated documentation files (the "Software"), to deal
  8. in the Software without restriction, including without limitation the rights
  9. to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. copies of the Software, and to permit persons to whom the Software is
  11. furnished to do so, subject to the following conditions:
  12. The above copyright notice and this permission notice shall be included in
  13. all copies or substantial portions of the Software.
  14. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  17. AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18. LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19. OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20. THE SOFTWARE.
  21. */
  22. #include <Arduino.h>
  23. #include "OctoWS2811.h"
  24. #if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__)
  25. uint16_t OctoWS2811::stripLen;
  26. void * OctoWS2811::frameBuffer;
  27. void * OctoWS2811::drawBuffer;
  28. uint8_t OctoWS2811::params;
  29. DMAChannel OctoWS2811::dma1;
  30. DMAChannel OctoWS2811::dma2;
  31. DMAChannel OctoWS2811::dma3;
  32. static uint8_t ones = 0xFF;
  33. static volatile uint8_t update_in_progress = 0;
  34. static uint32_t update_completed_at = 0;
  35. OctoWS2811::OctoWS2811(uint32_t numPerStrip, void *frameBuf, void *drawBuf, uint8_t config)
  36. {
  37. stripLen = numPerStrip;
  38. frameBuffer = frameBuf;
  39. drawBuffer = drawBuf;
  40. params = config;
  41. }
  42. // Waveform timing: these set the high time for a 0 and 1 bit, as a fraction of
  43. // the total 800 kHz or 400 kHz clock cycle. The scale is 0 to 255. The Worldsemi
  44. // datasheet seems T1H should be 600 ns of a 1250 ns cycle, or 48%. That may
  45. // erroneous information? Other sources reason the chip actually samples the
  46. // line close to the center of each bit time, so T1H should be 80% if TOH is 20%.
  47. // The chips appear to work based on a simple one-shot delay triggered by the
  48. // rising edge. At least 1 chip tested retransmits 0 as a 330 ns pulse (26%) and
  49. // a 1 as a 660 ns pulse (53%). Perhaps it's actually sampling near 500 ns?
  50. // There doesn't seem to be any advantage to making T1H less, as long as there
  51. // is sufficient low time before the end of the cycle, so the next rising edge
  52. // can be detected. T0H has been lengthened slightly, because the pulse can
  53. // narrow if the DMA controller has extra latency during bus arbitration. If you
  54. // have an insight about tuning these parameters AND you have actually tested on
  55. // real LED strips, please contact paul@pjrc.com. Please do not email based only
  56. // on reading the datasheets and purely theoretical analysis.
  57. #define WS2811_TIMING_T0H 60
  58. #define WS2811_TIMING_T1H 176
  59. // Discussion about timing and flicker & color shift issues:
  60. // http://forum.pjrc.com/threads/23877-WS2812B-compatible-with-OctoWS2811-library?p=38190&viewfull=1#post38190
  61. void OctoWS2811::begin(uint32_t numPerStrip, void *frameBuf, void *drawBuf, uint8_t config)
  62. {
  63. stripLen = numPerStrip;
  64. frameBuffer = frameBuf;
  65. drawBuffer = drawBuf;
  66. params = config;
  67. begin();
  68. }
  69. void OctoWS2811::begin(void)
  70. {
  71. uint32_t bufsize, frequency;
  72. bufsize = stripLen*24;
  73. // set up the buffers
  74. memset(frameBuffer, 0, bufsize);
  75. if (drawBuffer) {
  76. memset(drawBuffer, 0, bufsize);
  77. } else {
  78. drawBuffer = frameBuffer;
  79. }
  80. // configure the 8 output pins
  81. GPIOD_PCOR = 0xFF;
  82. pinMode(2, OUTPUT); // strip #1
  83. pinMode(14, OUTPUT); // strip #2
  84. pinMode(7, OUTPUT); // strip #3
  85. pinMode(8, OUTPUT); // strip #4
  86. pinMode(6, OUTPUT); // strip #5
  87. pinMode(20, OUTPUT); // strip #6
  88. pinMode(21, OUTPUT); // strip #7
  89. pinMode(5, OUTPUT); // strip #8
  90. // create the two waveforms for WS2811 low and high bits
  91. switch (params & 0xF0) {
  92. case WS2811_400kHz:
  93. frequency = 400000;
  94. break;
  95. case WS2811_800kHz:
  96. frequency = 800000;
  97. break;
  98. case WS2813_800kHz:
  99. frequency = 800000;
  100. break;
  101. default:
  102. frequency = 800000;
  103. }
  104. #if defined(__MK20DX128__)
  105. FTM1_SC = 0;
  106. FTM1_CNT = 0;
  107. uint32_t mod = (F_BUS + frequency / 2) / frequency;
  108. FTM1_MOD = mod - 1;
  109. FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
  110. FTM1_C0SC = 0x69;
  111. FTM1_C1SC = 0x69;
  112. FTM1_C0V = (mod * WS2811_TIMING_T0H) >> 8;
  113. FTM1_C1V = (mod * WS2811_TIMING_T1H) >> 8;
  114. // pin 16 triggers DMA(port B) on rising edge
  115. CORE_PIN16_CONFIG = PORT_PCR_IRQC(1)|PORT_PCR_MUX(3);
  116. //CORE_PIN4_CONFIG = PORT_PCR_MUX(3); // testing only
  117. #elif defined(__MK20DX256__)
  118. FTM2_SC = 0;
  119. FTM2_CNT = 0;
  120. uint32_t mod = (F_BUS + frequency / 2) / frequency;
  121. FTM2_MOD = mod - 1;
  122. FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
  123. FTM2_C0SC = 0x69;
  124. FTM2_C1SC = 0x69;
  125. FTM2_C0V = (mod * WS2811_TIMING_T0H) >> 8;
  126. FTM2_C1V = (mod * WS2811_TIMING_T1H) >> 8;
  127. // pin 32 is FTM2_CH0, PTB18, triggers DMA(port B) on rising edge
  128. // pin 25 is FTM2_CH1, PTB19
  129. CORE_PIN32_CONFIG = PORT_PCR_IRQC(1)|PORT_PCR_MUX(3);
  130. //CORE_PIN25_CONFIG = PORT_PCR_MUX(3); // testing only
  131. #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
  132. FTM2_SC = 0;
  133. FTM2_CNT = 0;
  134. uint32_t mod = (F_BUS + frequency / 2) / frequency;
  135. FTM2_MOD = mod - 1;
  136. FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
  137. FTM2_C0SC = 0x69;
  138. FTM2_C1SC = 0x69;
  139. FTM2_C0V = (mod * WS2811_TIMING_T0H) >> 8;
  140. FTM2_C1V = (mod * WS2811_TIMING_T1H) >> 8;
  141. // FTM2_CH0, PTA10 (not connected), triggers DMA(port A) on rising edge
  142. PORTA_PCR10 = PORT_PCR_IRQC(1)|PORT_PCR_MUX(3);
  143. #elif defined(__MKL26Z64__)
  144. FTM2_SC = 0;
  145. FTM2_CNT = 0;
  146. uint32_t mod = F_CPU / frequency;
  147. FTM2_MOD = mod - 1;
  148. FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
  149. FTM2_C0SC = FTM_CSC_CHF | FTM_CSC_MSB | FTM_CSC_ELSB;
  150. FTM2_C1SC = FTM_CSC_CHF | FTM_CSC_MSB | FTM_CSC_ELSB;
  151. TPM2_C0V = mod - ((mod * WS2811_TIMING_T1H) >> 8);
  152. TPM2_C1V = mod - ((mod * WS2811_TIMING_T1H) >> 8) + ((mod * WS2811_TIMING_T0H) >> 8);
  153. #endif
  154. // DMA channel #1 sets WS2811 high at the beginning of each cycle
  155. dma1.source(ones);
  156. dma1.destination(GPIOD_PSOR);
  157. dma1.transferSize(1);
  158. dma1.transferCount(bufsize);
  159. dma1.disableOnCompletion();
  160. // DMA channel #2 writes the pixel data at 23% of the cycle
  161. dma2.sourceBuffer((uint8_t *)frameBuffer, bufsize);
  162. dma2.destination(GPIOD_PDOR);
  163. dma2.transferSize(1);
  164. dma2.transferCount(bufsize);
  165. dma2.disableOnCompletion();
  166. // DMA channel #3 clear all the pins low at 69% of the cycle
  167. dma3.source(ones);
  168. dma3.destination(GPIOD_PCOR);
  169. dma3.transferSize(1);
  170. dma3.transferCount(bufsize);
  171. dma3.disableOnCompletion();
  172. dma3.interruptAtCompletion();
  173. #if defined(__MK20DX128__)
  174. // route the edge detect interrupts to trigger the 3 channels
  175. dma1.triggerAtHardwareEvent(DMAMUX_SOURCE_PORTB);
  176. dma2.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM1_CH0);
  177. dma3.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM1_CH1);
  178. DMAPriorityOrder(dma3, dma2, dma1);
  179. #elif defined(__MK20DX256__)
  180. // route the edge detect interrupts to trigger the 3 channels
  181. dma1.triggerAtHardwareEvent(DMAMUX_SOURCE_PORTB);
  182. dma2.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM2_CH0);
  183. dma3.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM2_CH1);
  184. DMAPriorityOrder(dma3, dma2, dma1);
  185. #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
  186. // route the edge detect interrupts to trigger the 3 channels
  187. dma1.triggerAtHardwareEvent(DMAMUX_SOURCE_PORTA);
  188. dma2.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM2_CH0);
  189. dma3.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM2_CH1);
  190. DMAPriorityOrder(dma3, dma2, dma1);
  191. #elif defined(__MKL26Z64__)
  192. // route the timer interrupts to trigger the 3 channels
  193. dma1.triggerAtHardwareEvent(DMAMUX_SOURCE_TPM2_CH0);
  194. dma2.triggerAtHardwareEvent(DMAMUX_SOURCE_TPM2_CH1);
  195. dma3.triggerAtHardwareEvent(DMAMUX_SOURCE_FTM2_OV);
  196. #endif
  197. // enable a done interrupts when channel #3 completes
  198. dma3.attachInterrupt(isr);
  199. //pinMode(9, OUTPUT); // testing: oscilloscope trigger
  200. }
  201. void OctoWS2811::isr(void)
  202. {
  203. //digitalWriteFast(9, HIGH);
  204. //Serial1.print(".");
  205. //Serial1.println(dma3.CFG->DCR, HEX);
  206. //Serial1.print(dma3.CFG->DSR_BCR > 24, HEX);
  207. dma3.clearInterrupt();
  208. #if defined(__MKL26Z64__)
  209. GPIOD_PCOR = 0xFF;
  210. #endif
  211. //Serial1.print("*");
  212. update_completed_at = micros();
  213. update_in_progress = 0;
  214. //digitalWriteFast(9, LOW);
  215. }
  216. int OctoWS2811::busy(void)
  217. {
  218. if (update_in_progress) return 1;
  219. // busy for 50 (or 300 for ws2813) us after the done interrupt, for WS2811 reset
  220. if (micros() - update_completed_at < 300) return 1;
  221. return 0;
  222. }
  223. void OctoWS2811::show(void)
  224. {
  225. // wait for any prior DMA operation
  226. //Serial1.print("1");
  227. while (update_in_progress) ;
  228. //Serial1.print("2");
  229. // it's ok to copy the drawing buffer to the frame buffer
  230. // during the 50us WS2811 reset time
  231. if (drawBuffer != frameBuffer) {
  232. // TODO: this could be faster with DMA, especially if the
  233. // buffers are 32 bit aligned... but does it matter?
  234. memcpy(frameBuffer, drawBuffer, stripLen * 24);
  235. }
  236. // wait for WS2811 reset
  237. while (micros() - update_completed_at < 300) ;
  238. // ok to start, but we must be very careful to begin
  239. // without any prior 3 x 800kHz DMA requests pending
  240. #if defined(__MK20DX128__)
  241. uint32_t cv = FTM1_C0V;
  242. noInterrupts();
  243. // CAUTION: this code is timing critical.
  244. while (FTM1_CNT <= cv) ;
  245. while (FTM1_CNT > cv) ; // wait for beginning of an 800 kHz cycle
  246. while (FTM1_CNT < cv) ;
  247. FTM1_SC = 0; // stop FTM1 timer (hopefully before it rolls over)
  248. FTM1_CNT = 0;
  249. update_in_progress = 1;
  250. //digitalWriteFast(9, HIGH); // oscilloscope trigger
  251. PORTB_ISFR = (1<<0); // clear any prior rising edge
  252. uint32_t tmp __attribute__((unused));
  253. FTM1_C0SC = 0x28;
  254. tmp = FTM1_C0SC; // clear any prior timer DMA triggers
  255. FTM1_C0SC = 0x69;
  256. FTM1_C1SC = 0x28;
  257. tmp = FTM1_C1SC;
  258. FTM1_C1SC = 0x69;
  259. dma1.enable();
  260. dma2.enable(); // enable all 3 DMA channels
  261. dma3.enable();
  262. FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0); // restart FTM1 timer
  263. //digitalWriteFast(9, LOW);
  264. #elif defined(__MK20DX256__)
  265. FTM2_C0SC = 0x28;
  266. FTM2_C1SC = 0x28;
  267. uint32_t cv = FTM2_C0V;
  268. noInterrupts();
  269. // CAUTION: this code is timing critical.
  270. while (FTM2_CNT <= cv) ;
  271. while (FTM2_CNT > cv) ; // wait for beginning of an 800 kHz cycle
  272. while (FTM2_CNT < cv) ;
  273. FTM2_SC = 0; // stop FTM2 timer (hopefully before it rolls over)
  274. FTM2_CNT = 0;
  275. update_in_progress = 1;
  276. //digitalWriteFast(9, HIGH); // oscilloscope trigger
  277. PORTB_ISFR = (1<<18); // clear any prior rising edge
  278. uint32_t tmp __attribute__((unused));
  279. FTM2_C0SC = 0x28;
  280. tmp = FTM2_C0SC; // clear any prior timer DMA triggers
  281. FTM2_C0SC = 0x69;
  282. FTM2_C1SC = 0x28;
  283. tmp = FTM2_C1SC;
  284. FTM2_C1SC = 0x69;
  285. dma1.enable();
  286. dma2.enable(); // enable all 3 DMA channels
  287. dma3.enable();
  288. FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0); // restart FTM2 timer
  289. //digitalWriteFast(9, LOW);
  290. #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
  291. FTM2_C0SC = 0x28;
  292. FTM2_C1SC = 0x28;
  293. uint32_t cv = FTM2_C1V;
  294. noInterrupts();
  295. // CAUTION: this code is timing critical.
  296. while (FTM2_CNT <= cv) ;
  297. while (FTM2_CNT > cv) ; // wait for beginning of an 800 kHz cycle
  298. while (FTM2_CNT < cv) ;
  299. FTM2_SC = 0; // stop FTM2 timer (hopefully before it rolls over)
  300. FTM2_CNT = 0;
  301. update_in_progress = 1;
  302. //digitalWriteFast(9, HIGH); // oscilloscope trigger
  303. #if defined(__MK64FX512__)
  304. asm("nop");
  305. #endif
  306. PORTA_ISFR = (1<<10); // clear any prior rising edge
  307. uint32_t tmp __attribute__((unused));
  308. FTM2_C0SC = 0x28;
  309. tmp = FTM2_C0SC; // clear any prior timer DMA triggers
  310. FTM2_C0SC = 0x69;
  311. FTM2_C1SC = 0x28;
  312. tmp = FTM2_C1SC;
  313. FTM2_C1SC = 0x69;
  314. dma1.enable();
  315. dma2.enable(); // enable all 3 DMA channels
  316. dma3.enable();
  317. FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0); // restart FTM2 timer
  318. //digitalWriteFast(9, LOW);
  319. #elif defined(__MKL26Z64__)
  320. uint32_t sc __attribute__((unused)) = FTM2_SC;
  321. uint32_t cv = FTM2_C1V;
  322. noInterrupts();
  323. while (FTM2_CNT <= cv) ;
  324. while (FTM2_CNT > cv) ; // wait for beginning of an 800 kHz cycle
  325. while (FTM2_CNT < cv) ;
  326. FTM2_SC = 0; // stop FTM2 timer (hopefully before it rolls over)
  327. update_in_progress = 1;
  328. //digitalWriteFast(9, HIGH); // oscilloscope trigger
  329. dma1.clearComplete();
  330. dma2.clearComplete();
  331. dma3.clearComplete();
  332. uint32_t bufsize = stripLen*24;
  333. dma1.transferCount(bufsize);
  334. dma2.transferCount(bufsize);
  335. dma3.transferCount(bufsize);
  336. dma2.sourceBuffer((uint8_t *)frameBuffer, bufsize);
  337. // clear any pending event flags
  338. FTM2_SC = FTM_SC_TOF;
  339. FTM2_C0SC = FTM_CSC_CHF | FTM_CSC_MSB | FTM_CSC_ELSB | FTM_CSC_DMA;
  340. FTM2_C1SC = FTM_CSC_CHF | FTM_CSC_MSB | FTM_CSC_ELSB | FTM_CSC_DMA;
  341. // clear any prior pending DMA requests
  342. dma1.enable();
  343. dma2.enable(); // enable all 3 DMA channels
  344. dma3.enable();
  345. FTM2_CNT = 0; // writing any value resets counter
  346. FTM2_SC = FTM_SC_DMA | FTM_SC_CLKS(1) | FTM_SC_PS(0);
  347. //digitalWriteFast(9, LOW);
  348. #endif
  349. //Serial1.print("3");
  350. interrupts();
  351. //Serial1.print("4");
  352. }
  353. void OctoWS2811::setPixel(uint32_t num, int color)
  354. {
  355. uint32_t strip, offset, mask32, *p;
  356. switch (params & 7) {
  357. case WS2811_RBG:
  358. color = (color&0xFF0000) | ((color<<8)&0x00FF00) | ((color>>8)&0x0000FF);
  359. break;
  360. case WS2811_GRB:
  361. color = ((color<<8)&0xFF0000) | ((color>>8)&0x00FF00) | (color&0x0000FF);
  362. break;
  363. case WS2811_GBR:
  364. color = ((color<<16)&0xFF0000) | ((color>>8)&0x00FFFF);
  365. break;
  366. case WS2811_BRG:
  367. color = ((color<<8)&0xFFFF00) | ((color>>16)&0x0000FF);
  368. break;
  369. case WS2811_BGR:
  370. color = ((color<<16)&0xFF0000) | (color&0x00FF00) | ((color>>16)&0x0000FF);
  371. break;
  372. default:
  373. break;
  374. }
  375. strip = num / stripLen; // Cortex-M4 has 2 cycle unsigned divide :-)
  376. offset = num % stripLen;
  377. p = ((uint32_t *) drawBuffer) + offset * 6;
  378. mask32 = (0x01010101) << strip;
  379. // Set bytes 0-3
  380. *p &= ~mask32;
  381. *p |= (((color & 0x800000) >> 23) | ((color & 0x400000) >> 14) | ((color & 0x200000) >> 5) | ((color & 0x100000) << 4)) << strip;
  382. // Set bytes 4-7
  383. *++p &= ~mask32;
  384. *p |= (((color & 0x80000) >> 19) | ((color & 0x40000) >> 10) | ((color & 0x20000) >> 1) | ((color & 0x10000) << 8)) << strip;
  385. // Set bytes 8-11
  386. *++p &= ~mask32;
  387. *p |= (((color & 0x8000) >> 15) | ((color & 0x4000) >> 6) | ((color & 0x2000) << 3) | ((color & 0x1000) << 12)) << strip;
  388. // Set bytes 12-15
  389. *++p &= ~mask32;
  390. *p |= (((color & 0x800) >> 11) | ((color & 0x400) >> 2) | ((color & 0x200) << 7) | ((color & 0x100) << 16)) << strip;
  391. // Set bytes 16-19
  392. *++p &= ~mask32;
  393. *p |= (((color & 0x80) >> 7) | ((color & 0x40) << 2) | ((color & 0x20) << 11) | ((color & 0x10) << 20)) << strip;
  394. // Set bytes 20-23
  395. *++p &= ~mask32;
  396. *p |= (((color & 0x8) >> 3) | ((color & 0x4) << 6) | ((color & 0x2) << 15) | ((color & 0x1) << 24)) << strip;
  397. }
  398. int OctoWS2811::getPixel(uint32_t num)
  399. {
  400. uint32_t strip, offset, mask;
  401. uint8_t bit, *p;
  402. int color=0;
  403. strip = num / stripLen;
  404. offset = num % stripLen;
  405. bit = (1<<strip);
  406. p = ((uint8_t *)drawBuffer) + offset * 24;
  407. for (mask = (1<<23) ; mask ; mask >>= 1) {
  408. if (*p++ & bit) color |= mask;
  409. }
  410. switch (params & 7) {
  411. case WS2811_RBG:
  412. color = (color&0xFF0000) | ((color<<8)&0x00FF00) | ((color>>8)&0x0000FF);
  413. break;
  414. case WS2811_GRB:
  415. color = ((color<<8)&0xFF0000) | ((color>>8)&0x00FF00) | (color&0x0000FF);
  416. break;
  417. case WS2811_GBR:
  418. color = ((color<<8)&0xFFFF00) | ((color>>16)&0x0000FF);
  419. break;
  420. case WS2811_BRG:
  421. color = ((color<<16)&0xFF0000) | ((color>>8)&0x00FFFF);
  422. break;
  423. case WS2811_BGR:
  424. color = ((color<<16)&0xFF0000) | (color&0x00FF00) | ((color>>16)&0x0000FF);
  425. break;
  426. default:
  427. break;
  428. }
  429. return color;
  430. }
  431. #endif // supported boards