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PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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framework-arduinoteensy-cxx20/libraries/OneWire/util/OneWire_direct_gpio.h

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Ham Bahset Geçmiş 

  1. #ifndef OneWire_Direct_GPIO_h

  2. #define OneWire_Direct_GPIO_h

  3. 

  4. // This header should ONLY be included by OneWire.cpp.  These defines are

  5. // meant to be private, used within OneWire.cpp, but not exposed to Arduino

  6. // sketches or other libraries which may include OneWire.h.

  7. 

  8. #include <stdint.h>

  9. 

  10. // Platform specific I/O definitions

  11. 

  12. #if defined(__AVR__)

  13. #define PIN_TO_BASEREG(pin)             (portInputRegister(digitalPinToPort(pin)))

  14. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  15. #define IO_REG_TYPE uint8_t

  16. #define IO_REG_BASE_ATTR asm("r30")

  17. #define IO_REG_MASK_ATTR

  18. #if defined(__AVR_ATmega4809__)

  19. #define DIRECT_READ(base, mask)         (((*(base)) & (mask)) ? 1 : 0)

  20. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)-8)) &= ~(mask))

  21. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)-8)) |= (mask))

  22. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)-4)) &= ~(mask))

  23. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)-4)) |= (mask))

  24. #else

  25. #define DIRECT_READ(base, mask)         (((*(base)) & (mask)) ? 1 : 0)

  26. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+1)) &= ~(mask))

  27. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+1)) |= (mask))

  28. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+2)) &= ~(mask))

  29. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+2)) |= (mask))

  30. #endif

  31. 

  32. #elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__)

  33. #define PIN_TO_BASEREG(pin)             (portOutputRegister(pin))

  34. #define PIN_TO_BITMASK(pin)             (1)

  35. #define IO_REG_TYPE uint8_t

  36. #define IO_REG_BASE_ATTR

  37. #define IO_REG_MASK_ATTR __attribute__ ((unused))

  38. #define DIRECT_READ(base, mask)         (*((base)+512))

  39. #define DIRECT_MODE_INPUT(base, mask)   (*((base)+640) = 0)

  40. #define DIRECT_MODE_OUTPUT(base, mask)  (*((base)+640) = 1)

  41. #define DIRECT_WRITE_LOW(base, mask)    (*((base)+256) = 1)

  42. #define DIRECT_WRITE_HIGH(base, mask)   (*((base)+128) = 1)

  43. 

  44. #elif defined(__MKL26Z64__)

  45. #define PIN_TO_BASEREG(pin)             (portOutputRegister(pin))

  46. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  47. #define IO_REG_TYPE uint8_t

  48. #define IO_REG_BASE_ATTR

  49. #define IO_REG_MASK_ATTR

  50. #define DIRECT_READ(base, mask)         ((*((base)+16) & (mask)) ? 1 : 0)

  51. #define DIRECT_MODE_INPUT(base, mask)   (*((base)+20) &= ~(mask))

  52. #define DIRECT_MODE_OUTPUT(base, mask)  (*((base)+20) |= (mask))

  53. #define DIRECT_WRITE_LOW(base, mask)    (*((base)+8) = (mask))

  54. #define DIRECT_WRITE_HIGH(base, mask)   (*((base)+4) = (mask))

  55. 

  56. #elif defined(__IMXRT1052__) || defined(__IMXRT1062__)

  57. #define PIN_TO_BASEREG(pin)             (portOutputRegister(pin))

  58. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  59. #define IO_REG_TYPE uint32_t

  60. #define IO_REG_BASE_ATTR

  61. #define IO_REG_MASK_ATTR

  62. #define DIRECT_READ(base, mask)         ((*((base)+2) & (mask)) ? 1 : 0)

  63. #define DIRECT_MODE_INPUT(base, mask)   (*((base)+1) &= ~(mask))

  64. #define DIRECT_MODE_OUTPUT(base, mask)  (*((base)+1) |= (mask))

  65. #define DIRECT_WRITE_LOW(base, mask)    (*((base)+34) = (mask))

  66. #define DIRECT_WRITE_HIGH(base, mask)   (*((base)+33) = (mask))

  67. 

  68. #elif defined(__SAM3X8E__) || defined(__SAM3A8C__) || defined(__SAM3A4C__)

  69. // Arduino 1.5.1 may have a bug in delayMicroseconds() on Arduino Due.

  70. // http://arduino.cc/forum/index.php/topic,141030.msg1076268.html#msg1076268

  71. // If you have trouble with OneWire on Arduino Due, please check the

  72. // status of delayMicroseconds() before reporting a bug in OneWire!

  73. #define PIN_TO_BASEREG(pin)             (&(digitalPinToPort(pin)->PIO_PER))

  74. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  75. #define IO_REG_TYPE uint32_t

  76. #define IO_REG_BASE_ATTR

  77. #define IO_REG_MASK_ATTR

  78. #define DIRECT_READ(base, mask)         (((*((base)+15)) & (mask)) ? 1 : 0)

  79. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+5)) = (mask))

  80. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+4)) = (mask))

  81. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+13)) = (mask))

  82. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+12)) = (mask))

  83. #ifndef PROGMEM

  84. #define PROGMEM

  85. #endif

  86. #ifndef pgm_read_byte

  87. #define pgm_read_byte(addr) (*(const uint8_t *)(addr))

  88. #endif

  89. 

  90. #elif defined(__PIC32MX__)

  91. #define PIN_TO_BASEREG(pin)             (portModeRegister(digitalPinToPort(pin)))

  92. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  93. #define IO_REG_TYPE uint32_t

  94. #define IO_REG_BASE_ATTR

  95. #define IO_REG_MASK_ATTR

  96. #define DIRECT_READ(base, mask)         (((*(base+4)) & (mask)) ? 1 : 0)  //PORTX + 0x10

  97. #define DIRECT_MODE_INPUT(base, mask)   ((*(base+2)) = (mask))            //TRISXSET + 0x08

  98. #define DIRECT_MODE_OUTPUT(base, mask)  ((*(base+1)) = (mask))            //TRISXCLR + 0x04

  99. #define DIRECT_WRITE_LOW(base, mask)    ((*(base+8+1)) = (mask))          //LATXCLR  + 0x24

  100. #define DIRECT_WRITE_HIGH(base, mask)   ((*(base+8+2)) = (mask))          //LATXSET + 0x28

  101. 

  102. #elif defined(ARDUINO_ARCH_ESP8266)

  103. // Special note: I depend on the ESP community to maintain these definitions and

  104. // submit good pull requests.  I can not answer any ESP questions or help you

  105. // resolve any problems related to ESP chips.  Please do not contact me and please

  106. // DO NOT CREATE GITHUB ISSUES for ESP support.  All ESP questions must be asked

  107. // on ESP community forums.

  108. #define PIN_TO_BASEREG(pin)             ((volatile uint32_t*) GPO)

  109. #define PIN_TO_BITMASK(pin)             (1 << pin)

  110. #define IO_REG_TYPE uint32_t

  111. #define IO_REG_BASE_ATTR

  112. #define IO_REG_MASK_ATTR

  113. #define DIRECT_READ(base, mask)         ((GPI & (mask)) ? 1 : 0)    //GPIO_IN_ADDRESS

  114. #define DIRECT_MODE_INPUT(base, mask)   (GPE &= ~(mask))            //GPIO_ENABLE_W1TC_ADDRESS

  115. #define DIRECT_MODE_OUTPUT(base, mask)  (GPE |= (mask))             //GPIO_ENABLE_W1TS_ADDRESS

  116. #define DIRECT_WRITE_LOW(base, mask)    (GPOC = (mask))             //GPIO_OUT_W1TC_ADDRESS

  117. #define DIRECT_WRITE_HIGH(base, mask)   (GPOS = (mask))             //GPIO_OUT_W1TS_ADDRESS

  118. 

  119. #elif defined(ARDUINO_ARCH_ESP32)

  120. #include <driver/rtc_io.h>

  121. #define PIN_TO_BASEREG(pin)             (0)

  122. #define PIN_TO_BITMASK(pin)             (pin)

  123. #define IO_REG_TYPE uint32_t

  124. #define IO_REG_BASE_ATTR

  125. #define IO_REG_MASK_ATTR

  126. 

  127. static inline __attribute__((always_inline))

  128. IO_REG_TYPE directRead(IO_REG_TYPE pin)

  129. {

  130.     if ( pin < 32 )

  131.         return (GPIO.in >> pin) & 0x1;

  132.     else if ( pin < 40 )

  133.         return (GPIO.in1.val >> (pin - 32)) & 0x1;

  134. 

  135.     return 0;

  136. }

  137. 

  138. static inline __attribute__((always_inline))

  139. void directWriteLow(IO_REG_TYPE pin)

  140. {

  141.     if ( pin < 32 )

  142.         GPIO.out_w1tc = ((uint32_t)1 << pin);

  143.     else if ( pin < 34 )

  144.         GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));

  145. }

  146. 

  147. static inline __attribute__((always_inline))

  148. void directWriteHigh(IO_REG_TYPE pin)

  149. {

  150.     if ( pin < 32 )

  151.         GPIO.out_w1ts = ((uint32_t)1 << pin);

  152.     else if ( pin < 34 )

  153.         GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));

  154. }

  155. 

  156. static inline __attribute__((always_inline))

  157. void directModeInput(IO_REG_TYPE pin)

  158. {

  159.     if ( digitalPinIsValid(pin) )

  160.     {

  161.         uint32_t rtc_reg(rtc_gpio_desc[pin].reg);

  162. 

  163.         if ( rtc_reg ) // RTC pins PULL settings

  164.         {

  165.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);

  166.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);

  167.         }

  168. 

  169.         if ( pin < 32 )

  170.             GPIO.enable_w1tc = ((uint32_t)1 << pin);

  171.         else

  172.             GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));

  173. 

  174.         uint32_t pinFunction((uint32_t)2 << FUN_DRV_S); // what are the drivers?

  175.         pinFunction |= FUN_IE; // input enable but required for output as well?

  176.         pinFunction |= ((uint32_t)2 << MCU_SEL_S);

  177. 

  178.         ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;

  179. 

  180.         GPIO.pin[pin].val = 0;

  181.     }

  182. }

  183. 

  184. static inline __attribute__((always_inline))

  185. void directModeOutput(IO_REG_TYPE pin)

  186. {

  187.     if ( digitalPinIsValid(pin) && pin <= 33 ) // pins above 33 can be only inputs

  188.     {

  189.         uint32_t rtc_reg(rtc_gpio_desc[pin].reg);

  190. 

  191.         if ( rtc_reg ) // RTC pins PULL settings

  192.         {

  193.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);

  194.             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);

  195.         }

  196. 

  197.         if ( pin < 32 )

  198.             GPIO.enable_w1ts = ((uint32_t)1 << pin);

  199.         else // already validated to pins <= 33

  200.             GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));

  201. 

  202.         uint32_t pinFunction((uint32_t)2 << FUN_DRV_S); // what are the drivers?

  203.         pinFunction |= FUN_IE; // input enable but required for output as well?

  204.         pinFunction |= ((uint32_t)2 << MCU_SEL_S);

  205. 

  206.         ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = pinFunction;

  207. 

  208.         GPIO.pin[pin].val = 0;

  209.     }

  210. }

  211. 

  212. #define DIRECT_READ(base, pin)          directRead(pin)

  213. #define DIRECT_WRITE_LOW(base, pin)     directWriteLow(pin)

  214. #define DIRECT_WRITE_HIGH(base, pin)    directWriteHigh(pin)

  215. #define DIRECT_MODE_INPUT(base, pin)    directModeInput(pin)

  216. #define DIRECT_MODE_OUTPUT(base, pin)   directModeOutput(pin)

  217. // https://github.com/PaulStoffregen/OneWire/pull/47

  218. // https://github.com/stickbreaker/OneWire/commit/6eb7fc1c11a15b6ac8c60e5671cf36eb6829f82c

  219. #ifdef  interrupts

  220. #undef  interrupts

  221. #endif

  222. #ifdef  noInterrupts

  223. #undef  noInterrupts

  224. #endif

  225. #define noInterrupts() {portMUX_TYPE mux = portMUX_INITIALIZER_UNLOCKED;portENTER_CRITICAL(&mux)

  226. #define interrupts() portEXIT_CRITICAL(&mux);}

  227. //#warning "ESP32 OneWire testing"

  228. 

  229. #elif defined(ARDUINO_ARCH_STM32)

  230. #define PIN_TO_BASEREG(pin)             (0)

  231. #define PIN_TO_BITMASK(pin)             ((uint32_t)digitalPinToPinName(pin))

  232. #define IO_REG_TYPE uint32_t

  233. #define IO_REG_BASE_ATTR

  234. #define IO_REG_MASK_ATTR

  235. #define DIRECT_READ(base, pin)          digitalReadFast((PinName)pin)

  236. #define DIRECT_WRITE_LOW(base, pin)     digitalWriteFast((PinName)pin, LOW)

  237. #define DIRECT_WRITE_HIGH(base, pin)    digitalWriteFast((PinName)pin, HIGH)

  238. #define DIRECT_MODE_INPUT(base, pin)    pin_function((PinName)pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0))

  239. #define DIRECT_MODE_OUTPUT(base, pin)   pin_function((PinName)pin, STM_PIN_DATA(STM_MODE_OUTPUT_PP, GPIO_NOPULL, 0))

  240. 

  241. #elif defined(__SAMD21G18A__)

  242. #define PIN_TO_BASEREG(pin)             portModeRegister(digitalPinToPort(pin))

  243. #define PIN_TO_BITMASK(pin)             (digitalPinToBitMask(pin))

  244. #define IO_REG_TYPE uint32_t

  245. #define IO_REG_BASE_ATTR

  246. #define IO_REG_MASK_ATTR

  247. #define DIRECT_READ(base, mask)         (((*((base)+8)) & (mask)) ? 1 : 0)

  248. #define DIRECT_MODE_INPUT(base, mask)   ((*((base)+1)) = (mask))

  249. #define DIRECT_MODE_OUTPUT(base, mask)  ((*((base)+2)) = (mask))

  250. #define DIRECT_WRITE_LOW(base, mask)    ((*((base)+5)) = (mask))

  251. #define DIRECT_WRITE_HIGH(base, mask)   ((*((base)+6)) = (mask))

  252. 

  253. #elif defined(__ASR6501__)

  254. #define PIN_IN_PORT(pin)    (pin % PIN_NUMBER_IN_PORT)

  255. #define PORT_FROM_PIN(pin)  (pin / PIN_NUMBER_IN_PORT)

  256. #define PORT_OFFSET(port)   (PORT_REG_SHFIT * port)

  257. #define PORT_ADDRESS(pin)   (CYDEV_GPIO_BASE + PORT_OFFSET(PORT_FROM_PIN(pin)))

  258. 

  259. #define PIN_TO_BASEREG(pin)             (0)

  260. #define PIN_TO_BITMASK(pin)             (pin)

  261. #define IO_REG_TYPE uint32_t

  262. #define IO_REG_BASE_ATTR

  263. #define IO_REG_MASK_ATTR

  264. #define DIRECT_READ(base, pin)          CY_SYS_PINS_READ_PIN(PORT_ADDRESS(pin)+4, PIN_IN_PORT(pin))

  265. #define DIRECT_WRITE_LOW(base, pin)     CY_SYS_PINS_CLEAR_PIN(PORT_ADDRESS(pin), PIN_IN_PORT(pin))

  266. #define DIRECT_WRITE_HIGH(base, pin)    CY_SYS_PINS_SET_PIN(PORT_ADDRESS(pin), PIN_IN_PORT(pin))

  267. #define DIRECT_MODE_INPUT(base, pin)    CY_SYS_PINS_SET_DRIVE_MODE(PORT_ADDRESS(pin)+8, PIN_IN_PORT(pin), CY_SYS_PINS_DM_DIG_HIZ)

  268. #define DIRECT_MODE_OUTPUT(base, pin)   CY_SYS_PINS_SET_DRIVE_MODE(PORT_ADDRESS(pin)+8, PIN_IN_PORT(pin), CY_SYS_PINS_DM_STRONG)

  269. 

  270. #elif defined(RBL_NRF51822)

  271. #define PIN_TO_BASEREG(pin)             (0)

  272. #define PIN_TO_BITMASK(pin)             (pin)

  273. #define IO_REG_TYPE uint32_t

  274. #define IO_REG_BASE_ATTR

  275. #define IO_REG_MASK_ATTR

  276. #define DIRECT_READ(base, pin)          nrf_gpio_pin_read(pin)

  277. #define DIRECT_WRITE_LOW(base, pin)     nrf_gpio_pin_clear(pin)

  278. #define DIRECT_WRITE_HIGH(base, pin)    nrf_gpio_pin_set(pin)

  279. #define DIRECT_MODE_INPUT(base, pin)    nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL)

  280. #define DIRECT_MODE_OUTPUT(base, pin)   nrf_gpio_cfg_output(pin)

  281. 

  282. #elif defined(__arc__) /* Arduino101/Genuino101 specifics */

  283. 

  284. #include "scss_registers.h"

  285. #include "portable.h"

  286. #include "avr/pgmspace.h"

  287. 

  288. #define GPIO_ID(pin)			(g_APinDescription[pin].ulGPIOId)

  289. #define GPIO_TYPE(pin)			(g_APinDescription[pin].ulGPIOType)

  290. #define GPIO_BASE(pin)			(g_APinDescription[pin].ulGPIOBase)

  291. #define DIR_OFFSET_SS			0x01

  292. #define DIR_OFFSET_SOC			0x04

  293. #define EXT_PORT_OFFSET_SS		0x0A

  294. #define EXT_PORT_OFFSET_SOC		0x50

  295. 

  296. /* GPIO registers base address */

  297. #define PIN_TO_BASEREG(pin)		((volatile uint32_t *)g_APinDescription[pin].ulGPIOBase)

  298. #define PIN_TO_BITMASK(pin)		pin

  299. #define IO_REG_TYPE			uint32_t

  300. #define IO_REG_BASE_ATTR

  301. #define IO_REG_MASK_ATTR

  302. 

  303. static inline __attribute__((always_inline))

  304. IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  305. {

  306.     IO_REG_TYPE ret;

  307.     if (SS_GPIO == GPIO_TYPE(pin)) {

  308.         ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));

  309.     } else {

  310.         ret = MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, EXT_PORT_OFFSET_SOC);

  311.     }

  312.     return ((ret >> GPIO_ID(pin)) & 0x01);

  313. }

  314. 

  315. static inline __attribute__((always_inline))

  316. void directModeInput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  317. {

  318.     if (SS_GPIO == GPIO_TYPE(pin)) {

  319.         WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)),

  320. 			((IO_REG_TYPE)(base) + DIR_OFFSET_SS));

  321.     } else {

  322.         MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));

  323.     }

  324. }

  325. 

  326. static inline __attribute__((always_inline))

  327. void directModeOutput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  328. {

  329.     if (SS_GPIO == GPIO_TYPE(pin)) {

  330.         WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)),

  331. 			((IO_REG_TYPE)(base) + DIR_OFFSET_SS));

  332.     } else {

  333.         MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));

  334.     }

  335. }

  336. 

  337. static inline __attribute__((always_inline))

  338. void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  339. {

  340.     if (SS_GPIO == GPIO_TYPE(pin)) {

  341.         WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);

  342.     } else {

  343.         MMIO_REG_VAL(base) &= ~(0x01 << GPIO_ID(pin));

  344.     }

  345. }

  346. 

  347. static inline __attribute__((always_inline))

  348. void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)

  349. {

  350.     if (SS_GPIO == GPIO_TYPE(pin)) {

  351.         WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);

  352.     } else {

  353.         MMIO_REG_VAL(base) |= (0x01 << GPIO_ID(pin));

  354.     }

  355. }

  356. 

  357. #define DIRECT_READ(base, pin)		directRead(base, pin)

  358. #define DIRECT_MODE_INPUT(base, pin)	directModeInput(base, pin)

  359. #define DIRECT_MODE_OUTPUT(base, pin)	directModeOutput(base, pin)

  360. #define DIRECT_WRITE_LOW(base, pin)	directWriteLow(base, pin)

  361. #define DIRECT_WRITE_HIGH(base, pin)	directWriteHigh(base, pin)

  362. 

  363. #elif defined(__riscv)

  364. 

  365. /*

  366.  * Tested on highfive1

  367.  *

  368.  * Stable results are achieved operating in the

  369.  * two high speed modes of the highfive1.  It

  370.  * seems to be less reliable in slow mode.

  371.  */

  372. #define PIN_TO_BASEREG(pin)             (0)

  373. #define PIN_TO_BITMASK(pin)             digitalPinToBitMask(pin)

  374. #define IO_REG_TYPE uint32_t

  375. #define IO_REG_BASE_ATTR

  376. #define IO_REG_MASK_ATTR

  377. 

  378. static inline __attribute__((always_inline))

  379. IO_REG_TYPE directRead(IO_REG_TYPE mask)

  380. {

  381.     return ((GPIO_REG(GPIO_INPUT_VAL) & mask) != 0) ? 1 : 0;

  382. }

  383. 

  384. static inline __attribute__((always_inline))

  385. void directModeInput(IO_REG_TYPE mask)

  386. {

  387.     GPIO_REG(GPIO_OUTPUT_XOR)  &= ~mask;

  388.     GPIO_REG(GPIO_IOF_EN)      &= ~mask;

  389. 

  390.     GPIO_REG(GPIO_INPUT_EN)  |=  mask;

  391.     GPIO_REG(GPIO_OUTPUT_EN) &= ~mask;

  392. }

  393. 

  394. static inline __attribute__((always_inline))

  395. void directModeOutput(IO_REG_TYPE mask)

  396. {

  397.     GPIO_REG(GPIO_OUTPUT_XOR)  &= ~mask;

  398.     GPIO_REG(GPIO_IOF_EN)      &= ~mask;

  399. 

  400.     GPIO_REG(GPIO_INPUT_EN)  &= ~mask;

  401.     GPIO_REG(GPIO_OUTPUT_EN) |=  mask;

  402. }

  403. 

  404. static inline __attribute__((always_inline))

  405. void directWriteLow(IO_REG_TYPE mask)

  406. {

  407.     GPIO_REG(GPIO_OUTPUT_VAL) &= ~mask;

  408. }

  409. 

  410. static inline __attribute__((always_inline))

  411. void directWriteHigh(IO_REG_TYPE mask)

  412. {

  413.     GPIO_REG(GPIO_OUTPUT_VAL) |= mask;

  414. }

  415. 

  416. #define DIRECT_READ(base, mask)          directRead(mask)

  417. #define DIRECT_WRITE_LOW(base, mask)     directWriteLow(mask)

  418. #define DIRECT_WRITE_HIGH(base, mask)    directWriteHigh(mask)

  419. #define DIRECT_MODE_INPUT(base, mask)    directModeInput(mask)

  420. #define DIRECT_MODE_OUTPUT(base, mask)   directModeOutput(mask)

  421. 

  422. #else

  423. #define PIN_TO_BASEREG(pin)             (0)

  424. #define PIN_TO_BITMASK(pin)             (pin)

  425. #define IO_REG_TYPE unsigned int

  426. #define IO_REG_BASE_ATTR

  427. #define IO_REG_MASK_ATTR

  428. #define DIRECT_READ(base, pin)          digitalRead(pin)

  429. #define DIRECT_WRITE_LOW(base, pin)     digitalWrite(pin, LOW)

  430. #define DIRECT_WRITE_HIGH(base, pin)    digitalWrite(pin, HIGH)

  431. #define DIRECT_MODE_INPUT(base, pin)    pinMode(pin,INPUT)

  432. #define DIRECT_MODE_OUTPUT(base, pin)   pinMode(pin,OUTPUT)

  433. #warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture."

  434. 

  435. #endif

  436. 

  437. #endif