PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
Вы не можете выбрать более 25 тем Темы должны начинаться с буквы или цифры, могут содержать дефисы(-) и должны содержать не более 35 символов.

1149 lines
56KB

  1. /*
  2. * File: kinetis_flexcan.h
  3. * Purpose: Register and bit definitions
  4. */
  5. #ifndef __KINETIS_FLEXCAN_H
  6. #define __KINETIS_FLEXCAN_H
  7. #include <stdint.h>
  8. /* Common bit definition */
  9. #define BIT0 (1L)
  10. #define BIT1 (BIT0<<1)
  11. #define BIT2 (BIT0<<2)
  12. #define BIT3 (BIT0<<3)
  13. #define BIT4 (BIT0<<4)
  14. #define BIT5 (BIT0<<5)
  15. #define BIT6 (BIT0<<6)
  16. #define BIT7 (BIT0<<7)
  17. #define BIT8 (BIT0<<8)
  18. #define BIT9 (BIT0<<9)
  19. #define BIT10 (BIT0<<10)
  20. #define BIT11 (BIT0<<11)
  21. #define BIT12 (0x00001000L)
  22. #define BIT13 (0x00002000L)
  23. #define BIT14 (0x00004000L)
  24. #define BIT15 (0x00008000L)
  25. #define BIT16 (0x00010000L)
  26. #define BIT17 (0x00020000L)
  27. #define BIT18 (0x00040000L)
  28. #define BIT19 (0x00080000L)
  29. #define BIT20 (0x00100000L)
  30. #define BIT21 (0x00200000L)
  31. #define BIT22 (0x00400000L)
  32. #define BIT23 (0x00800000L)
  33. #define BIT24 (0x01000000L)
  34. #define BIT25 (0x02000000L)
  35. #define BIT26 (0x04000000L)
  36. #define BIT27 (0x08000000L)
  37. #define BIT28 (0x10000000L)
  38. #define BIT29 (0x20000000L)
  39. #define BIT30 (0x40000000L)
  40. #define BIT31 (0x80000000L)
  41. /* FlexCAN module I/O Base Addresss */
  42. #define FLEXCAN0_BASE (0x40024000L)
  43. #define FLEXCAN1_BASE (0x400A4000L)
  44. typedef volatile uint32_t vuint32_t;
  45. /*********************************************************************
  46. *
  47. * FlexCAN0 (FLEXCAN0)
  48. *
  49. *********************************************************************/
  50. /* Register read/write macros */
  51. #define FLEXCAN0_MCR (*(vuint32_t*)(FLEXCAN0_BASE))
  52. #define FLEXCAN0_CTRL1 (*(vuint32_t*)(FLEXCAN0_BASE+4))
  53. #define FLEXCAN0_TIMER (*(vuint32_t*)(FLEXCAN0_BASE+8))
  54. #define FLEXCAN0_TCR (*(vuint32_t*)(FLEXCAN0_BASE+0x0C))
  55. #define FLEXCAN0_RXMGMASK (*(vuint32_t*)(FLEXCAN0_BASE+0x10))
  56. #define FLEXCAN0_RX14MASK (*(vuint32_t*)(FLEXCAN0_BASE+0x14))
  57. #define FLEXCAN0_RX15MASK (*(vuint32_t*)(FLEXCAN0_BASE+0x18))
  58. #define FLEXCAN0_ECR (*(vuint32_t*)(FLEXCAN0_BASE+0x1C))
  59. #define FLEXCAN0_ESR1 (*(vuint32_t*)(FLEXCAN0_BASE+0x20))
  60. #define FLEXCAN0_IMASK2 (*(vuint32_t*)(FLEXCAN0_BASE+0x24))
  61. #define FLEXCAN0_IMASK1 (*(vuint32_t*)(FLEXCAN0_BASE+0x28))
  62. #define FLEXCAN0_IFLAG2 (*(vuint32_t*)(FLEXCAN0_BASE+0x2C))
  63. #define FLEXCAN0_IFLAG1 (*(vuint32_t*)(FLEXCAN0_BASE+0x30))
  64. #define FLEXCAN0_CTRL2 (*(vuint32_t*)(FLEXCAN0_BASE+0x34))
  65. #define FLEXCAN0_ESR2 (*(vuint32_t*)(FLEXCAN0_BASE+0x38))
  66. #define FLEXCAN0_FUREQ (*(vuint32_t*)(FLEXCAN0_BASE+0x3C))
  67. #define FLEXCAN0_FUACK (*(vuint32_t*)(FLEXCAN0_BASE+0x40))
  68. #define FLEXCAN0_CRCR (*(vuint32_t*)(FLEXCAN0_BASE+0x44))
  69. #define FLEXCAN0_RXFGMASK (*(vuint32_t*)(FLEXCAN0_BASE+0x48))
  70. #define FLEXCAN0_RXFIR (*(vuint32_t*)(FLEXCAN0_BASE+0x4C))
  71. #define FLEXCAN0_DBG1 (*(vuint32_t*)(FLEXCAN0_BASE+0x58))
  72. #define FLEXCAN0_DBG2 (*(vuint32_t*)(FLEXCAN0_BASE+0x5C))
  73. #define FLEXCAN0_IMEUR FLEXCAN0_FUREQ
  74. #define FLEXCAN0_LRFR FLEXCAN0_FUACK
  75. /* Message Buffers */
  76. #define FLEXCAN0_MB0_CS (*(vuint32_t*)(FLEXCAN0_BASE+0x80))
  77. #define FLEXCAN0_MB0_ID (*(vuint32_t*)(FLEXCAN0_BASE+0x84))
  78. #define FLEXCAN0_MB0_WORD0 (*(vuint32_t*)(FLEXCAN0_BASE+0x88))
  79. #define FLEXCAN0_MB0_WORD1 (*(vuint32_t*)(FLEXCAN0_BASE+0x8C))
  80. #define FLEXCAN0_MBn_CS(n) (*(vuint32_t*)(FLEXCAN0_BASE+0x80+n*0x10))
  81. #define FLEXCAN0_MBn_ID(n) (*(vuint32_t*)(FLEXCAN0_BASE+0x84+n*0x10))
  82. #define FLEXCAN0_MBn_WORD0(n) (*(vuint32_t*)(FLEXCAN0_BASE+0x88+n*0x10))
  83. #define FLEXCAN0_MBn_WORD1(n) (*(vuint32_t*)(FLEXCAN0_BASE+0x8C+n*0x10))
  84. /* Rx Individual Mask Registers */
  85. #define FLEXCAN0_RXIMR0 (*(vuint32_t*)(FLEXCAN0_BASE+0x880))
  86. #define FLEXCAN0_RXIMRn(n) (*(vuint32_t*)(FLEXCAN0_BASE+0x880+n*4))
  87. /* Rx FIFO ID Filter Table Element 0 to 127 */
  88. #define FLEXCAN0_IDFLT_TAB0 (*(vuint32_t*)(FLEXCAN0_BASE+0xE0))
  89. #define FLEXCAN0_IDFLT_TAB(n) (*(vuint32_t*)(FLEXCAN0_BASE+0xE0+(n*4)))
  90. //#define FLEXCAN0_IDFLT_TAB(n) (*(vuint32_t*)(FLEXCAN0_BASE+0xE0+(n<<2)))
  91. /* Memory Error Control Register */
  92. #define FLEXCAN0_MECR *(vuint32_t*)(FLEXCAN0_BASE+0x3B70))
  93. /* Error Injection Address Register */
  94. #define FLEXCAN0_ERRIAR *(vuint32_t*)(FLEXCAN0_BASE+0x3B74))
  95. /* Error Injection Data Pattern Register */
  96. #define FLEXCAN0_ERRIDPR *(vuint32_t*)(FLEXCAN0_BASE+0x3B78))
  97. /* Error Injection Parity Pattern Register */
  98. #define FLEXCAN0_ERRIPPR *(vuint32_t*)(FLEXCAN0_BASE+0x3B7C))
  99. /* Error Report Address Register */
  100. #define FLEXCAN0_RERRAR *(vuint32_t*)(FLEXCAN0_BASE+0x3B80))
  101. /* Error Report Data Register */
  102. #define FLEXCAN0_RERRDR *(vuint32_t*)(FLEXCAN0_BASE+0x3B84))
  103. /* Error Report Syndrome Register */
  104. #define FLEXCAN0_RERRSYNR *(vuint32_t*)(FLEXCAN0_BASE+0x3B88))
  105. /* Error Status Register */
  106. #define FLEXCAN0_ERRSR *(vuint32_t*)(FLEXCAN0_BASE+0x3B8C))
  107. /*********************************************************************
  108. *
  109. * FlexCAN1 (FLEXCAN1)
  110. *
  111. *********************************************************************/
  112. /* Register read/write macros */
  113. #define FLEXCAN1_MCR (*(vuint32_t*)(FLEXCAN1_BASE))
  114. #define FLEXCAN1_CTRL1 (*(vuint32_t*)(FLEXCAN1_BASE+4))
  115. #define FLEXCAN1_TIMER (*(vuint32_t*)(FLEXCAN1_BASE+8))
  116. #define FLEXCAN1_TCR (*(vuint32_t*)(FLEXCAN1_BASE+0x0C))
  117. #define FLEXCAN1_RXMGMASK (*(vuint32_t*)(FLEXCAN1_BASE+0x10))
  118. #define FLEXCAN1_RX14MASK (*(vuint32_t*)(FLEXCAN1_BASE+0x14))
  119. #define FLEXCAN1_RX15MASK (*(vuint32_t*)(FLEXCAN1_BASE+0x18))
  120. #define FLEXCAN1_ECR (*(vuint32_t*)(FLEXCAN1_BASE+0x1C))
  121. #define FLEXCAN1_ESR1 (*(vuint32_t*)(FLEXCAN1_BASE+0x20))
  122. #define FLEXCAN1_IMASK2 (*(vuint32_t*)(FLEXCAN1_BASE+0x24))
  123. #define FLEXCAN1_IMASK1 (*(vuint32_t*)(FLEXCAN1_BASE+0x28))
  124. #define FLEXCAN1_IFLAG2 (*(vuint32_t*)(FLEXCAN1_BASE+0x2C))
  125. #define FLEXCAN1_IFLAG1 (*(vuint32_t*)(FLEXCAN1_BASE+0x30))
  126. #define FLEXCAN1_CTRL2 (*(vuint32_t*)(FLEXCAN1_BASE+0x34))
  127. #define FLEXCAN1_ESR2 (*(vuint32_t*)(FLEXCAN1_BASE+0x38))
  128. #define FLEXCAN1_FUREQ (*(vuint32_t*)(FLEXCAN1_BASE+0x3C))
  129. #define FLEXCAN1_FUACK (*(vuint32_t*)(FLEXCAN1_BASE+0x40))
  130. #define FLEXCAN1_CRCR (*(vuint32_t*)(FLEXCAN1_BASE+0x44))
  131. #define FLEXCAN1_RXFGMASK (*(vuint32_t*)(FLEXCAN1_BASE+0x48))
  132. #define FLEXCAN1_RXFIR (*(vuint32_t*)(FLEXCAN1_BASE+0x4C))
  133. #define FLEXCAN1_DBG1 (*(vuint32_t*)(FLEXCAN1_BASE+0x58))
  134. #define FLEXCAN1_DBG2 (*(vuint32_t*)(FLEXCAN1_BASE+0x5C))
  135. #define FLEXCAN1_IMEUR FLEXCAN1_FUREQ
  136. #define FLEXCAN1_LRFR FLEXCAN1_FUACK
  137. /* Message Buffers */
  138. #define FLEXCAN1_MB0_CS (*(vuint32_t*)(FLEXCAN1_BASE+0x80))
  139. #define FLEXCAN1_MB0_ID (*(vuint32_t*)(FLEXCAN1_BASE+0x84))
  140. #define FLEXCAN1_MB0_WORD0 (*(vuint32_t*)(FLEXCAN1_BASE+0x88))
  141. #define FLEXCAN1_MB0_WORD1 (*(vuint32_t*)(FLEXCAN1_BASE+0x8C))
  142. #define FLEXCAN1_MBn_CS(n) (*(vuint32_t*)(FLEXCAN1_BASE+0x80+n*0x10))
  143. #define FLEXCAN1_MBn_ID(n) (*(vuint32_t*)(FLEXCAN1_BASE+0x84+n*0x10))
  144. #define FLEXCAN1_MBn_WORD0(n) (*(vuint32_t*)(FLEXCAN1_BASE+0x88+n*0x10))
  145. #define FLEXCAN1_MBn_WORD1(n) (*(vuint32_t*)(FLEXCAN1_BASE+0x8C+n*0x10))
  146. /* Rx Individual Mask Registers */
  147. #define FLEXCAN1_RXIMR0 (*(vuint32_t*)(FLEXCAN1_BASE+0x880))
  148. #define FLEXCAN1_RXIMRn(n) (*(vuint32_t*)(FLEXCAN1_BASE+0x880+n*4))
  149. /* Rx FIFO ID Filter Table Element 0 to 127 */
  150. #define FLEXCAN1_IDFLT_TAB0 (*(vuint32_t*)(FLEXCAN1_BASE+0xE0))
  151. #define FLEXCAN1_IDFLT_TAB(n) (*(vuint32_t*)(FLEXCAN1_BASE+0xE0+(n<<2)))
  152. /* Memory Error Control Register */
  153. #define FLEXCAN1_MECR *(vuint32_t*)(FLEXCAN1_BASE+0x7B70))
  154. /* Error Injection Address Register */
  155. #define FLEXCAN1_ERRIAR *(vuint32_t*)(FLEXCAN1_BASE+0x3B74))
  156. /* Error Injection Data Pattern Register */
  157. #define FLEXCAN1_ERRIDPR *(vuint32_t*)(FLEXCAN1_BASE+0x3B78))
  158. /* Error Injection Parity Pattern Register */
  159. #define FLEXCAN1_ERRIPPR *(vuint32_t*)(FLEXCAN1_BASE+0x3B7C))
  160. /* Error Report Address Register */
  161. #define FLEXCAN1_RERRAR *(vuint32_t*)(FLEXCAN1_BASE+0x3B80))
  162. /* Error Report Data Register */
  163. #define FLEXCAN1_RERRDR *(vuint32_t*)(FLEXCAN1_BASE+0x3B84))
  164. /* Error Report Syndrome Register */
  165. #define FLEXCAN1_RERRSYNR *(vuint32_t*)(FLEXCAN1_BASE+0x3B88))
  166. /* Error Status Register */
  167. #define FLEXCAN1_ERRSR *(vuint32_t*)(FLEXCAN1_BASE+0x3B8C))
  168. /* Bit definitions and macros for FLEXCAN_MCR */
  169. #define FLEXCAN_MCR_MAXMB(x) (((x)&0x0000007F)<<0)
  170. #define FLEXCAN_MCR_IDAM(x) (((x)&0x00000003)<<8)
  171. #define FLEXCAN_MCR_MAXMB_MASK (0x0000007F)
  172. #define FLEXCAN_MCR_IDAM_MASK (0x00000300)
  173. #define FLEXCAN_MCR_IDAM_BIT_NO (8)
  174. #define FLEXCAN_MCR_AEN (0x00001000)
  175. #define FLEXCAN_MCR_LPRIO_EN (0x00002000)
  176. #define FLEXCAN_MCR_IRMQ (0x00010000)
  177. #define FLEXCAN_MCR_SRX_DIS (0x00020000)
  178. #define FLEXCAN_MCR_DOZE (0x00040000)
  179. #define FLEXCAN_MCR_WAK_SRC (0x00080000)
  180. #define FLEXCAN_MCR_LPM_ACK (0x00100000)
  181. #define FLEXCAN_MCR_WRN_EN (0x00200000)
  182. #define FLEXCAN_MCR_SLF_WAK (0x00400000)
  183. #define FLEXCAN_MCR_SUPV (0x00800000)
  184. #define FLEXCAN_MCR_FRZ_ACK (0x01000000)
  185. #define FLEXCAN_MCR_SOFT_RST (0x02000000)
  186. #define FLEXCAN_MCR_WAK_MSK (0x04000000)
  187. #define FLEXCAN_MCR_NOT_RDY (0x08000000)
  188. #define FLEXCAN_MCR_HALT (0x10000000)
  189. #define FLEXCAN_MCR_FEN (0x20000000)
  190. #define FLEXCAN_MCR_FRZ (0x40000000)
  191. #define FLEXCAN_MCR_MDIS (0x80000000)
  192. /* Bit definitions and macros for FLEXCAN_CTRL */
  193. #define FLEXCAN_CTRL_PROPSEG(x) (((x)&0x00000007L)<<0)
  194. #define FLEXCAN_CTRL_LOM (0x00000008)
  195. #define FLEXCAN_CTRL_LBUF (0x00000010)
  196. #define FLEXCAN_CTRL_TSYNC (0x00000020)
  197. #define FLEXCAN_CTRL_BOFF_REC (0x00000040)
  198. #define FLEXCAN_CTRL_SMP (0x00000080)
  199. #define FLEXCAN_CTRL_RWRN_MSK (0x00000400)
  200. #define FLEXCAN_CTRL_TWRN_MSK (0x00000800)
  201. #define FLEXCAN_CTRL_LPB (0x00001000L)
  202. #define FLEXCAN_CTRL_CLK_SRC (0x00002000)
  203. #define FLEXCAN_CTRL_ERR_MSK (0x00004000)
  204. #define FLEXCAN_CTRL_BOFF_MSK (0x00008000)
  205. #define FLEXCAN_CTRL_PSEG2(x) (((x)&0x00000007L)<<16)
  206. #define FLEXCAN_CTRL_PSEG1(x) (((x)&0x00000007L)<<19)
  207. #define FLEXCAN_CTRL_RJW(x) (((x)&0x00000003L)<<22)
  208. #define FLEXCAN_CTRL_PRESDIV(x) (((x)&0x000000FFL)<<24)
  209. /* Bit definitions and macros for FLEXCAN_CTRL2 */
  210. #define FLEXCAN_CTRL2_IMEUEN (BIT31)
  211. #define FLEXCAN_CTRL2_RFFN (0x0F000000L)
  212. #define FLEXCAN_CTRL2_RFFN_BIT_NO (24)
  213. #define FLEXCAN_CTRL2_TASD (0x00F80000L)
  214. #define FLEXCAN_CTRL2_TASD_BIT_NO (19)
  215. #define FLEXCAN_CTRL2_MRP (BIT18)
  216. #define FLEXCAN_CTRL2_RRS (BIT17)
  217. #define FLEXCAN_CTRL2_EACEN (BIT16)
  218. #define FLEXCAN_CTRL2_MUMASK (BIT1)
  219. #define FLEXCAN_CTRL2_FUMASK (BIT0)
  220. #define FLEXCAN_CTRL2_LOSTRLMSK (BIT2)
  221. #define FLEXCAN_CTRL2_LOSTRMMSK (BIT1)
  222. #define FLEXCAN_CTRL2_IMEUMASK (BIT0)
  223. #define FLEXCAN_set_rffn(ctrl2,rffn) ctrl2 = ((ctrl2) & ~FLEXCAN_CTRL2_RFFN) | ((rffn & 0xF)<<FLEXCAN_CTRL2_RFFN_BIT_NO)
  224. /* Bit definitions and macros for FLEXCAN_TIMER */
  225. #define FLEXCAN_TIMER_TIMER(x) (((x)&0x0000FFFF)<<0)
  226. /* Bit definitions and macros for FLEXCAN_TCR */
  227. #define FLEXCAN_TCR_DSCACK (0x00000100)
  228. #define FLEXCAN_TCR_BIT_CLS (0x00000200)
  229. #define FLEXCAN_TCR_TRD (0x00000400)
  230. /* Bit definitions and macros for FLEXCAN_RXGMASK */
  231. #define FLEXCAN_RXGMASK_MI0 (0x00000001)
  232. #define FLEXCAN_RXGMASK_MI1 (0x00000002)
  233. #define FLEXCAN_RXGMASK_MI2 (0x00000004)
  234. #define FLEXCAN_RXGMASK_MI3 (0x00000008)
  235. #define FLEXCAN_RXGMASK_MI4 (0x00000010)
  236. #define FLEXCAN_RXGMASK_MI5 (0x00000020)
  237. #define FLEXCAN_RXGMASK_MI6 (0x00000040)
  238. #define FLEXCAN_RXGMASK_MI7 (0x00000080)
  239. #define FLEXCAN_RXGMASK_MI8 (0x00000100)
  240. #define FLEXCAN_RXGMASK_MI9 (0x00000200)
  241. #define FLEXCAN_RXGMASK_MI10 (0x00000400)
  242. #define FLEXCAN_RXGMASK_MI11 (0x00000800)
  243. #define FLEXCAN_RXGMASK_MI12 (0x00001000)
  244. #define FLEXCAN_RXGMASK_MI13 (0x00002000)
  245. #define FLEXCAN_RXGMASK_MI14 (0x00004000)
  246. #define FLEXCAN_RXGMASK_MI15 (0x00008000)
  247. #define FLEXCAN_RXGMASK_MI16 (0x00010000)
  248. #define FLEXCAN_RXGMASK_MI17 (0x00020000)
  249. #define FLEXCAN_RXGMASK_MI18 (0x00040000)
  250. #define FLEXCAN_RXGMASK_MI19 (0x00080000)
  251. #define FLEXCAN_RXGMASK_MI20 (0x00100000)
  252. #define FLEXCAN_RXGMASK_MI21 (0x00200000)
  253. #define FLEXCAN_RXGMASK_MI22 (0x00400000)
  254. #define FLEXCAN_RXGMASK_MI23 (0x00800000)
  255. #define FLEXCAN_RXGMASK_MI24 (0x01000000)
  256. #define FLEXCAN_RXGMASK_MI25 (0x02000000)
  257. #define FLEXCAN_RXGMASK_MI26 (0x04000000)
  258. #define FLEXCAN_RXGMASK_MI27 (0x08000000)
  259. #define FLEXCAN_RXGMASK_MI28 (0x10000000)
  260. #define FLEXCAN_RXGMASK_MI29 (0x20000000)
  261. #define FLEXCAN_RXGMASK_MI30 (0x40000000)
  262. #define FLEXCAN_RXGMASK_MI31 (0x80000000)
  263. /* Bit definitions and macros for FLEXCAN_RX14MASK */
  264. #define FLEXCAN_RX14MASK_MI0 (0x00000001)
  265. #define FLEXCAN_RX14MASK_MI1 (0x00000002)
  266. #define FLEXCAN_RX14MASK_MI2 (0x00000004)
  267. #define FLEXCAN_RX14MASK_MI3 (0x00000008)
  268. #define FLEXCAN_RX14MASK_MI4 (0x00000010)
  269. #define FLEXCAN_RX14MASK_MI5 (0x00000020)
  270. #define FLEXCAN_RX14MASK_MI6 (0x00000040)
  271. #define FLEXCAN_RX14MASK_MI7 (0x00000080)
  272. #define FLEXCAN_RX14MASK_MI8 (0x00000100)
  273. #define FLEXCAN_RX14MASK_MI9 (0x00000200)
  274. #define FLEXCAN_RX14MASK_MI10 (0x00000400)
  275. #define FLEXCAN_RX14MASK_MI11 (0x00000800)
  276. #define FLEXCAN_RX14MASK_MI12 (0x00001000)
  277. #define FLEXCAN_RX14MASK_MI13 (0x00002000)
  278. #define FLEXCAN_RX14MASK_MI14 (0x00004000)
  279. #define FLEXCAN_RX14MASK_MI15 (0x00008000)
  280. #define FLEXCAN_RX14MASK_MI16 (0x00010000)
  281. #define FLEXCAN_RX14MASK_MI17 (0x00020000)
  282. #define FLEXCAN_RX14MASK_MI18 (0x00040000)
  283. #define FLEXCAN_RX14MASK_MI19 (0x00080000)
  284. #define FLEXCAN_RX14MASK_MI20 (0x00100000)
  285. #define FLEXCAN_RX14MASK_MI21 (0x00200000)
  286. #define FLEXCAN_RX14MASK_MI22 (0x00400000)
  287. #define FLEXCAN_RX14MASK_MI23 (0x00800000)
  288. #define FLEXCAN_RX14MASK_MI24 (0x01000000)
  289. #define FLEXCAN_RX14MASK_MI25 (0x02000000)
  290. #define FLEXCAN_RX14MASK_MI26 (0x04000000)
  291. #define FLEXCAN_RX14MASK_MI27 (0x08000000)
  292. #define FLEXCAN_RX14MASK_MI28 (0x10000000)
  293. #define FLEXCAN_RX14MASK_MI29 (0x20000000)
  294. #define FLEXCAN_RX14MASK_MI30 (0x40000000)
  295. #define FLEXCAN_RX14MASK_MI31 (0x80000000)
  296. /* Bit definitions and macros for FLEXCAN_RX15MASK */
  297. #define FLEXCAN_RX15MASK_MI0 (0x00000001)
  298. #define FLEXCAN_RX15MASK_MI1 (0x00000002)
  299. #define FLEXCAN_RX15MASK_MI2 (0x00000004)
  300. #define FLEXCAN_RX15MASK_MI3 (0x00000008)
  301. #define FLEXCAN_RX15MASK_MI4 (0x00000010)
  302. #define FLEXCAN_RX15MASK_MI5 (0x00000020)
  303. #define FLEXCAN_RX15MASK_MI6 (0x00000040)
  304. #define FLEXCAN_RX15MASK_MI7 (0x00000080)
  305. #define FLEXCAN_RX15MASK_MI8 (0x00000100)
  306. #define FLEXCAN_RX15MASK_MI9 (0x00000200)
  307. #define FLEXCAN_RX15MASK_MI10 (0x00000400)
  308. #define FLEXCAN_RX15MASK_MI11 (0x00000800)
  309. #define FLEXCAN_RX15MASK_MI12 (0x00001000)
  310. #define FLEXCAN_RX15MASK_MI13 (0x00002000)
  311. #define FLEXCAN_RX15MASK_MI14 (0x00004000)
  312. #define FLEXCAN_RX15MASK_MI15 (0x00008000)
  313. #define FLEXCAN_RX15MASK_MI16 (0x00010000)
  314. #define FLEXCAN_RX15MASK_MI17 (0x00020000)
  315. #define FLEXCAN_RX15MASK_MI18 (0x00040000)
  316. #define FLEXCAN_RX15MASK_MI19 (0x00080000)
  317. #define FLEXCAN_RX15MASK_MI20 (0x00100000)
  318. #define FLEXCAN_RX15MASK_MI21 (0x00200000)
  319. #define FLEXCAN_RX15MASK_MI22 (0x00400000)
  320. #define FLEXCAN_RX15MASK_MI23 (0x00800000)
  321. #define FLEXCAN_RX15MASK_MI24 (0x01000000)
  322. #define FLEXCAN_RX15MASK_MI25 (0x02000000)
  323. #define FLEXCAN_RX15MASK_MI26 (0x04000000)
  324. #define FLEXCAN_RX15MASK_MI27 (0x08000000)
  325. #define FLEXCAN_RX15MASK_MI28 (0x10000000)
  326. #define FLEXCAN_RX15MASK_MI29 (0x20000000)
  327. #define FLEXCAN_RX15MASK_MI30 (0x40000000)
  328. #define FLEXCAN_RX15MASK_MI31 (0x80000000)
  329. /* Bit definitions and macros for FLEXCAN_ECR */
  330. #define FLEXCAN_ECR_TX_ERR_COUNTER(x) (((x)&0x000000FF)<<0)
  331. #define FLEXCAN_ECR_RX_ERR_COUNTER(x) (((x)&0x000000FF)<<8)
  332. /* Bit definitions and macros for FLEXCAN_ESR1 */
  333. #define FLEXCAN_ESR_WAK_INT (0x00000001)
  334. #define FLEXCAN_ESR_ERR_INT (0x00000002)
  335. #define FLEXCAN_ESR_BOFF_INT (0x00000004)
  336. #define FLEXCAN_ESR_RX (0x00000008)
  337. #define FLEXCAN_ESR_FLT_CONF(x) (((x)&0x00000003)<<4)
  338. #define FLEXCAN_ESR_FLT_CONF_MASK (0x00000030)
  339. #define FLEXCAN_ESR_TX (0x00000040)
  340. #define FLEXCAN_ESR_IDLE (0x00000080)
  341. #define FLEXCAN_ESR_RX_WRN (0x00000100)
  342. #define FLEXCAN_ESR_TX_WRN (0x00000200)
  343. #define FLEXCAN_ESR_STF_ERR (0x00000400)
  344. #define FLEXCAN_ESR_FRM_ERR (0x00000800)
  345. #define FLEXCAN_ESR_CRC_ERR (0x00001000)
  346. #define FLEXCAN_ESR_ACK_ERR (0x00002000)
  347. #define FLEXCAN_ESR_BIT0_ERR (0x00004000)
  348. #define FLEXCAN_ESR_BIT1_ERR (0x00008000)
  349. #define FLEXCAN_ESR_RWRN_INT (0x00010000)
  350. #define FLEXCAN_ESR_TWRN_INT (0x00020000)
  351. #define FLEXCAN_ESR_get_fault_code(esr) (((esr) & FLEXCAN_ESR_FLT_CONF_MASK)>>4)
  352. #define CAN_ERROR_ACTIVE 0
  353. #define CAN_ERROR_PASSIVE 1
  354. #define CAN_ERROR_BUS_OFF 2
  355. /* Bit definition for FLEXCAN_ESR2 */
  356. #define FLEXCAN_ESR2_IMB (0x00002000)
  357. #define FLEXCAN_ESR2_VPS (0x00004000)
  358. #define FLEXCAN_ESR2_LTM (0x007F0000L)
  359. #define FLEXCAN_ESR2_LTM_BIT_NO (16)
  360. #define FLEXCAN_ESR2_LOSTRLF (0x00000004)
  361. #define FLEXCAN_ESR2_LOSTRMF (0x00000002)
  362. #define FLEXCAN_ESR2_IMEUF (0x00000001)
  363. #define FLEXCAN_get_LTM(esr2_value) (((esr2_value) & (FLEXCAN_ESR2_LTM))>>(FLEXCAN_ESR2_LTM_BIT_NO))
  364. /* Bit definitions and macros for FLEXCAN_IMASK1 */
  365. #define FLEXCAN_IMASK1_BUF0M (0x00000001)
  366. #define FLEXCAN_IMASK1_BUF1M (0x00000002)
  367. #define FLEXCAN_IMASK1_BUF2M (0x00000004)
  368. #define FLEXCAN_IMASK1_BUF3M (0x00000008)
  369. #define FLEXCAN_IMASK1_BUF4M (0x00000010)
  370. #define FLEXCAN_IMASK1_BUF5M (0x00000020)
  371. #define FLEXCAN_IMASK1_BUF6M (0x00000040)
  372. #define FLEXCAN_IMASK1_BUF7M (0x00000080)
  373. #define FLEXCAN_IMASK1_BUF8M (0x00000100)
  374. #define FLEXCAN_IMASK1_BUF9M (0x00000200)
  375. #define FLEXCAN_IMASK1_BUF10M (0x00000400)
  376. #define FLEXCAN_IMASK1_BUF11M (0x00000800)
  377. #define FLEXCAN_IMASK1_BUF12M (0x00001000)
  378. #define FLEXCAN_IMASK1_BUF13M (0x00002000)
  379. #define FLEXCAN_IMASK1_BUF14M (0x00004000)
  380. #define FLEXCAN_IMASK1_BUF15M (0x00008000)
  381. #define FLEXCAN_IMASK1_BUF16M (0x00010000)
  382. #define FLEXCAN_IMASK1_BUF17M (0x00020000)
  383. #define FLEXCAN_IMASK1_BUF18M (0x00040000)
  384. #define FLEXCAN_IMASK1_BUF19M (0x00080000)
  385. #define FLEXCAN_IMASK1_BUF20M (0x00100000)
  386. #define FLEXCAN_IMASK1_BUF21M (0x00200000)
  387. #define FLEXCAN_IMASK1_BUF22M (0x00400000)
  388. #define FLEXCAN_IMASK1_BUF23M (0x00800000)
  389. #define FLEXCAN_IMASK1_BUF24M (0x01000000)
  390. #define FLEXCAN_IMASK1_BUF25M (0x02000000)
  391. #define FLEXCAN_IMASK1_BUF26M (0x04000000)
  392. #define FLEXCAN_IMASK1_BUF27M (0x08000000)
  393. #define FLEXCAN_IMASK1_BUF28M (0x10000000)
  394. #define FLEXCAN_IMASK1_BUF29M (0x20000000)
  395. #define FLEXCAN_IMASK1_BUF30M (0x40000000)
  396. #define FLEXCAN_IMASK1_BUF31M (0x80000000)
  397. /* Bit definitions and macros for FLEXCAN_IFLAG1 */
  398. #define FLEXCAN_IFLAG1_BUF0I (0x00000001)
  399. #define FLEXCAN_IFLAG1_BUF1I (0x00000002)
  400. #define FLEXCAN_IFLAG1_BUF2I (0x00000004)
  401. #define FLEXCAN_IFLAG1_BUF3I (0x00000008)
  402. #define FLEXCAN_IFLAG1_BUF4I (0x00000010)
  403. #define FLEXCAN_IFLAG1_BUF5I (0x00000020)
  404. #define FLEXCAN_IFLAG1_BUF6I (0x00000040)
  405. #define FLEXCAN_IFLAG1_BUF7I (0x00000080)
  406. #define FLEXCAN_IFLAG1_BUF8I (0x00000100)
  407. #define FLEXCAN_IFLAG1_BUF9I (0x00000200)
  408. #define FLEXCAN_IFLAG1_BUF10I (0x00000400)
  409. #define FLEXCAN_IFLAG1_BUF11I (0x00000800)
  410. #define FLEXCAN_IFLAG1_BUF12I (0x00001000)
  411. #define FLEXCAN_IFLAG1_BUF13I (0x00002000)
  412. #define FLEXCAN_IFLAG1_BUF14I (0x00004000)
  413. #define FLEXCAN_IFLAG1_BUF15I (0x00008000)
  414. #define FLEXCAN_IFLAG1_BUF16I (0x00010000)
  415. #define FLEXCAN_IFLAG1_BUF17I (0x00020000)
  416. #define FLEXCAN_IFLAG1_BUF18I (0x00040000)
  417. #define FLEXCAN_IFLAG1_BUF19I (0x00080000)
  418. #define FLEXCAN_IFLAG1_BUF20I (0x00100000)
  419. #define FLEXCAN_IFLAG1_BUF21I (0x00200000)
  420. #define FLEXCAN_IFLAG1_BUF22I (0x00400000)
  421. #define FLEXCAN_IFLAG1_BUF23I (0x00800000)
  422. #define FLEXCAN_IFLAG1_BUF24I (0x01000000)
  423. #define FLEXCAN_IFLAG1_BUF25I (0x02000000)
  424. #define FLEXCAN_IFLAG1_BUF26I (0x04000000)
  425. #define FLEXCAN_IFLAG1_BUF27I (0x08000000)
  426. #define FLEXCAN_IFLAG1_BUF28I (0x10000000)
  427. #define FLEXCAN_IFLAG1_BUF29I (0x20000000)
  428. #define FLEXCAN_IFLAG1_BUF30I (0x40000000)
  429. #define FLEXCAN_IFLAG1_BUF31I (0x80000000)
  430. /* Bit definitions and macros for FLEXCAN_MB_CS */
  431. #define FLEXCAN_MB_CS_TIMESTAMP(x) (((x)&0x0000FFFF)<<0)
  432. #define FLEXCAN_MB_CS_TIMESTAMP_MASK (0x0000FFFFL)
  433. #define FLEXCAN_MB_CS_LENGTH(x) (((x)&0x0000000F)<<16)
  434. #define FLEXCAN_MB_CS_RTR (0x00100000)
  435. #define FLEXCAN_MB_CS_IDE (0x00200000)
  436. #define FLEXCAN_MB_CS_SRR (0x00400000)
  437. #define FLEXCAN_MB_CS_CODE(x) (((x)&0x0000000F)<<24)
  438. #define FLEXCAN_MB_CS_CODE_MASK (0x0F000000L)
  439. #define FLEXCAN_MB_CS_DLC_MASK (0x000F0000L)
  440. #define FLEXCAN_MB_CODE_RX_INACTIVE (0)
  441. #define FLEXCAN_MB_CODE_RX_EMPTY (4)
  442. #define FLEXCAN_MB_CODE_RX_FULL (2)
  443. #define FLEXCAN_MB_CODE_RX_OVERRUN (6)
  444. #define FLEXCAN_MB_CODE_RX_BUSY (1)
  445. #define FLEXCAN_MB_CS_IDE_BIT_NO (21)
  446. #define FLEXCAN_MB_CS_RTR_BIT_NO (20)
  447. #define FLEXCAN_MB_CS_DLC_BIT_NO (16)
  448. #define FLEXCAN_MB_CODE_TX_INACTIVE (8)
  449. #define FLEXCAN_MB_CODE_TX_ABORT (9)
  450. #define FLEXCAN_MB_CODE_TX_ONCE (0x0C)
  451. #define FLEXCAN_MB_CODE_TX_RESPONSE (0x0A)
  452. #define FLEXCAN_MB_CODE_TX_RESPONSE_TEMPO (0x0E)
  453. #define FLEXCAN_get_code(cs) (((cs) & FLEXCAN_MB_CS_CODE_MASK)>>24)
  454. #define FLEXCAN_get_length(cs) (((cs) & FLEXCAN_MB_CS_DLC_MASK)>>16)
  455. #define FLEXCAN_get_timestamp(cs) (((cs) & FLEXCAN_MB_CS_TIMESTAMP_MASK)>>0)
  456. /* Bit definitions and macros for FLEXCAN_MB_ID */
  457. #define FLEXCAN_MB_ID_STD_MASK (0x1FFC0000UL)
  458. #define FLEXCAN_MB_ID_EXT_MASK (0x1FFFFFFFUL)
  459. #define FLEXCAN_MB_ID_IDEXT(x) (((x)&0x0003FFFF)<<0)
  460. #define FLEXCAN_MB_ID_IDSTD(x) (((x)&0x000007FF)<<18)
  461. #define FLEXCAN_MB_ID_PRIO(x) (((x)&0x00000007)<<29)
  462. #define FLEXCAN_MB_ID_PRIO_BIT_NO (29)
  463. #define FLEXCAN_MB_ID_STD_BIT_NO (18)
  464. #define FLEXCAN_MB_ID_EXT_BIT_NO (0)
  465. /* Bit definitions and macros for FLEXCAN_MB_WORD0 */
  466. #define FLEXCAN_MB_WORD0_DATA3(x) (((x)&0x000000FF)<<0)
  467. #define FLEXCAN_MB_WORD0_DATA2(x) (((x)&0x000000FF)<<8)
  468. #define FLEXCAN_MB_WORD0_DATA1(x) (((x)&0x000000FF)<<16)
  469. #define FLEXCAN_MB_WORD0_DATA0(x) (((x)&0x000000FF)<<24)
  470. /* Bit definitions and macros for FLEXCAN_MB_WORD1 */
  471. #define FLEXCAN_MB_WORD1_DATA7(x) (((x)&0x000000FF)<<0)
  472. #define FLEXCAN_MB_WORD1_DATA6(x) (((x)&0x000000FF)<<8)
  473. #define FLEXCAN_MB_WORD1_DATA5(x) (((x)&0x000000FF)<<16)
  474. #define FLEXCAN_MB_WORD1_DATA4(x) (((x)&0x000000FF)<<24)
  475. /* Bit definitions and macros for FLEXCAN_RXIMR0 */
  476. #define FLEXCAN_RXIMR0_MI0 (0x00000001)
  477. #define FLEXCAN_RXIMR0_MI1 (0x00000002)
  478. #define FLEXCAN_RXIMR0_MI2 (0x00000004)
  479. #define FLEXCAN_RXIMR0_MI3 (0x00000008)
  480. #define FLEXCAN_RXIMR0_MI4 (0x00000010)
  481. #define FLEXCAN_RXIMR0_MI5 (0x00000020)
  482. #define FLEXCAN_RXIMR0_MI6 (0x00000040)
  483. #define FLEXCAN_RXIMR0_MI7 (0x00000080)
  484. #define FLEXCAN_RXIMR0_MI8 (0x00000100)
  485. #define FLEXCAN_RXIMR0_MI9 (0x00000200)
  486. #define FLEXCAN_RXIMR0_MI10 (0x00000400)
  487. #define FLEXCAN_RXIMR0_MI11 (0x00000800)
  488. #define FLEXCAN_RXIMR0_MI12 (0x00001000)
  489. #define FLEXCAN_RXIMR0_MI13 (0x00002000)
  490. #define FLEXCAN_RXIMR0_MI14 (0x00004000)
  491. #define FLEXCAN_RXIMR0_MI15 (0x00008000)
  492. #define FLEXCAN_RXIMR0_MI16 (0x00010000)
  493. #define FLEXCAN_RXIMR0_MI17 (0x00020000)
  494. #define FLEXCAN_RXIMR0_MI18 (0x00040000)
  495. #define FLEXCAN_RXIMR0_MI19 (0x00080000)
  496. #define FLEXCAN_RXIMR0_MI20 (0x00100000)
  497. #define FLEXCAN_RXIMR0_MI21 (0x00200000)
  498. #define FLEXCAN_RXIMR0_MI22 (0x00400000)
  499. #define FLEXCAN_RXIMR0_MI23 (0x00800000)
  500. #define FLEXCAN_RXIMR0_MI24 (0x01000000)
  501. #define FLEXCAN_RXIMR0_MI25 (0x02000000)
  502. #define FLEXCAN_RXIMR0_MI26 (0x04000000)
  503. #define FLEXCAN_RXIMR0_MI27 (0x08000000)
  504. #define FLEXCAN_RXIMR0_MI28 (0x10000000)
  505. #define FLEXCAN_RXIMR0_MI29 (0x20000000)
  506. #define FLEXCAN_RXIMR0_MI30 (0x40000000)
  507. #define FLEXCAN_RXIMR0_MI31 (0x80000000)
  508. /* Bit definitions and macros for FLEXCAN_RXIMR1 */
  509. #define FLEXCAN_RXIMR1_MI0 (0x00000001)
  510. #define FLEXCAN_RXIMR1_MI1 (0x00000002)
  511. #define FLEXCAN_RXIMR1_MI2 (0x00000004)
  512. #define FLEXCAN_RXIMR1_MI3 (0x00000008)
  513. #define FLEXCAN_RXIMR1_MI4 (0x00000010)
  514. #define FLEXCAN_RXIMR1_MI5 (0x00000020)
  515. #define FLEXCAN_RXIMR1_MI6 (0x00000040)
  516. #define FLEXCAN_RXIMR1_MI7 (0x00000080)
  517. #define FLEXCAN_RXIMR1_MI8 (0x00000100)
  518. #define FLEXCAN_RXIMR1_MI9 (0x00000200)
  519. #define FLEXCAN_RXIMR1_MI10 (0x00000400)
  520. #define FLEXCAN_RXIMR1_MI11 (0x00000800)
  521. #define FLEXCAN_RXIMR1_MI12 (0x00001000)
  522. #define FLEXCAN_RXIMR1_MI13 (0x00002000)
  523. #define FLEXCAN_RXIMR1_MI14 (0x00004000)
  524. #define FLEXCAN_RXIMR1_MI15 (0x00008000)
  525. #define FLEXCAN_RXIMR1_MI16 (0x00010000)
  526. #define FLEXCAN_RXIMR1_MI17 (0x00020000)
  527. #define FLEXCAN_RXIMR1_MI18 (0x00040000)
  528. #define FLEXCAN_RXIMR1_MI19 (0x00080000)
  529. #define FLEXCAN_RXIMR1_MI20 (0x00100000)
  530. #define FLEXCAN_RXIMR1_MI21 (0x00200000)
  531. #define FLEXCAN_RXIMR1_MI22 (0x00400000)
  532. #define FLEXCAN_RXIMR1_MI23 (0x00800000)
  533. #define FLEXCAN_RXIMR1_MI24 (0x01000000)
  534. #define FLEXCAN_RXIMR1_MI25 (0x02000000)
  535. #define FLEXCAN_RXIMR1_MI26 (0x04000000)
  536. #define FLEXCAN_RXIMR1_MI27 (0x08000000)
  537. #define FLEXCAN_RXIMR1_MI28 (0x10000000)
  538. #define FLEXCAN_RXIMR1_MI29 (0x20000000)
  539. #define FLEXCAN_RXIMR1_MI30 (0x40000000)
  540. #define FLEXCAN_RXIMR1_MI31 (0x80000000)
  541. /* Bit definitions and macros for FLEXCAN_RXIMR2 */
  542. #define FLEXCAN_RXIMR2_MI0 (0x00000001)
  543. #define FLEXCAN_RXIMR2_MI1 (0x00000002)
  544. #define FLEXCAN_RXIMR2_MI2 (0x00000004)
  545. #define FLEXCAN_RXIMR2_MI3 (0x00000008)
  546. #define FLEXCAN_RXIMR2_MI4 (0x00000010)
  547. #define FLEXCAN_RXIMR2_MI5 (0x00000020)
  548. #define FLEXCAN_RXIMR2_MI6 (0x00000040)
  549. #define FLEXCAN_RXIMR2_MI7 (0x00000080)
  550. #define FLEXCAN_RXIMR2_MI8 (0x00000100)
  551. #define FLEXCAN_RXIMR2_MI9 (0x00000200)
  552. #define FLEXCAN_RXIMR2_MI10 (0x00000400)
  553. #define FLEXCAN_RXIMR2_MI11 (0x00000800)
  554. #define FLEXCAN_RXIMR2_MI12 (0x00001000)
  555. #define FLEXCAN_RXIMR2_MI13 (0x00002000)
  556. #define FLEXCAN_RXIMR2_MI14 (0x00004000)
  557. #define FLEXCAN_RXIMR2_MI15 (0x00008000)
  558. #define FLEXCAN_RXIMR2_MI16 (0x00010000)
  559. #define FLEXCAN_RXIMR2_MI17 (0x00020000)
  560. #define FLEXCAN_RXIMR2_MI18 (0x00040000)
  561. #define FLEXCAN_RXIMR2_MI19 (0x00080000)
  562. #define FLEXCAN_RXIMR2_MI20 (0x00100000)
  563. #define FLEXCAN_RXIMR2_MI21 (0x00200000)
  564. #define FLEXCAN_RXIMR2_MI22 (0x00400000)
  565. #define FLEXCAN_RXIMR2_MI23 (0x00800000)
  566. #define FLEXCAN_RXIMR2_MI24 (0x01000000)
  567. #define FLEXCAN_RXIMR2_MI25 (0x02000000)
  568. #define FLEXCAN_RXIMR2_MI26 (0x04000000)
  569. #define FLEXCAN_RXIMR2_MI27 (0x08000000)
  570. #define FLEXCAN_RXIMR2_MI28 (0x10000000)
  571. #define FLEXCAN_RXIMR2_MI29 (0x20000000)
  572. #define FLEXCAN_RXIMR2_MI30 (0x40000000)
  573. #define FLEXCAN_RXIMR2_MI31 (0x80000000)
  574. /* Bit definitions and macros for FLEXCAN_RXIMR3 */
  575. #define FLEXCAN_RXIMR3_MI0 (0x00000001)
  576. #define FLEXCAN_RXIMR3_MI1 (0x00000002)
  577. #define FLEXCAN_RXIMR3_MI2 (0x00000004)
  578. #define FLEXCAN_RXIMR3_MI3 (0x00000008)
  579. #define FLEXCAN_RXIMR3_MI4 (0x00000010)
  580. #define FLEXCAN_RXIMR3_MI5 (0x00000020)
  581. #define FLEXCAN_RXIMR3_MI6 (0x00000040)
  582. #define FLEXCAN_RXIMR3_MI7 (0x00000080)
  583. #define FLEXCAN_RXIMR3_MI8 (0x00000100)
  584. #define FLEXCAN_RXIMR3_MI9 (0x00000200)
  585. #define FLEXCAN_RXIMR3_MI10 (0x00000400)
  586. #define FLEXCAN_RXIMR3_MI11 (0x00000800)
  587. #define FLEXCAN_RXIMR3_MI12 (0x00001000)
  588. #define FLEXCAN_RXIMR3_MI13 (0x00002000)
  589. #define FLEXCAN_RXIMR3_MI14 (0x00004000)
  590. #define FLEXCAN_RXIMR3_MI15 (0x00008000)
  591. #define FLEXCAN_RXIMR3_MI16 (0x00010000)
  592. #define FLEXCAN_RXIMR3_MI17 (0x00020000)
  593. #define FLEXCAN_RXIMR3_MI18 (0x00040000)
  594. #define FLEXCAN_RXIMR3_MI19 (0x00080000)
  595. #define FLEXCAN_RXIMR3_MI20 (0x00100000)
  596. #define FLEXCAN_RXIMR3_MI21 (0x00200000)
  597. #define FLEXCAN_RXIMR3_MI22 (0x00400000)
  598. #define FLEXCAN_RXIMR3_MI23 (0x00800000)
  599. #define FLEXCAN_RXIMR3_MI24 (0x01000000)
  600. #define FLEXCAN_RXIMR3_MI25 (0x02000000)
  601. #define FLEXCAN_RXIMR3_MI26 (0x04000000)
  602. #define FLEXCAN_RXIMR3_MI27 (0x08000000)
  603. #define FLEXCAN_RXIMR3_MI28 (0x10000000)
  604. #define FLEXCAN_RXIMR3_MI29 (0x20000000)
  605. #define FLEXCAN_RXIMR3_MI30 (0x40000000)
  606. #define FLEXCAN_RXIMR3_MI31 (0x80000000)
  607. /* Bit definitions and macros for FLEXCAN_RXIMR4 */
  608. #define FLEXCAN_RXIMR4_MI0 (0x00000001)
  609. #define FLEXCAN_RXIMR4_MI1 (0x00000002)
  610. #define FLEXCAN_RXIMR4_MI2 (0x00000004)
  611. #define FLEXCAN_RXIMR4_MI3 (0x00000008)
  612. #define FLEXCAN_RXIMR4_MI4 (0x00000010)
  613. #define FLEXCAN_RXIMR4_MI5 (0x00000020)
  614. #define FLEXCAN_RXIMR4_MI6 (0x00000040)
  615. #define FLEXCAN_RXIMR4_MI7 (0x00000080)
  616. #define FLEXCAN_RXIMR4_MI8 (0x00000100)
  617. #define FLEXCAN_RXIMR4_MI9 (0x00000200)
  618. #define FLEXCAN_RXIMR4_MI10 (0x00000400)
  619. #define FLEXCAN_RXIMR4_MI11 (0x00000800)
  620. #define FLEXCAN_RXIMR4_MI12 (0x00001000)
  621. #define FLEXCAN_RXIMR4_MI13 (0x00002000)
  622. #define FLEXCAN_RXIMR4_MI14 (0x00004000)
  623. #define FLEXCAN_RXIMR4_MI15 (0x00008000)
  624. #define FLEXCAN_RXIMR4_MI16 (0x00010000)
  625. #define FLEXCAN_RXIMR4_MI17 (0x00020000)
  626. #define FLEXCAN_RXIMR4_MI18 (0x00040000)
  627. #define FLEXCAN_RXIMR4_MI19 (0x00080000)
  628. #define FLEXCAN_RXIMR4_MI20 (0x00100000)
  629. #define FLEXCAN_RXIMR4_MI21 (0x00200000)
  630. #define FLEXCAN_RXIMR4_MI22 (0x00400000)
  631. #define FLEXCAN_RXIMR4_MI23 (0x00800000)
  632. #define FLEXCAN_RXIMR4_MI24 (0x01000000)
  633. #define FLEXCAN_RXIMR4_MI25 (0x02000000)
  634. #define FLEXCAN_RXIMR4_MI26 (0x04000000)
  635. #define FLEXCAN_RXIMR4_MI27 (0x08000000)
  636. #define FLEXCAN_RXIMR4_MI28 (0x10000000)
  637. #define FLEXCAN_RXIMR4_MI29 (0x20000000)
  638. #define FLEXCAN_RXIMR4_MI30 (0x40000000)
  639. #define FLEXCAN_RXIMR4_MI31 (0x80000000)
  640. /* Bit definitions and macros for FLEXCAN_RXIMR5 */
  641. #define FLEXCAN_RXIMR5_MI0 (0x00000001)
  642. #define FLEXCAN_RXIMR5_MI1 (0x00000002)
  643. #define FLEXCAN_RXIMR5_MI2 (0x00000004)
  644. #define FLEXCAN_RXIMR5_MI3 (0x00000008)
  645. #define FLEXCAN_RXIMR5_MI4 (0x00000010)
  646. #define FLEXCAN_RXIMR5_MI5 (0x00000020)
  647. #define FLEXCAN_RXIMR5_MI6 (0x00000040)
  648. #define FLEXCAN_RXIMR5_MI7 (0x00000080)
  649. #define FLEXCAN_RXIMR5_MI8 (0x00000100)
  650. #define FLEXCAN_RXIMR5_MI9 (0x00000200)
  651. #define FLEXCAN_RXIMR5_MI10 (0x00000400)
  652. #define FLEXCAN_RXIMR5_MI11 (0x00000800)
  653. #define FLEXCAN_RXIMR5_MI12 (0x00001000)
  654. #define FLEXCAN_RXIMR5_MI13 (0x00002000)
  655. #define FLEXCAN_RXIMR5_MI14 (0x00004000)
  656. #define FLEXCAN_RXIMR5_MI15 (0x00008000)
  657. #define FLEXCAN_RXIMR5_MI16 (0x00010000)
  658. #define FLEXCAN_RXIMR5_MI17 (0x00020000)
  659. #define FLEXCAN_RXIMR5_MI18 (0x00040000)
  660. #define FLEXCAN_RXIMR5_MI19 (0x00080000)
  661. #define FLEXCAN_RXIMR5_MI20 (0x00100000)
  662. #define FLEXCAN_RXIMR5_MI21 (0x00200000)
  663. #define FLEXCAN_RXIMR5_MI22 (0x00400000)
  664. #define FLEXCAN_RXIMR5_MI23 (0x00800000)
  665. #define FLEXCAN_RXIMR5_MI24 (0x01000000)
  666. #define FLEXCAN_RXIMR5_MI25 (0x02000000)
  667. #define FLEXCAN_RXIMR5_MI26 (0x04000000)
  668. #define FLEXCAN_RXIMR5_MI27 (0x08000000)
  669. #define FLEXCAN_RXIMR5_MI28 (0x10000000)
  670. #define FLEXCAN_RXIMR5_MI29 (0x20000000)
  671. #define FLEXCAN_RXIMR5_MI30 (0x40000000)
  672. #define FLEXCAN_RXIMR5_MI31 (0x80000000)
  673. /* Bit definitions and macros for FLEXCAN_RXIMR6 */
  674. #define FLEXCAN_RXIMR6_MI0 (0x00000001)
  675. #define FLEXCAN_RXIMR6_MI1 (0x00000002)
  676. #define FLEXCAN_RXIMR6_MI2 (0x00000004)
  677. #define FLEXCAN_RXIMR6_MI3 (0x00000008)
  678. #define FLEXCAN_RXIMR6_MI4 (0x00000010)
  679. #define FLEXCAN_RXIMR6_MI5 (0x00000020)
  680. #define FLEXCAN_RXIMR6_MI6 (0x00000040)
  681. #define FLEXCAN_RXIMR6_MI7 (0x00000080)
  682. #define FLEXCAN_RXIMR6_MI8 (0x00000100)
  683. #define FLEXCAN_RXIMR6_MI9 (0x00000200)
  684. #define FLEXCAN_RXIMR6_MI10 (0x00000400)
  685. #define FLEXCAN_RXIMR6_MI11 (0x00000800)
  686. #define FLEXCAN_RXIMR6_MI12 (0x00001000)
  687. #define FLEXCAN_RXIMR6_MI13 (0x00002000)
  688. #define FLEXCAN_RXIMR6_MI14 (0x00004000)
  689. #define FLEXCAN_RXIMR6_MI15 (0x00008000)
  690. #define FLEXCAN_RXIMR6_MI16 (0x00010000)
  691. #define FLEXCAN_RXIMR6_MI17 (0x00020000)
  692. #define FLEXCAN_RXIMR6_MI18 (0x00040000)
  693. #define FLEXCAN_RXIMR6_MI19 (0x00080000)
  694. #define FLEXCAN_RXIMR6_MI20 (0x00100000)
  695. #define FLEXCAN_RXIMR6_MI21 (0x00200000)
  696. #define FLEXCAN_RXIMR6_MI22 (0x00400000)
  697. #define FLEXCAN_RXIMR6_MI23 (0x00800000)
  698. #define FLEXCAN_RXIMR6_MI24 (0x01000000)
  699. #define FLEXCAN_RXIMR6_MI25 (0x02000000)
  700. #define FLEXCAN_RXIMR6_MI26 (0x04000000)
  701. #define FLEXCAN_RXIMR6_MI27 (0x08000000)
  702. #define FLEXCAN_RXIMR6_MI28 (0x10000000)
  703. #define FLEXCAN_RXIMR6_MI29 (0x20000000)
  704. #define FLEXCAN_RXIMR6_MI30 (0x40000000)
  705. #define FLEXCAN_RXIMR6_MI31 (0x80000000)
  706. /* Bit definitions and macros for FLEXCAN_RXIMR7 */
  707. #define FLEXCAN_RXIMR7_MI0 (0x00000001)
  708. #define FLEXCAN_RXIMR7_MI1 (0x00000002)
  709. #define FLEXCAN_RXIMR7_MI2 (0x00000004)
  710. #define FLEXCAN_RXIMR7_MI3 (0x00000008)
  711. #define FLEXCAN_RXIMR7_MI4 (0x00000010)
  712. #define FLEXCAN_RXIMR7_MI5 (0x00000020)
  713. #define FLEXCAN_RXIMR7_MI6 (0x00000040)
  714. #define FLEXCAN_RXIMR7_MI7 (0x00000080)
  715. #define FLEXCAN_RXIMR7_MI8 (0x00000100)
  716. #define FLEXCAN_RXIMR7_MI9 (0x00000200)
  717. #define FLEXCAN_RXIMR7_MI10 (0x00000400)
  718. #define FLEXCAN_RXIMR7_MI11 (0x00000800)
  719. #define FLEXCAN_RXIMR7_MI12 (0x00001000)
  720. #define FLEXCAN_RXIMR7_MI13 (0x00002000)
  721. #define FLEXCAN_RXIMR7_MI14 (0x00004000)
  722. #define FLEXCAN_RXIMR7_MI15 (0x00008000)
  723. #define FLEXCAN_RXIMR7_MI16 (0x00010000)
  724. #define FLEXCAN_RXIMR7_MI17 (0x00020000)
  725. #define FLEXCAN_RXIMR7_MI18 (0x00040000)
  726. #define FLEXCAN_RXIMR7_MI19 (0x00080000)
  727. #define FLEXCAN_RXIMR7_MI20 (0x00100000)
  728. #define FLEXCAN_RXIMR7_MI21 (0x00200000)
  729. #define FLEXCAN_RXIMR7_MI22 (0x00400000)
  730. #define FLEXCAN_RXIMR7_MI23 (0x00800000)
  731. #define FLEXCAN_RXIMR7_MI24 (0x01000000)
  732. #define FLEXCAN_RXIMR7_MI25 (0x02000000)
  733. #define FLEXCAN_RXIMR7_MI26 (0x04000000)
  734. #define FLEXCAN_RXIMR7_MI27 (0x08000000)
  735. #define FLEXCAN_RXIMR7_MI28 (0x10000000)
  736. #define FLEXCAN_RXIMR7_MI29 (0x20000000)
  737. #define FLEXCAN_RXIMR7_MI30 (0x40000000)
  738. #define FLEXCAN_RXIMR7_MI31 (0x80000000)
  739. /* Bit definitions and macros for FLEXCAN_RXIMR8 */
  740. #define FLEXCAN_RXIMR8_MI0 (0x00000001)
  741. #define FLEXCAN_RXIMR8_MI1 (0x00000002)
  742. #define FLEXCAN_RXIMR8_MI2 (0x00000004)
  743. #define FLEXCAN_RXIMR8_MI3 (0x00000008)
  744. #define FLEXCAN_RXIMR8_MI4 (0x00000010)
  745. #define FLEXCAN_RXIMR8_MI5 (0x00000020)
  746. #define FLEXCAN_RXIMR8_MI6 (0x00000040)
  747. #define FLEXCAN_RXIMR8_MI7 (0x00000080)
  748. #define FLEXCAN_RXIMR8_MI8 (0x00000100)
  749. #define FLEXCAN_RXIMR8_MI9 (0x00000200)
  750. #define FLEXCAN_RXIMR8_MI10 (0x00000400)
  751. #define FLEXCAN_RXIMR8_MI11 (0x00000800)
  752. #define FLEXCAN_RXIMR8_MI12 (0x00001000)
  753. #define FLEXCAN_RXIMR8_MI13 (0x00002000)
  754. #define FLEXCAN_RXIMR8_MI14 (0x00004000)
  755. #define FLEXCAN_RXIMR8_MI15 (0x00008000)
  756. #define FLEXCAN_RXIMR8_MI16 (0x00010000)
  757. #define FLEXCAN_RXIMR8_MI17 (0x00020000)
  758. #define FLEXCAN_RXIMR8_MI18 (0x00040000)
  759. #define FLEXCAN_RXIMR8_MI19 (0x00080000)
  760. #define FLEXCAN_RXIMR8_MI20 (0x00100000)
  761. #define FLEXCAN_RXIMR8_MI21 (0x00200000)
  762. #define FLEXCAN_RXIMR8_MI22 (0x00400000)
  763. #define FLEXCAN_RXIMR8_MI23 (0x00800000)
  764. #define FLEXCAN_RXIMR8_MI24 (0x01000000)
  765. #define FLEXCAN_RXIMR8_MI25 (0x02000000)
  766. #define FLEXCAN_RXIMR8_MI26 (0x04000000)
  767. #define FLEXCAN_RXIMR8_MI27 (0x08000000)
  768. #define FLEXCAN_RXIMR8_MI28 (0x10000000)
  769. #define FLEXCAN_RXIMR8_MI29 (0x20000000)
  770. #define FLEXCAN_RXIMR8_MI30 (0x40000000)
  771. #define FLEXCAN_RXIMR8_MI31 (0x80000000)
  772. /* Bit definitions and macros for FLEXCAN_RXIMR9 */
  773. #define FLEXCAN_RXIMR9_MI0 (0x00000001)
  774. #define FLEXCAN_RXIMR9_MI1 (0x00000002)
  775. #define FLEXCAN_RXIMR9_MI2 (0x00000004)
  776. #define FLEXCAN_RXIMR9_MI3 (0x00000008)
  777. #define FLEXCAN_RXIMR9_MI4 (0x00000010)
  778. #define FLEXCAN_RXIMR9_MI5 (0x00000020)
  779. #define FLEXCAN_RXIMR9_MI6 (0x00000040)
  780. #define FLEXCAN_RXIMR9_MI7 (0x00000080)
  781. #define FLEXCAN_RXIMR9_MI8 (0x00000100)
  782. #define FLEXCAN_RXIMR9_MI9 (0x00000200)
  783. #define FLEXCAN_RXIMR9_MI10 (0x00000400)
  784. #define FLEXCAN_RXIMR9_MI11 (0x00000800)
  785. #define FLEXCAN_RXIMR9_MI12 (0x00001000)
  786. #define FLEXCAN_RXIMR9_MI13 (0x00002000)
  787. #define FLEXCAN_RXIMR9_MI14 (0x00004000)
  788. #define FLEXCAN_RXIMR9_MI15 (0x00008000)
  789. #define FLEXCAN_RXIMR9_MI16 (0x00010000)
  790. #define FLEXCAN_RXIMR9_MI17 (0x00020000)
  791. #define FLEXCAN_RXIMR9_MI18 (0x00040000)
  792. #define FLEXCAN_RXIMR9_MI19 (0x00080000)
  793. #define FLEXCAN_RXIMR9_MI20 (0x00100000)
  794. #define FLEXCAN_RXIMR9_MI21 (0x00200000)
  795. #define FLEXCAN_RXIMR9_MI22 (0x00400000)
  796. #define FLEXCAN_RXIMR9_MI23 (0x00800000)
  797. #define FLEXCAN_RXIMR9_MI24 (0x01000000)
  798. #define FLEXCAN_RXIMR9_MI25 (0x02000000)
  799. #define FLEXCAN_RXIMR9_MI26 (0x04000000)
  800. #define FLEXCAN_RXIMR9_MI27 (0x08000000)
  801. #define FLEXCAN_RXIMR9_MI28 (0x10000000)
  802. #define FLEXCAN_RXIMR9_MI29 (0x20000000)
  803. #define FLEXCAN_RXIMR9_MI30 (0x40000000)
  804. #define FLEXCAN_RXIMR9_MI31 (0x80000000)
  805. /* Bit definitions and macros for FLEXCAN_RXIMR10 */
  806. #define FLEXCAN_RXIMR10_MI0 (0x00000001)
  807. #define FLEXCAN_RXIMR10_MI1 (0x00000002)
  808. #define FLEXCAN_RXIMR10_MI2 (0x00000004)
  809. #define FLEXCAN_RXIMR10_MI3 (0x00000008)
  810. #define FLEXCAN_RXIMR10_MI4 (0x00000010)
  811. #define FLEXCAN_RXIMR10_MI5 (0x00000020)
  812. #define FLEXCAN_RXIMR10_MI6 (0x00000040)
  813. #define FLEXCAN_RXIMR10_MI7 (0x00000080)
  814. #define FLEXCAN_RXIMR10_MI8 (0x00000100)
  815. #define FLEXCAN_RXIMR10_MI9 (0x00000200)
  816. #define FLEXCAN_RXIMR10_MI10 (0x00000400)
  817. #define FLEXCAN_RXIMR10_MI11 (0x00000800)
  818. #define FLEXCAN_RXIMR10_MI12 (0x00001000)
  819. #define FLEXCAN_RXIMR10_MI13 (0x00002000)
  820. #define FLEXCAN_RXIMR10_MI14 (0x00004000)
  821. #define FLEXCAN_RXIMR10_MI15 (0x00008000)
  822. #define FLEXCAN_RXIMR10_MI16 (0x00010000)
  823. #define FLEXCAN_RXIMR10_MI17 (0x00020000)
  824. #define FLEXCAN_RXIMR10_MI18 (0x00040000)
  825. #define FLEXCAN_RXIMR10_MI19 (0x00080000)
  826. #define FLEXCAN_RXIMR10_MI20 (0x00100000)
  827. #define FLEXCAN_RXIMR10_MI21 (0x00200000)
  828. #define FLEXCAN_RXIMR10_MI22 (0x00400000)
  829. #define FLEXCAN_RXIMR10_MI23 (0x00800000)
  830. #define FLEXCAN_RXIMR10_MI24 (0x01000000)
  831. #define FLEXCAN_RXIMR10_MI25 (0x02000000)
  832. #define FLEXCAN_RXIMR10_MI26 (0x04000000)
  833. #define FLEXCAN_RXIMR10_MI27 (0x08000000)
  834. #define FLEXCAN_RXIMR10_MI28 (0x10000000)
  835. #define FLEXCAN_RXIMR10_MI29 (0x20000000)
  836. #define FLEXCAN_RXIMR10_MI30 (0x40000000)
  837. #define FLEXCAN_RXIMR10_MI31 (0x80000000)
  838. /* Bit definitions and macros for FLEXCAN_RXIMR11 */
  839. #define FLEXCAN_RXIMR11_MI0 (0x00000001)
  840. #define FLEXCAN_RXIMR11_MI1 (0x00000002)
  841. #define FLEXCAN_RXIMR11_MI2 (0x00000004)
  842. #define FLEXCAN_RXIMR11_MI3 (0x00000008)
  843. #define FLEXCAN_RXIMR11_MI4 (0x00000010)
  844. #define FLEXCAN_RXIMR11_MI5 (0x00000020)
  845. #define FLEXCAN_RXIMR11_MI6 (0x00000040)
  846. #define FLEXCAN_RXIMR11_MI7 (0x00000080)
  847. #define FLEXCAN_RXIMR11_MI8 (0x00000100)
  848. #define FLEXCAN_RXIMR11_MI9 (0x00000200)
  849. #define FLEXCAN_RXIMR11_MI10 (0x00000400)
  850. #define FLEXCAN_RXIMR11_MI11 (0x00000800)
  851. #define FLEXCAN_RXIMR11_MI12 (0x00001000)
  852. #define FLEXCAN_RXIMR11_MI13 (0x00002000)
  853. #define FLEXCAN_RXIMR11_MI14 (0x00004000)
  854. #define FLEXCAN_RXIMR11_MI15 (0x00008000)
  855. #define FLEXCAN_RXIMR11_MI16 (0x00010000)
  856. #define FLEXCAN_RXIMR11_MI17 (0x00020000)
  857. #define FLEXCAN_RXIMR11_MI18 (0x00040000)
  858. #define FLEXCAN_RXIMR11_MI19 (0x00080000)
  859. #define FLEXCAN_RXIMR11_MI20 (0x00100000)
  860. #define FLEXCAN_RXIMR11_MI21 (0x00200000)
  861. #define FLEXCAN_RXIMR11_MI22 (0x00400000)
  862. #define FLEXCAN_RXIMR11_MI23 (0x00800000)
  863. #define FLEXCAN_RXIMR11_MI24 (0x01000000)
  864. #define FLEXCAN_RXIMR11_MI25 (0x02000000)
  865. #define FLEXCAN_RXIMR11_MI26 (0x04000000)
  866. #define FLEXCAN_RXIMR11_MI27 (0x08000000)
  867. #define FLEXCAN_RXIMR11_MI28 (0x10000000)
  868. #define FLEXCAN_RXIMR11_MI29 (0x20000000)
  869. #define FLEXCAN_RXIMR11_MI30 (0x40000000)
  870. #define FLEXCAN_RXIMR11_MI31 (0x80000000)
  871. /* Bit definitions and macros for FLEXCAN_RXIMR12 */
  872. #define FLEXCAN_RXIMR12_MI0 (0x00000001)
  873. #define FLEXCAN_RXIMR12_MI1 (0x00000002)
  874. #define FLEXCAN_RXIMR12_MI2 (0x00000004)
  875. #define FLEXCAN_RXIMR12_MI3 (0x00000008)
  876. #define FLEXCAN_RXIMR12_MI4 (0x00000010)
  877. #define FLEXCAN_RXIMR12_MI5 (0x00000020)
  878. #define FLEXCAN_RXIMR12_MI6 (0x00000040)
  879. #define FLEXCAN_RXIMR12_MI7 (0x00000080)
  880. #define FLEXCAN_RXIMR12_MI8 (0x00000100)
  881. #define FLEXCAN_RXIMR12_MI9 (0x00000200)
  882. #define FLEXCAN_RXIMR12_MI10 (0x00000400)
  883. #define FLEXCAN_RXIMR12_MI11 (0x00000800)
  884. #define FLEXCAN_RXIMR12_MI12 (0x00001000)
  885. #define FLEXCAN_RXIMR12_MI13 (0x00002000)
  886. #define FLEXCAN_RXIMR12_MI14 (0x00004000)
  887. #define FLEXCAN_RXIMR12_MI15 (0x00008000)
  888. #define FLEXCAN_RXIMR12_MI16 (0x00010000)
  889. #define FLEXCAN_RXIMR12_MI17 (0x00020000)
  890. #define FLEXCAN_RXIMR12_MI18 (0x00040000)
  891. #define FLEXCAN_RXIMR12_MI19 (0x00080000)
  892. #define FLEXCAN_RXIMR12_MI20 (0x00100000)
  893. #define FLEXCAN_RXIMR12_MI21 (0x00200000)
  894. #define FLEXCAN_RXIMR12_MI22 (0x00400000)
  895. #define FLEXCAN_RXIMR12_MI23 (0x00800000)
  896. #define FLEXCAN_RXIMR12_MI24 (0x01000000)
  897. #define FLEXCAN_RXIMR12_MI25 (0x02000000)
  898. #define FLEXCAN_RXIMR12_MI26 (0x04000000)
  899. #define FLEXCAN_RXIMR12_MI27 (0x08000000)
  900. #define FLEXCAN_RXIMR12_MI28 (0x10000000)
  901. #define FLEXCAN_RXIMR12_MI29 (0x20000000)
  902. #define FLEXCAN_RXIMR12_MI30 (0x40000000)
  903. #define FLEXCAN_RXIMR12_MI31 (0x80000000)
  904. /* Bit definitions and macros for FLEXCAN_RXIMR13 */
  905. #define FLEXCAN_RXIMR13_MI0 (0x00000001)
  906. #define FLEXCAN_RXIMR13_MI1 (0x00000002)
  907. #define FLEXCAN_RXIMR13_MI2 (0x00000004)
  908. #define FLEXCAN_RXIMR13_MI3 (0x00000008)
  909. #define FLEXCAN_RXIMR13_MI4 (0x00000010)
  910. #define FLEXCAN_RXIMR13_MI5 (0x00000020)
  911. #define FLEXCAN_RXIMR13_MI6 (0x00000040)
  912. #define FLEXCAN_RXIMR13_MI7 (0x00000080)
  913. #define FLEXCAN_RXIMR13_MI8 (0x00000100)
  914. #define FLEXCAN_RXIMR13_MI9 (0x00000200)
  915. #define FLEXCAN_RXIMR13_MI10 (0x00000400)
  916. #define FLEXCAN_RXIMR13_MI11 (0x00000800)
  917. #define FLEXCAN_RXIMR13_MI12 (0x00001000)
  918. #define FLEXCAN_RXIMR13_MI13 (0x00002000)
  919. #define FLEXCAN_RXIMR13_MI14 (0x00004000)
  920. #define FLEXCAN_RXIMR13_MI15 (0x00008000)
  921. #define FLEXCAN_RXIMR13_MI16 (0x00010000)
  922. #define FLEXCAN_RXIMR13_MI17 (0x00020000)
  923. #define FLEXCAN_RXIMR13_MI18 (0x00040000)
  924. #define FLEXCAN_RXIMR13_MI19 (0x00080000)
  925. #define FLEXCAN_RXIMR13_MI20 (0x00100000)
  926. #define FLEXCAN_RXIMR13_MI21 (0x00200000)
  927. #define FLEXCAN_RXIMR13_MI22 (0x00400000)
  928. #define FLEXCAN_RXIMR13_MI23 (0x00800000)
  929. #define FLEXCAN_RXIMR13_MI24 (0x01000000)
  930. #define FLEXCAN_RXIMR13_MI25 (0x02000000)
  931. #define FLEXCAN_RXIMR13_MI26 (0x04000000)
  932. #define FLEXCAN_RXIMR13_MI27 (0x08000000)
  933. #define FLEXCAN_RXIMR13_MI28 (0x10000000)
  934. #define FLEXCAN_RXIMR13_MI29 (0x20000000)
  935. #define FLEXCAN_RXIMR13_MI30 (0x40000000)
  936. #define FLEXCAN_RXIMR13_MI31 (0x80000000)
  937. /* Bit definitions and macros for FLEXCAN_RXIMR14 */
  938. #define FLEXCAN_RXIMR14_MI0 (0x00000001)
  939. #define FLEXCAN_RXIMR14_MI1 (0x00000002)
  940. #define FLEXCAN_RXIMR14_MI2 (0x00000004)
  941. #define FLEXCAN_RXIMR14_MI3 (0x00000008)
  942. #define FLEXCAN_RXIMR14_MI4 (0x00000010)
  943. #define FLEXCAN_RXIMR14_MI5 (0x00000020)
  944. #define FLEXCAN_RXIMR14_MI6 (0x00000040)
  945. #define FLEXCAN_RXIMR14_MI7 (0x00000080)
  946. #define FLEXCAN_RXIMR14_MI8 (0x00000100)
  947. #define FLEXCAN_RXIMR14_MI9 (0x00000200)
  948. #define FLEXCAN_RXIMR14_MI10 (0x00000400)
  949. #define FLEXCAN_RXIMR14_MI11 (0x00000800)
  950. #define FLEXCAN_RXIMR14_MI12 (0x00001000)
  951. #define FLEXCAN_RXIMR14_MI13 (0x00002000)
  952. #define FLEXCAN_RXIMR14_MI14 (0x00004000)
  953. #define FLEXCAN_RXIMR14_MI15 (0x00008000)
  954. #define FLEXCAN_RXIMR14_MI16 (0x00010000)
  955. #define FLEXCAN_RXIMR14_MI17 (0x00020000)
  956. #define FLEXCAN_RXIMR14_MI18 (0x00040000)
  957. #define FLEXCAN_RXIMR14_MI19 (0x00080000)
  958. #define FLEXCAN_RXIMR14_MI20 (0x00100000)
  959. #define FLEXCAN_RXIMR14_MI21 (0x00200000)
  960. #define FLEXCAN_RXIMR14_MI22 (0x00400000)
  961. #define FLEXCAN_RXIMR14_MI23 (0x00800000)
  962. #define FLEXCAN_RXIMR14_MI24 (0x01000000)
  963. #define FLEXCAN_RXIMR14_MI25 (0x02000000)
  964. #define FLEXCAN_RXIMR14_MI26 (0x04000000)
  965. #define FLEXCAN_RXIMR14_MI27 (0x08000000)
  966. #define FLEXCAN_RXIMR14_MI28 (0x10000000)
  967. #define FLEXCAN_RXIMR14_MI29 (0x20000000)
  968. #define FLEXCAN_RXIMR14_MI30 (0x40000000)
  969. #define FLEXCAN_RXIMR14_MI31 (0x80000000)
  970. /* Bit definitions and macros for FLEXCAN_RXIMR15 */
  971. #define FLEXCAN_RXIMR15_MI0 (0x00000001)
  972. #define FLEXCAN_RXIMR15_MI1 (0x00000002)
  973. #define FLEXCAN_RXIMR15_MI2 (0x00000004)
  974. #define FLEXCAN_RXIMR15_MI3 (0x00000008)
  975. #define FLEXCAN_RXIMR15_MI4 (0x00000010)
  976. #define FLEXCAN_RXIMR15_MI5 (0x00000020)
  977. #define FLEXCAN_RXIMR15_MI6 (0x00000040)
  978. #define FLEXCAN_RXIMR15_MI7 (0x00000080)
  979. #define FLEXCAN_RXIMR15_MI8 (0x00000100)
  980. #define FLEXCAN_RXIMR15_MI9 (0x00000200)
  981. #define FLEXCAN_RXIMR15_MI10 (0x00000400)
  982. #define FLEXCAN_RXIMR15_MI11 (0x00000800)
  983. #define FLEXCAN_RXIMR15_MI12 (0x00001000)
  984. #define FLEXCAN_RXIMR15_MI13 (0x00002000)
  985. #define FLEXCAN_RXIMR15_MI14 (0x00004000)
  986. #define FLEXCAN_RXIMR15_MI15 (0x00008000)
  987. #define FLEXCAN_RXIMR15_MI16 (0x00010000)
  988. #define FLEXCAN_RXIMR15_MI17 (0x00020000)
  989. #define FLEXCAN_RXIMR15_MI18 (0x00040000)
  990. #define FLEXCAN_RXIMR15_MI19 (0x00080000)
  991. #define FLEXCAN_RXIMR15_MI20 (0x00100000)
  992. #define FLEXCAN_RXIMR15_MI21 (0x00200000)
  993. #define FLEXCAN_RXIMR15_MI22 (0x00400000)
  994. #define FLEXCAN_RXIMR15_MI23 (0x00800000)
  995. #define FLEXCAN_RXIMR15_MI24 (0x01000000)
  996. #define FLEXCAN_RXIMR15_MI25 (0x02000000)
  997. #define FLEXCAN_RXIMR15_MI26 (0x04000000)
  998. #define FLEXCAN_RXIMR15_MI27 (0x08000000)
  999. #define FLEXCAN_RXIMR15_MI28 (0x10000000)
  1000. #define FLEXCAN_RXIMR15_MI29 (0x20000000)
  1001. #define FLEXCAN_RXIMR15_MI30 (0x40000000)
  1002. #define FLEXCAN_RXIMR15_MI31 (0x80000000)
  1003. /* Bit definitions for CRC register */
  1004. #define FLEXCAN_CRCR_MBCRC_BIT_NO (16)
  1005. #define FLEXCAN_CRCR_MBCRC_MASK (0x007F0000)
  1006. #define FLEXCAN_CRCR_CRC_BIT_NO (0)
  1007. #define FLEXCAN_CRCR_CRC_MASK (0x00007FFF)
  1008. /* Bit definition for Individual Matching Elements Update Register (IMEUR) */
  1009. #define FLEXCAN_IMEUR_IMEUP_MASK (0x0000007F)
  1010. #define FLEXCAN_IMEUR_IMEUP_BIT_NO (0)
  1011. #define FLEXCAN_IMEUR_IMEUREQ_MASK (0x00000100)
  1012. #define FLEXCAN_IMEUR_IMEUACK_MASK (0x00000200)
  1013. #define FLEXCAN_Set_IMEUP(imeur,imeup) imeur = (imeur & ~(FLEXCAN_IMEUR_IMEUP_MASK)) | (imeup & FLEXCAN_IMEUR_IMEUP_MASK)
  1014. #define FLEXCAN_Get_IMEUP(imeur) (imeur & FLEXCAN_IMEUR_IMEUP_MASK)
  1015. /* Bit definition for Lost Rx Frames Register (LRFR)
  1016. */
  1017. #define FLEXCAN_LRFR_LOSTRLP_MASK (0x007F0000)
  1018. #define FLEXCAN_LRFR_LFIFOMTC_MASK (0x00008000)
  1019. #define FLEXCAN_LRFR_LOSTRMP_MASK (0x000001FF)
  1020. #define FLEXCAN_LRFR_LOSTRLP_BIT_NO (16)
  1021. #define FLEXCAN_LRFR_LFIFOMTC_BIT_NO (15)
  1022. #define FLEXCAN_LRFR_LOSTRMP_BIT_NO (0)
  1023. #define FLEXCAN_Get_LostMBLocked(lrfr) ((lrfr & FLEXCAN_LRFR_LOSTRLP_MASK)>>(FLEXCAN_LRFR_LOSTRLP_BIT_NO))
  1024. #define FLEXCAN_Get_LostMBUpdated(lrfr) ((lrfr & FLEXCAN_LRFR_LOSTRMP_MASK))
  1025. /* Bit definition for Memory Error Control Register */
  1026. #define FLEXCAN_MECR_NCEFAFRZ_MASK (0x00000080)
  1027. #define FLEXCAN_MECR_RERRDIS_MASK (0x00000100)
  1028. #define FLEXCAN_MECR_EXTERRIE_MAKS (0x00002000)
  1029. #define FLEXCAN_MECR_FAERRIE_MAKS (0x00004000)
  1030. #define FLEXCAN_MECR_HAERRIE_MAKS (0x00008000)
  1031. #define FLEXCAN_MECR_CEI_MSK_MAKS (0x00010000)
  1032. #define FLEXCAN_MECR_FANCEI_MSK_MAKS (0x00040000)
  1033. #define FLEXCAN_MECR_HANCEI_MSK_MAKS (0x00080000)
  1034. #define FLEXCAN_MECR_ECRWRDIS_MSK_MAKS (0x80000000)
  1035. /* Bit definition for Error Report Address Register (RERRAR) */
  1036. #define FLEXCAN_RERRAR_NCE_MASK (0x01000000)
  1037. #define FLEXCAN_RERRAR_SAID_MASK (0x00070000)
  1038. #define FLEXCAN_ERRADDR_MASK (0x00003FFF)
  1039. /* Bit definition for Error Report Syndrome Register (RERRSYNR) */
  1040. #define FLEXCAN_RERRSYNR_BE3_MASK (0x80000000)
  1041. #define FLEXCAN_RERRSYNR_SYND3_MASK (0x1F000000)
  1042. #define FLEXCAN_RERRSYNR_SYND3_BIT_NO (24)
  1043. #define FLEXCAN_RERRSYNR_BE2_MASK (0x00800000)
  1044. #define FLEXCAN_RERRSYNR_SYND2_MASK (0x001F0000)
  1045. #define FLEXCAN_RERRSYNR_SYND2_BIT_NO (16)
  1046. #define FLEXCAN_RERRSYNR_BE1_MASK (0x00008000)
  1047. #define FLEXCAN_RERRSYNR_SYND1_MASK (0x00001F00)
  1048. #define FLEXCAN_RERRSYNR_SYND1_BIT_NO (8)
  1049. #define FLEXCAN_RERRSYNR_BE0_MASK (0x00000080)
  1050. #define FLEXCAN_RERRSYNR_SYND0_MASK (0x0000001F)
  1051. #define FLEXCAN_RERRSYNR_SYND0_BIT_NO (0)
  1052. #define FLEXCAN_RERRSYNR_check_BEn_Bit(errsynr,n) (errsynr & FLEXCAN_RERRSYNR_BE##n##_MASK)
  1053. #define FLEXCAN_RERRSYNR_get_SYNDn(errsynr,n) (errsynr & FLEXCAN_RERRSYNR_SYND##n##_MASK)
  1054. #define FLEXCAN_RERRSYNR_check_SYNDn_Bit(errsynr,n) ((errsynr & FLEXCAN_RERRSYNR_SYND##n##_MASK)>>FLEXCAN_RERRSYNR_SYND##n##_BIT_NO)
  1055. /* Bit definition for Error Status Register (ERRSR) */
  1056. #define FLEXCAN_ERRSR_CEIOF_MASK (0x00000001)
  1057. #define FLEXCAN_ERRSR_FANCEIOF_MASK (0x00000004)
  1058. #define FLEXCAN_ERRSR_HANCEIOF_MASK (0x00000008)
  1059. #define FLEXCAN_ERRSR_CEIF_MASK (0x00010000)
  1060. #define FLEXCAN_ERRSR_FANCEIF_MASK (0x00040000)
  1061. #define FLEXCAN_ERRSR_HANCEIF_MASK (0x00080000)
  1062. /********************************************************************/
  1063. #endif // __KINETIS_FLEXCAN_H