PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2017, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #if defined(__IMXRT1062__)
  27. #include <Arduino.h>
  28. #include "output_tdm2.h"
  29. #include "memcpy_audio.h"
  30. #include "utility/imxrt_hw.h"
  31. audio_block_t * AudioOutputTDM2::block_input[16] = {
  32. nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
  33. nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr
  34. };
  35. bool AudioOutputTDM2::update_responsibility = false;
  36. DMAChannel AudioOutputTDM2::dma(false);
  37. DMAMEM __attribute__((aligned(32)))
  38. static uint32_t zeros[AUDIO_BLOCK_SAMPLES/2];
  39. DMAMEM __attribute__((aligned(32)))
  40. static uint32_t tdm_tx_buffer[AUDIO_BLOCK_SAMPLES*16];
  41. void AudioOutputTDM2::begin(void)
  42. {
  43. dma.begin(true); // Allocate the DMA channel first
  44. for (int i=0; i < 16; i++) {
  45. block_input[i] = nullptr;
  46. }
  47. // TODO: should we set & clear the I2S_TCSR_SR bit here?
  48. config_tdm();
  49. CORE_PIN2_CONFIG = 2; //2:TX_DATA0
  50. dma.TCD->SADDR = tdm_tx_buffer;
  51. dma.TCD->SOFF = 4;
  52. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2);
  53. dma.TCD->NBYTES_MLNO = 4;
  54. dma.TCD->SLAST = -sizeof(tdm_tx_buffer);
  55. dma.TCD->DADDR = &I2S2_TDR0;
  56. dma.TCD->DOFF = 0;
  57. dma.TCD->CITER_ELINKNO = sizeof(tdm_tx_buffer) / 4;
  58. dma.TCD->DLASTSGA = 0;
  59. dma.TCD->BITER_ELINKNO = sizeof(tdm_tx_buffer) / 4;
  60. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  61. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SAI2_TX);
  62. update_responsibility = update_setup();
  63. dma.enable();
  64. //I2S2_RCSR |= I2S_RCSR_RE;
  65. I2S2_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE;
  66. dma.attachInterrupt(isr);
  67. }
  68. // TODO: needs optimization...
  69. static void memcpy_tdm_tx(uint32_t *dest, const uint32_t *src1, const uint32_t *src2)
  70. {
  71. uint32_t i, in1, in2, out1, out2;
  72. for (i=0; i < AUDIO_BLOCK_SAMPLES/2; i++) {
  73. in1 = *src1++;
  74. in2 = *src2++;
  75. out1 = (in1 << 16) | (in2 & 0xFFFF);
  76. out2 = (in1 & 0xFFFF0000) | (in2 >> 16);
  77. *dest = out1;
  78. *(dest + 8) = out2;
  79. in1 = *src1++;
  80. in2 = *src2++;
  81. out1 = (in1 << 16) | (in2 & 0xFFFF);
  82. out2 = (in1 & 0xFFFF0000) | (in2 >> 16);
  83. *(dest + 16)= out1;
  84. *(dest + 24) = out2;
  85. dest += 32;
  86. }
  87. }
  88. void AudioOutputTDM2::isr(void)
  89. {
  90. uint32_t *dest, *dc;
  91. const uint32_t *src1, *src2;
  92. uint32_t i, saddr;
  93. saddr = (uint32_t)(dma.TCD->SADDR);
  94. dma.clearInterrupt();
  95. if (saddr < (uint32_t)tdm_tx_buffer + sizeof(tdm_tx_buffer) / 2) {
  96. // DMA is transmitting the first half of the buffer
  97. // so we must fill the second half
  98. dest = tdm_tx_buffer + AUDIO_BLOCK_SAMPLES*8;
  99. } else {
  100. // DMA is transmitting the second half of the buffer
  101. // so we must fill the first half
  102. dest = tdm_tx_buffer;
  103. }
  104. if (update_responsibility) AudioStream::update_all();
  105. dc = dest;
  106. for (i=0; i < 16; i += 2) {
  107. src1 = block_input[i] ? (uint32_t *)(block_input[i]->data) : zeros;
  108. src2 = block_input[i+1] ? (uint32_t *)(block_input[i+1]->data) : zeros;
  109. memcpy_tdm_tx(dest, src1, src2);
  110. dest++;
  111. }
  112. #if IMXRT_CACHE_ENABLED >= 2
  113. arm_dcache_flush_delete(dc, sizeof(tdm_tx_buffer) / 2 );
  114. #endif
  115. for (i=0; i < 16; i++) {
  116. if (block_input[i]) {
  117. release(block_input[i]);
  118. block_input[i] = nullptr;
  119. }
  120. }
  121. }
  122. void AudioOutputTDM2::update(void)
  123. {
  124. audio_block_t *prev[16];
  125. unsigned int i;
  126. __disable_irq();
  127. for (i=0; i < 16; i++) {
  128. prev[i] = block_input[i];
  129. block_input[i] = receiveReadOnly(i);
  130. }
  131. __enable_irq();
  132. for (i=0; i < 16; i++) {
  133. if (prev[i]) release(prev[i]);
  134. }
  135. }
  136. void AudioOutputTDM2::config_tdm(void)
  137. {
  138. CCM_CCGR5 |= CCM_CCGR5_SAI2(CCM_CCGR_ON);
  139. // if either transmitter or receiver is enabled, do nothing
  140. if (I2S2_TCSR & I2S_TCSR_TE) return;
  141. if (I2S2_RCSR & I2S_RCSR_RE) return;
  142. //PLL:
  143. int fs = AUDIO_SAMPLE_RATE_EXACT; //176.4 khZ
  144. // PLL between 27*24 = 648MHz und 54*24=1296MHz
  145. int n1 = 4; //SAI prescaler 4 => (n1*n2) = multiple of 4
  146. int n2 = 1 + (24000000 * 27) / (fs * 256 * n1);
  147. double C = ((double)fs * 256 * n1 * n2) / 24000000;
  148. int c0 = C;
  149. int c2 = 10000;
  150. int c1 = C * c2 - (c0 * c2);
  151. set_audioClock(c0, c1, c2);
  152. // clear SAI1_CLK register locations
  153. CCM_CSCMR1 = (CCM_CSCMR1 & ~(CCM_CSCMR1_SAI2_CLK_SEL_MASK))
  154. | CCM_CSCMR1_SAI2_CLK_SEL(2); // &0x03 // (0,1,2): PLL3PFD0, PLL5, PLL4
  155. n1 = n1 / 2; //Double Speed for TDM
  156. CCM_CS2CDR = (CCM_CS2CDR & ~(CCM_CS2CDR_SAI2_CLK_PRED_MASK | CCM_CS2CDR_SAI2_CLK_PODF_MASK))
  157. | CCM_CS2CDR_SAI2_CLK_PRED(n1-1) // &0x07
  158. | CCM_CS2CDR_SAI2_CLK_PODF(n2-1); // &0x3f
  159. IOMUXC_GPR_GPR1 = (IOMUXC_GPR_GPR1 & ~(IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK))
  160. | (IOMUXC_GPR_GPR1_SAI2_MCLK_DIR | IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(0)); //Select MCLK
  161. // configure transmitter
  162. int rsync = 1;
  163. int tsync = 0;
  164. I2S2_TMR = 0;
  165. I2S2_TCR1 = I2S_TCR1_RFW(4);
  166. I2S2_TCR2 = I2S_TCR2_SYNC(tsync) | I2S_TCR2_BCP | I2S_TCR2_MSEL(1)
  167. | I2S_TCR2_BCD | I2S_TCR2_DIV(0);
  168. I2S2_TCR3 = I2S_TCR3_TCE;
  169. I2S2_TCR4 = I2S_TCR4_FRSZ(7) | I2S_TCR4_SYWD(0) | I2S_TCR4_MF
  170. | I2S_TCR4_FSE | I2S_TCR4_FSD;
  171. I2S2_TCR5 = I2S_TCR5_WNW(31) | I2S_TCR5_W0W(31) | I2S_TCR5_FBT(31);
  172. // configure receiver (sync'd to transmitter clocks)
  173. I2S2_RMR = 0;
  174. I2S2_RCR1 = I2S_RCR1_RFW(4);
  175. I2S2_RCR2 = I2S_RCR2_SYNC(rsync) | I2S_TCR2_BCP | I2S_RCR2_MSEL(1)
  176. | I2S_RCR2_BCD | I2S_RCR2_DIV(0);
  177. I2S2_RCR3 = I2S_RCR3_RCE;
  178. I2S2_RCR4 = I2S_RCR4_FRSZ(7) | I2S_RCR4_SYWD(0) | I2S_RCR4_MF
  179. | I2S_RCR4_FSE | I2S_RCR4_FSD;
  180. I2S2_RCR5 = I2S_RCR5_WNW(31) | I2S_RCR5_W0W(31) | I2S_RCR5_FBT(31);
  181. CORE_PIN33_CONFIG = 2; //2:MCLK
  182. CORE_PIN4_CONFIG = 2; //2:TX_BCLK
  183. CORE_PIN3_CONFIG = 2; //2:TX_SYNC
  184. }
  185. #endif