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PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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framework-arduinoteensy-cxx20/libraries/FastLED/platforms/avr/clockless_trinket.h

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  1. #ifndef __INC_CLOCKLESS_TRINKET_H

  2. #define __INC_CLOCKLESS_TRINKET_H

  3. 

  4. #include "../../controller.h"

  5. #include "../../lib8tion.h"

  6. #include <avr/interrupt.h> // for cli/se definitions

  7. 

  8. FASTLED_NAMESPACE_BEGIN

  9. 

  10. #if defined(FASTLED_AVR)

  11. 

  12. // Scaling macro choice

  13. #ifndef TRINKET_SCALE

  14. #define TRINKET_SCALE 1

  15. // whether or not to use dithering

  16. #define DITHER 1

  17. #endif

  18. 

  19. #if (F_CPU==8000000)

  20. #define FASTLED_SLOW_CLOCK_ADJUST // asm __volatile__ ("mov r0,r0\n\t");

  21. #else

  22. #define FASTLED_SLOW_CLOCK_ADJUST

  23. #endif

  24. 

  25. #define US_PER_TICK (64 / (F_CPU/1000000))

  26. 

  27. // Variations on the functions in delay.h - w/a loop var passed in to preserve registers across calls by the optimizer/compiler

  28. template<int CYCLES> inline void _dc(register uint8_t & loopvar);

  29. 

  30. template<int _LOOP, int PAD> __attribute__((always_inline)) inline void _dc_AVR(register uint8_t & loopvar) {

  31. 	_dc<PAD>(loopvar);

  32. 	// The convolution in here is to ensure that the state of the carry flag coming into the delay loop is preserved

  33. 	asm __volatile__ (  "BRCS L_PC%=\n\t"

  34. 						"        LDI %[loopvar], %[_LOOP]\n\tL_%=: DEC %[loopvar]\n\t BRNE L_%=\n\tBREQ L_DONE%=\n\t"

  35. 						"L_PC%=: LDI %[loopvar], %[_LOOP]\n\tLL_%=: DEC %[loopvar]\n\t BRNE LL_%=\n\tBSET 0\n\t"

  36. 						"L_DONE%=:\n\t"

  37. 						:

  38. 							[loopvar] "+a" (loopvar) : [_LOOP] "M" (_LOOP) : );

  39. }

  40. 

  41. template<int CYCLES> __attribute__((always_inline)) inline void _dc(register uint8_t & loopvar) {

  42. 	_dc_AVR<CYCLES/6,CYCLES%6>(loopvar);

  43. }

  44. template<> __attribute__((always_inline)) inline void _dc<-6>(register uint8_t & ) {}

  45. template<> __attribute__((always_inline)) inline void _dc<-5>(register uint8_t & ) {}

  46. template<> __attribute__((always_inline)) inline void _dc<-4>(register uint8_t & ) {}

  47. template<> __attribute__((always_inline)) inline void _dc<-3>(register uint8_t & ) {}

  48. template<> __attribute__((always_inline)) inline void _dc<-2>(register uint8_t & ) {}

  49. template<> __attribute__((always_inline)) inline void _dc<-1>(register uint8_t & ) {}

  50. template<> __attribute__((always_inline)) inline void _dc< 0>(register uint8_t & ) {}

  51. template<> __attribute__((always_inline)) inline void _dc< 1>(register uint8_t & ) {asm __volatile__("mov r0,r0":::);}

  52. template<> __attribute__((always_inline)) inline void _dc< 2>(register uint8_t & ) {asm __volatile__("rjmp .+0":::);}

  53. template<> __attribute__((always_inline)) inline void _dc< 3>(register uint8_t & loopvar) { _dc<2>(loopvar); _dc<1>(loopvar); }

  54. template<> __attribute__((always_inline)) inline void _dc< 4>(register uint8_t & loopvar) { _dc<2>(loopvar); _dc<2>(loopvar); }

  55. template<> __attribute__((always_inline)) inline void _dc< 5>(register uint8_t & loopvar) { _dc<2>(loopvar); _dc<3>(loopvar); }

  56. template<> __attribute__((always_inline)) inline void _dc< 6>(register uint8_t & loopvar) { _dc<2>(loopvar); _dc<2>(loopvar); _dc<2>(loopvar);}

  57. template<> __attribute__((always_inline)) inline void _dc< 7>(register uint8_t & loopvar) { _dc<4>(loopvar); _dc<3>(loopvar); }

  58. template<> __attribute__((always_inline)) inline void _dc< 8>(register uint8_t & loopvar) { _dc<4>(loopvar); _dc<4>(loopvar); }

  59. template<> __attribute__((always_inline)) inline void _dc< 9>(register uint8_t & loopvar) { _dc<5>(loopvar); _dc<4>(loopvar); }

  60. template<> __attribute__((always_inline)) inline void _dc<10>(register uint8_t & loopvar) { _dc<6>(loopvar); _dc<4>(loopvar); }

  61. template<> __attribute__((always_inline)) inline void _dc<11>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<1>(loopvar); }

  62. template<> __attribute__((always_inline)) inline void _dc<12>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<2>(loopvar); }

  63. template<> __attribute__((always_inline)) inline void _dc<13>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<3>(loopvar); }

  64. template<> __attribute__((always_inline)) inline void _dc<14>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<4>(loopvar); }

  65. template<> __attribute__((always_inline)) inline void _dc<15>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<5>(loopvar); }

  66. template<> __attribute__((always_inline)) inline void _dc<16>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<6>(loopvar); }

  67. template<> __attribute__((always_inline)) inline void _dc<17>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<7>(loopvar); }

  68. template<> __attribute__((always_inline)) inline void _dc<18>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<8>(loopvar); }

  69. template<> __attribute__((always_inline)) inline void _dc<19>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<9>(loopvar); }

  70. template<> __attribute__((always_inline)) inline void _dc<20>(register uint8_t & loopvar) { _dc<10>(loopvar); _dc<10>(loopvar); }

  71. 

  72. #define DINTPIN(T,ADJ,PINADJ) (T-(PINADJ+ADJ)>0) ? _dc<T-(PINADJ+ADJ)>(loopvar) : _dc<0>(loopvar);

  73. #define DINT(T,ADJ) if(AVR_PIN_CYCLES(DATA_PIN)==1) { DINTPIN(T,ADJ,1) } else { DINTPIN(T,ADJ,2); }

  74. #define _D1(ADJ) DINT(T1,ADJ)

  75. #define _D2(ADJ) DINT(T2,ADJ)

  76. #define _D3(ADJ) DINT(T3,ADJ)

  77. 

  78. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

  79. //

  80. // Base template for clockless controllers.  These controllers have 3 control points in their cycle for each bit.  The first point

  81. // is where the line is raised hi.  The second point is where the line is dropped low for a zero.  The third point is where the

  82. // line is dropped low for a one.  T1, T2, and T3 correspond to the timings for those three in clock cycles.

  83. //

  84. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

  85. 

  86. #if (!defined(NO_CORRECTION) || (NO_CORRECTION == 0)) && (FASTLED_ALLOW_INTERRUPTS == 0)

  87. static uint8_t gTimeErrorAccum256ths;

  88. #endif

  89. 

  90. #define FASTLED_HAS_CLOCKLESS 1

  91. 

  92. template <uint8_t DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 10>

  93. class ClocklessController : public CPixelLEDController<RGB_ORDER> {

  94. 	static_assert(T1 >= 2 && T2 >= 2 && T3 >= 3, "Not enough cycles - use a higher clock speed");

  95. 

  96. 	typedef typename FastPin<DATA_PIN>::port_ptr_t data_ptr_t;

  97. 	typedef typename FastPin<DATA_PIN>::port_t data_t;

  98. 

  99. 	CMinWait<WAIT_TIME> mWait;

  100. public:

  101. 	virtual void init() {

  102. 		FastPin<DATA_PIN>::setOutput();

  103. 	}

  104. 

  105. 	virtual uint16_t getMaxRefreshRate() const { return 400; }

  106. 

  107. protected:

  108. 

  109. 	virtual void showPixels(PixelController<RGB_ORDER> & pixels) {

  110. 

  111. 		mWait.wait();

  112. 		cli();

  113. 

  114. 		showRGBInternal(pixels);

  115. 

  116. 		// Adjust the timer

  117. #if (!defined(NO_CORRECTION) || (NO_CORRECTION == 0)) && (FASTLED_ALLOW_INTERRUPTS == 0)

  118.         uint32_t microsTaken = (uint32_t)pixels.size() * (uint32_t)CLKS_TO_MICROS(24 * (T1 + T2 + T3));

  119. 

  120.         // adust for approximate observed actal runtime (as of January 2015)

  121.         // roughly 9.6 cycles per pixel, which is 0.6us/pixel at 16MHz

  122.         // microsTaken += nLeds * 0.6 * CLKS_TO_MICROS(16);

  123.         microsTaken += scale16by8(pixels.size(),(0.6 * 256) + 1) * CLKS_TO_MICROS(16);

  124. 

  125.         // if less than 1000us, there is NO timer impact,

  126.         // this is because the ONE interrupt that might come in while interrupts

  127.         // are disabled is queued up, and it will be serviced as soon as

  128.         // interrupts are re-enabled.

  129.         // This actually should technically also account for the runtime of the

  130.         // interrupt handler itself, but we're just not going to worry about that.

  131.         if( microsTaken > 1000) {

  132. 

  133.             // Since up to one timer tick will be queued, we don't need

  134.             // to adjust the MS_COUNTER for that one.

  135.             microsTaken -= 1000;

  136. 

  137.             // Now convert microseconds to 256ths of a second, approximately like this:

  138.             // 250ths = (us/4)

  139.             // 256ths = 250ths * (263/256);

  140.             uint16_t x256ths = microsTaken >> 2;

  141.             x256ths += scale16by8(x256ths,7);

  142. 

  143.             x256ths += gTimeErrorAccum256ths;

  144.             MS_COUNTER += (x256ths >> 8);

  145.             gTimeErrorAccum256ths = x256ths & 0xFF;

  146.         }

  147. 

  148. #if 0

  149.         // For pixel counts of 30 and under at 16Mhz, no correction is necessary.

  150.         // For pixel counts of 15 and under at 8Mhz, no correction is necessary.

  151.         //

  152.         // This code, below, is smaller, and quicker clock correction, which drifts much

  153.         // more significantly, but is a few bytes smaller.  Presented here for consideration

  154.         // as an alternate on the ATtiny, which can't have more than about 150 pixels MAX

  155.         // anyway, meaning that microsTaken will never be more than about 4,500, which fits in

  156.         // a 16-bit variable.  The difference between /1000 and /1024 only starts showing

  157.         // up in the range of about 100 pixels, so many ATtiny projects won't even

  158.         // see a clock difference due to the approximation there.

  159. 		uint16_t microsTaken = (uint32_t)nLeds * (uint32_t)CLKS_TO_MICROS((24) * (T1 + T2 + T3));

  160.         MS_COUNTER += (microsTaken >> 10);

  161. #endif

  162. 

  163. #endif

  164. 

  165. 		sei();

  166. 		mWait.mark();

  167. 	}

  168. #define USE_ASM_MACROS

  169. 

  170. // The variables that our various asm statements use.  The same block of variables needs to be declared for

  171. // all the asm blocks because GCC is pretty stupid and it would clobber variables happily or optimize code away too aggressively

  172. #define ASM_VARS : /* write variables */				\

  173. 				[count] "+x" (count),					\

  174. 				[data] "+z" (data),						\

  175. 				[b1] "+a" (b1),							\

  176. 				[d0] "+r" (d0),							\

  177. 				[d1] "+r" (d1),							\

  178. 				[d2] "+r" (d2),							\

  179. 				[loopvar] "+a" (loopvar),				\

  180. 				[scale_base] "+a" (scale_base)			\

  181. 				: /* use variables */					\

  182. 				[ADV] "r" (advanceBy),					\

  183. 				[b0] "a" (b0),							\

  184. 				[hi] "r" (hi),							\

  185. 				[lo] "r" (lo),							\

  186. 				[s0] "r" (s0),					  		\

  187. 				[s1] "r" (s1),							\

  188. 				[s2] "r" (s2),							\

  189. 				[e0] "r" (e0),							\

  190. 				[e1] "r" (e1),							\

  191. 				[e2] "r" (e2),							\

  192. 				[PORT] "M" (FastPin<DATA_PIN>::port()-0x20),		\

  193. 				[O0] "M" (RGB_BYTE0(RGB_ORDER)),		\

  194. 				[O1] "M" (RGB_BYTE1(RGB_ORDER)),		\

  195. 				[O2] "M" (RGB_BYTE2(RGB_ORDER))		\

  196. 				: "cc" /* clobber registers */

  197. 

  198. 

  199. // Note: the code in the else in HI1/LO1 will be turned into an sts (2 cycle, 2 word) opcode

  200. // 1 cycle, write hi to the port

  201. #define HI1 FASTLED_SLOW_CLOCK_ADJUST if((int)(FastPin<DATA_PIN>::port())-0x20 < 64) { asm __volatile__("out %[PORT], %[hi]" ASM_VARS ); } else { *FastPin<DATA_PIN>::port()=hi; }

  202. // 1 cycle, write lo to the port

  203. #define LO1 if((int)(FastPin<DATA_PIN>::port())-0x20 < 64) { asm __volatile__("out %[PORT], %[lo]" ASM_VARS ); } else { *FastPin<DATA_PIN>::port()=lo; }

  204. 

  205. // 2 cycles, sbrs on flipping the line to lo if we're pushing out a 0

  206. #define QLO2(B, N) asm __volatile__("sbrs %[" #B "], " #N ASM_VARS ); LO1;

  207. // load a byte from ram into the given var with the given offset

  208. #define LD2(B,O) asm __volatile__("ldd %[" #B "], Z + %[" #O "]\n\t" ASM_VARS );

  209. // 4 cycles - load a byte from ram into the scaling scratch space with the given offset, clear the target var, clear carry

  210. #define LDSCL4(B,O) asm __volatile__("ldd %[scale_base], Z + %[" #O "]\n\tclr %[" #B "]\n\tclc\n\t" ASM_VARS );

  211. 

  212. #if (DITHER==1)

  213. // apply dithering value  before we do anything with scale_base

  214. #define PRESCALE4(D) asm __volatile__("cpse %[scale_base], __zero_reg__\n\t add %[scale_base],%[" #D "]\n\tbrcc L_%=\n\tldi %[scale_base], 0xFF\n\tL_%=:\n\t" ASM_VARS);

  215. 

  216. // Do the add for the prescale

  217. #define PRESCALEA2(D) asm __volatile__("cpse %[scale_base], __zero_reg__\n\t add %[scale_base],%[" #D "]\n\t" ASM_VARS);

  218. 

  219. // Do the clamp for the prescale, clear carry when we're done - NOTE: Must ensure carry flag state is preserved!

  220. #define PRESCALEB4(D) asm __volatile__("brcc L_%=\n\tldi %[scale_base], 0xFF\n\tL_%=:\n\tneg %[" #D "]\n\tCLC" ASM_VARS);

  221. 

  222. // Clamp for prescale, increment data, since we won't ever wrap 65k, this also effectively clears carry for us

  223. #define PSBIDATA4(D) asm __volatile__("brcc L_%=\n\tldi %[scale_base], 0xFF\n\tL_%=:\n\tadd %A[data], %[ADV]\n\tadc %B[data], __zero_reg__\n\t" ASM_VARS);

  224. 

  225. #else

  226. #define PRESCALE4(D) _dc<4>(loopvar);

  227. #define PRESCALEA2(D) _dc<2>(loopvar);

  228. #define PRESCALEB4(D) _dc<4>(loopvar);

  229. #define PSBIDATA4(D) asm __volatile__( "add %A[data], %[ADV]\n\tadc %B[data], __zero_reg__\n\trjmp .+0\n\t" ASM_VARS );

  230. #endif

  231. 

  232. // 2 cycles - perform one step of the scaling (if a given bit is set in scale, add scale-base to the scratch space)

  233. #define _SCALE02(B, N) "sbrc %[s0], " #N "\n\tadd %[" #B "], %[scale_base]\n\t"

  234. #define _SCALE12(B, N) "sbrc %[s1], " #N "\n\tadd %[" #B "], %[scale_base]\n\t"

  235. #define _SCALE22(B, N) "sbrc %[s2], " #N "\n\tadd %[" #B "], %[scale_base]\n\t"

  236. #define SCALE02(B,N) asm __volatile__( _SCALE02(B,N) ASM_VARS );

  237. #define SCALE12(B,N) asm __volatile__( _SCALE12(B,N) ASM_VARS );

  238. #define SCALE22(B,N) asm __volatile__( _SCALE22(B,N) ASM_VARS );

  239. 

  240. // 1 cycle - rotate right, pulling in from carry

  241. #define _ROR1(B) "ror %[" #B "]\n\t"

  242. #define ROR1(B) asm __volatile__( _ROR1(B) ASM_VARS);

  243. 

  244. // 1 cycle, clear the carry bit

  245. #define _CLC1 "clc\n\t"

  246. #define CLC1 asm __volatile__( _CLC1 ASM_VARS );

  247. 

  248. // 2 cycles, rortate right, pulling in from carry then clear the carry bit

  249. #define RORCLC2(B) asm __volatile__( _ROR1(B) _CLC1 ASM_VARS );

  250. 

  251. // 4 cycles, rotate, clear carry, scale next bit

  252. #define RORSC04(B, N) asm __volatile__( _ROR1(B) _CLC1 _SCALE02(B, N) ASM_VARS );

  253. #define RORSC14(B, N) asm __volatile__( _ROR1(B) _CLC1 _SCALE12(B, N) ASM_VARS );

  254. #define RORSC24(B, N) asm __volatile__( _ROR1(B) _CLC1 _SCALE22(B, N) ASM_VARS );

  255. 

  256. // 4 cycles, scale bit, rotate, clear carry

  257. #define SCROR04(B, N) asm __volatile__( _SCALE02(B,N) _ROR1(B) _CLC1 ASM_VARS );

  258. #define SCROR14(B, N) asm __volatile__( _SCALE12(B,N) _ROR1(B) _CLC1 ASM_VARS );

  259. #define SCROR24(B, N) asm __volatile__( _SCALE22(B,N) _ROR1(B) _CLC1 ASM_VARS );

  260. 

  261. /////////////////////////////////////////////////////////////////////////////////////

  262. // Loop life cycle

  263. 

  264. // dither adjustment macro - should be kept in sync w/what's in stepDithering

  265. // #define ADJDITHER2(D, E) D = E - D;

  266. #define _NEGD1(D) "neg %[" #D "]\n\t"

  267. #define _ADJD1(D,E) "add %[" #D "], %[" #E "]\n\t"

  268. #define ADJDITHER2(D, E) asm __volatile__ ( _NEGD1(D) _ADJD1(D, E) ASM_VARS);

  269. #define ADDDE1(D, E) asm __volatile__ ( _ADJD1(D, E) ASM_VARS );

  270. 

  271. // #define xstr(a) str(a)

  272. // #define str(a) #a

  273. // #define ADJDITHER2(D,E) asm __volatile__("subi %[" #D "], " xstr(DUSE) "\n\tand %[" #D "], %[" #E "]\n\t" ASM_VARS);

  274. 

  275. // define the beginning of the loop

  276. #define LOOP asm __volatile__("1:" ASM_VARS );

  277. // define the end of the loop

  278. #define DONE asm __volatile__("2:" ASM_VARS );

  279. 

  280. // 2 cycles - increment the data pointer

  281. #define IDATA2 asm __volatile__("add %A[data], %[ADV]\n\tadc %B[data], __zero_reg__\n\t"  ASM_VARS );

  282. #define IDATACLC3 asm __volatile__("add %A[data], %[ADV]\n\tadc %B[data], __zero_reg__\n\t" _CLC1  ASM_VARS );

  283. 

  284. // 1 cycle mov

  285. #define _MOV1(B1, B2) "mov %[" #B1 "], %[" #B2 "]\n\t"

  286. 

  287. #define MOV1(B1, B2) asm __volatile__( _MOV1(B1,B2) ASM_VARS );

  288. 

  289. // 3 cycle mov - skip if scale fix is happening

  290. #if (FASTLED_SCALE8_FIXED == 1)

  291. #define _MOV_FIX03(B1, B2) "mov %[" #B1 "], %[scale_base]\n\tcpse %[s0], __zero_reg__\n\t" _MOV1(B1, B2)

  292. #define _MOV_FIX13(B1, B2) "mov %[" #B1 "], %[scale_base]\n\tcpse %[s1], __zero_reg__\n\t" _MOV1(B1, B2)

  293. #define _MOV_FIX23(B1, B2) "mov %[" #B1 "], %[scale_base]\n\tcpse %[s2], __zero_reg__\n\t" _MOV1(B1, B2)

  294. #else

  295. // if we haven't fixed scale8, just do the move and nop the 2 cycles that would be used to

  296. // do the fixed adjustment

  297. #define _MOV_FIX03(B1, B2) _MOV1(B1, B2) "rjmp .+0\n\t"

  298. #define _MOV_FIX13(B1, B2) _MOV1(B1, B2) "rjmp .+0\n\t"

  299. #define _MOV_FIX23(B1, B2) _MOV1(B1, B2) "rjmp .+0\n\t"

  300. #endif

  301. 

  302. // 3 cycle mov + negate D for dither adjustment

  303. #define MOV_NEGD04(B1, B2, D) asm __volatile( _MOV_FIX03(B1, B2) _NEGD1(D) ASM_VARS );

  304. #define MOV_ADDDE04(B1, B2, D, E) asm __volatile( _MOV_FIX03(B1, B2) _ADJD1(D, E) ASM_VARS );

  305. #define MOV_NEGD14(B1, B2, D) asm __volatile( _MOV_FIX13(B1, B2) _NEGD1(D) ASM_VARS );

  306. #define MOV_ADDDE14(B1, B2, D, E) asm __volatile( _MOV_FIX13(B1, B2) _ADJD1(D, E) ASM_VARS );

  307. #define MOV_NEGD24(B1, B2, D) asm __volatile( _MOV_FIX23(B1, B2) _NEGD1(D) ASM_VARS );

  308. 

  309. // 2 cycles - decrement the counter

  310. #define DCOUNT2 asm __volatile__("sbiw %[count], 1" ASM_VARS );

  311. // 2 cycles - jump to the beginning of the loop

  312. #define JMPLOOP2 asm __volatile__("rjmp 1b" ASM_VARS );

  313. // 2 cycles - jump out of the loop

  314. #define BRLOOP1 asm __volatile__("brne 3\n\trjmp 2f\n\t3:" ASM_VARS );

  315. 

  316. // 5 cycles 2 sbiw, 3 for the breq/rjmp

  317. #define ENDLOOP5 asm __volatile__("sbiw %[count], 1\n\tbreq L_%=\n\trjmp 1b\n\tL_%=:\n\t" ASM_VARS);

  318. 

  319. // NOP using the variables, forcing a move

  320. #define DNOP asm __volatile__("mov r0,r0" ASM_VARS);

  321. 

  322. #define DADVANCE 3

  323. #define DUSE (0xFF - (DADVANCE-1))

  324. 

  325. // Silence compiler warnings about switch/case that is explicitly intended to fall through.

  326. //#define FL_FALLTHROUGH __attribute__ ((fallthrough));

  327. 

  328. // This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then

  329. // gcc will use register Y for the this pointer.

  330. 	static void /*__attribute__((optimize("O0")))*/  /*__attribute__ ((always_inline))*/  showRGBInternal(PixelController<RGB_ORDER> & pixels)  {

  331. 		uint8_t *data = (uint8_t*)pixels.mData;

  332. 		data_ptr_t port = FastPin<DATA_PIN>::port();

  333. 		data_t mask = FastPin<DATA_PIN>::mask();

  334. 		uint8_t scale_base = 0;

  335. 

  336. 		// register uint8_t *end = data + nLeds;

  337. 		data_t hi = *port | mask;

  338. 		data_t lo = *port & ~mask;

  339. 		*port = lo;

  340. 

  341. 		// the byte currently being written out

  342. 		uint8_t b0 = 0;

  343. 		// the byte currently being worked on to write the next out

  344. 		uint8_t b1 = 0;

  345. 

  346. 		// Setup the pixel controller

  347. 		pixels.preStepFirstByteDithering();

  348. 

  349. 		// pull the dithering/adjustment values out of the pixels object for direct asm access

  350. 		uint8_t advanceBy = pixels.advanceBy();

  351. 		uint16_t count = pixels.mLen;

  352. 

  353. 		uint8_t s0 = pixels.mScale.raw[RO(0)];

  354. 		uint8_t s1 = pixels.mScale.raw[RO(1)];

  355. 		uint8_t s2 = pixels.mScale.raw[RO(2)];

  356. #if (FASTLED_SCALE8_FIXED==1)

  357. 		s0++; s1++; s2++;

  358. #endif

  359. 		uint8_t d0 = pixels.d[RO(0)];

  360. 		uint8_t d1 = pixels.d[RO(1)];

  361. 		uint8_t d2 = pixels.d[RO(2)];

  362. 		uint8_t e0 = pixels.e[RO(0)];

  363. 		uint8_t e1 = pixels.e[RO(1)];

  364. 		uint8_t e2 = pixels.e[RO(2)];

  365. 

  366. 		uint8_t loopvar=0;

  367. 

  368. 		// This has to be done in asm to keep gcc from messing up the asm code further down

  369. 		b0 = data[RO(0)];

  370. 		{

  371. 			LDSCL4(b0,O0) 	PRESCALEA2(d0)

  372. 			PRESCALEB4(d0)	SCALE02(b0,0)

  373. 			RORSC04(b0,1) 	ROR1(b0) CLC1

  374. 			SCROR04(b0,2)		SCALE02(b0,3)

  375. 			RORSC04(b0,4) 	ROR1(b0) CLC1

  376. 			SCROR04(b0,5) 	SCALE02(b0,6)

  377. 			RORSC04(b0,7) 	ROR1(b0) CLC1

  378. 			MOV_ADDDE04(b1,b0,d0,e0)

  379. 			MOV1(b0,b1)

  380. 		}

  381. 

  382. 		{

  383. 			// while(--count)

  384. 			{

  385. 				// Loop beginning

  386. 				DNOP;

  387. 				LOOP;

  388. 

  389. 				// Sum of the clock counts across each row should be 10 for 8Mhz, WS2811

  390. 				// The values in the D1/D2/D3 indicate how many cycles the previous column takes

  391. 				// to allow things to line back up.

  392. 				//

  393. 				// While writing out byte 0, we're loading up byte 1, applying the dithering adjustment,

  394. 				// then scaling it using 8 cycles of shift/add interleaved in between writing the bits

  395. 				// out.  When doing byte 1, we're doing the above for byte 2.  When we're doing byte 2,

  396. 				// we're cycling back around and doing the above for byte 0.

  397. 

  398. 				// Inline scaling - RGB ordering

  399. 				// DNOP

  400. 				HI1 _D1(1) QLO2(b0, 7) LDSCL4(b1,O1) 	_D2(4)	LO1	PRESCALEA2(d1)	_D3(2)

  401. 				HI1 _D1(1) QLO2(b0, 6) PRESCALEB4(d1)	_D2(4)	LO1	SCALE12(b1,0)	_D3(2)

  402. 				HI1 _D1(1) QLO2(b0, 5) RORSC14(b1,1) 	_D2(4)	LO1 RORCLC2(b1)		_D3(2)

  403. 				HI1 _D1(1) QLO2(b0, 4) SCROR14(b1,2)	_D2(4)	LO1 SCALE12(b1,3)	_D3(2)

  404. 				HI1 _D1(1) QLO2(b0, 3) RORSC14(b1,4) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  405. 				HI1 _D1(1) QLO2(b0, 2) SCROR14(b1,5) 	_D2(4)	LO1 SCALE12(b1,6)	_D3(2)

  406. 				HI1 _D1(1) QLO2(b0, 1) RORSC14(b1,7) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  407. 				HI1 _D1(1) QLO2(b0, 0)

  408. 				switch(XTRA0) {

  409. 					case 4: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  410. 					case 3: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  411. 					case 2: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  412. 					case 1: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)

  413. 				}

  414. 				MOV_ADDDE14(b0,b1,d1,e1) _D2(4) LO1 _D3(0)

  415. 

  416. 				HI1 _D1(1) QLO2(b0, 7) LDSCL4(b1,O2) 	_D2(4)	LO1	PRESCALEA2(d2)	_D3(2)

  417. 				HI1 _D1(1) QLO2(b0, 6) PSBIDATA4(d2)	_D2(4)	LO1	SCALE22(b1,0)	_D3(2)

  418. 				HI1 _D1(1) QLO2(b0, 5) RORSC24(b1,1) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  419. 				HI1 _D1(1) QLO2(b0, 4) SCROR24(b1,2)	_D2(4)	LO1 SCALE22(b1,3)	_D3(2)

  420. 				HI1 _D1(1) QLO2(b0, 3) RORSC24(b1,4) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  421. 				HI1 _D1(1) QLO2(b0, 2) SCROR24(b1,5) 	_D2(4)	LO1 SCALE22(b1,6)	_D3(2)

  422. 				HI1 _D1(1) QLO2(b0, 1) RORSC24(b1,7) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  423. 				HI1 _D1(1) QLO2(b0, 0)

  424. 				switch(XTRA0) {

  425. 					case 4: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  426. 					case 3: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  427. 					case 2: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  428. 					case 1: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)

  429. 				}

  430. 

  431. 				// Because Prescale on the middle byte also increments the data counter,

  432. 				// we have to do both halves of updating d2 here - negating it (in the

  433. 				// MOV_NEGD24 macro) and then adding E back into it

  434. 				MOV_NEGD24(b0,b1,d2) _D2(4) LO1 ADDDE1(d2,e2) _D3(1)

  435. 				HI1 _D1(1) QLO2(b0, 7) LDSCL4(b1,O0) 	_D2(4)	LO1	PRESCALEA2(d0)	_D3(2)

  436. 				HI1 _D1(1) QLO2(b0, 6) PRESCALEB4(d0)	_D2(4)	LO1	SCALE02(b1,0)	_D3(2)

  437. 				HI1 _D1(1) QLO2(b0, 5) RORSC04(b1,1) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  438. 				HI1 _D1(1) QLO2(b0, 4) SCROR04(b1,2)	_D2(4)	LO1 SCALE02(b1,3)	_D3(2)

  439. 				HI1 _D1(1) QLO2(b0, 3) RORSC04(b1,4) 	_D2(4)	LO1 RORCLC2(b1)  	_D3(2)

  440. 				HI1 _D1(1) QLO2(b0, 2) SCROR04(b1,5) 	_D2(4)	LO1 SCALE02(b1,6)	_D3(2)

  441. 				HI1 _D1(1) QLO2(b0, 1) RORSC04(b1,7) 	_D2(4)	LO1 RORCLC2(b1) 	_D3(2)

  442. 				HI1 _D1(1) QLO2(b0, 0)

  443. 				switch(XTRA0) {

  444. 					case 4: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  445. 					case 3: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  446. 					case 2: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)  /* fall through */

  447. 					case 1: _D2(0) LO1 _D3(0) HI1 _D1(1) QLO2(b0,0)

  448. 				}

  449. 				MOV_ADDDE04(b0,b1,d0,e0) _D2(4) LO1 _D3(5)

  450. 				ENDLOOP5

  451. 			}

  452. 			DONE;

  453. 		}

  454. 

  455. 		#if (FASTLED_ALLOW_INTERRUPTS == 1)

  456. 		// stop using the clock juggler

  457. 		TCCR0A &= ~0x30;

  458. 		#endif

  459. 	}

  460. 

  461. };

  462. 

  463. #endif

  464. 

  465. FASTLED_NAMESPACE_END

  466. 

  467. #endif