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PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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framework-arduinoteensy-cxx20/libraries/FastLED/wiring.cpp

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  1. #define FASTLED_INTERNAL

  2. #include "FastLED.h"

  3. 

  4. FASTLED_USING_NAMESPACE

  5. 

  6. #if 0

  7. 

  8. #if defined(FASTLED_AVR) && !defined(TEENSYDUINO) && !defined(LIB8_ATTINY)

  9. extern "C" {

  10. // the prescaler is set so that timer0 ticks every 64 clock cycles, and the

  11. // the overflow handler is called every 256 ticks.

  12. #define MICROSECONDS_PER_TIMER0_OVERFLOW (clockCyclesToMicroseconds(64 * 256))

  13. 

  14. typedef union { unsigned long _long; uint8_t raw[4]; } tBytesForLong;

  15. // tBytesForLong FastLED_timer0_overflow_count;

  16. volatile unsigned long FastLED_timer0_overflow_count=0;

  17. volatile unsigned long FastLED_timer0_millis = 0;

  18. 

  19. LIB8STATIC void  __attribute__((always_inline)) fastinc32 (volatile uint32_t & _long) {

  20.   uint8_t b = ++((tBytesForLong&)_long).raw[0];

  21.   if(!b) {

  22.     b = ++((tBytesForLong&)_long).raw[1];

  23.     if(!b) {

  24.       b = ++((tBytesForLong&)_long).raw[2];

  25.       if(!b) {

  26.         ++((tBytesForLong&)_long).raw[3];

  27.       }

  28.     }

  29.   }

  30. }

  31. 

  32. #if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)

  33. ISR(TIM0_OVF_vect)

  34. #else

  35. ISR(TIMER0_OVF_vect)

  36. #endif

  37. {

  38.   fastinc32(FastLED_timer0_overflow_count);

  39.   // FastLED_timer0_overflow_count++;

  40. }

  41. 

  42. // there are 1024 microseconds per overflow counter tick.

  43. unsigned long millis()

  44. {

  45.         unsigned long m;

  46.         uint8_t oldSREG = SREG;

  47. 

  48.         // disable interrupts while we read FastLED_timer0_millis or we might get an

  49.         // inconsistent value (e.g. in the middle of a write to FastLED_timer0_millis)

  50.         cli();

  51.         m = FastLED_timer0_overflow_count;  //._long;

  52.         SREG = oldSREG;

  53. 

  54.         return (m*(MICROSECONDS_PER_TIMER0_OVERFLOW/8))/(1000/8);

  55. }

  56. 

  57. unsigned long micros() {

  58.         unsigned long m;

  59.         uint8_t oldSREG = SREG, t;

  60. 

  61.         cli();

  62.         m = FastLED_timer0_overflow_count; // ._long;

  63. #if defined(TCNT0)

  64.         t = TCNT0;

  65. #elif defined(TCNT0L)

  66.         t = TCNT0L;

  67. #else

  68.         #error TIMER 0 not defined

  69. #endif

  70. 

  71. 

  72. #ifdef TIFR0

  73.         if ((TIFR0 & _BV(TOV0)) && (t < 255))

  74.                 m++;

  75. #else

  76.         if ((TIFR & _BV(TOV0)) && (t < 255))

  77.                 m++;

  78. #endif

  79. 

  80.         SREG = oldSREG;

  81. 

  82.         return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());

  83. }

  84. 

  85. void delay(unsigned long ms)

  86. {

  87.         uint16_t start = (uint16_t)micros();

  88. 

  89.         while (ms > 0) {

  90.                 if (((uint16_t)micros() - start) >= 1000) {

  91.                         ms--;

  92.                         start += 1000;

  93.                 }

  94.         }

  95. }

  96. 

  97. #define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))

  98. void init()

  99. {

  100.   // this needs to be called before setup() or some functions won't

  101.   // work there

  102.   sei();

  103. 

  104.   // on the ATmega168, timer 0 is also used for fast hardware pwm

  105.   // (using phase-correct PWM would mean that timer 0 overflowed half as often

  106.   // resulting in different millis() behavior on the ATmega8 and ATmega168)

  107. #if defined(TCCR0A) && defined(WGM01)

  108.   sbi(TCCR0A, WGM01);

  109.   sbi(TCCR0A, WGM00);

  110. #endif

  111. 

  112.   // set timer 0 prescale factor to 64

  113. #if defined(__AVR_ATmega128__)

  114.   // CPU specific: different values for the ATmega128

  115.   sbi(TCCR0, CS02);

  116. #elif defined(TCCR0) && defined(CS01) && defined(CS00)

  117.   // this combination is for the standard atmega8

  118.   sbi(TCCR0, CS01);

  119.   sbi(TCCR0, CS00);

  120. #elif defined(TCCR0B) && defined(CS01) && defined(CS00)

  121.   // this combination is for the standard 168/328/1280/2560

  122.   sbi(TCCR0B, CS01);

  123.   sbi(TCCR0B, CS00);

  124. #elif defined(TCCR0A) && defined(CS01) && defined(CS00)

  125.   // this combination is for the __AVR_ATmega645__ series

  126.   sbi(TCCR0A, CS01);

  127.   sbi(TCCR0A, CS00);

  128. #else

  129.   #error Timer 0 prescale factor 64 not set correctly

  130. #endif

  131. 

  132.   // enable timer 0 overflow interrupt

  133. #if defined(TIMSK) && defined(TOIE0)

  134.   sbi(TIMSK, TOIE0);

  135. #elif defined(TIMSK0) && defined(TOIE0)

  136.   sbi(TIMSK0, TOIE0);

  137. #else

  138.   #error	Timer 0 overflow interrupt not set correctly

  139. #endif

  140. 

  141.   // timers 1 and 2 are used for phase-correct hardware pwm

  142.   // this is better for motors as it ensures an even waveform

  143.   // note, however, that fast pwm mode can achieve a frequency of up

  144.   // 8 MHz (with a 16 MHz clock) at 50% duty cycle

  145. 

  146. #if defined(TCCR1B) && defined(CS11) && defined(CS10)

  147.   TCCR1B = 0;

  148. 

  149.   // set timer 1 prescale factor to 64

  150.   sbi(TCCR1B, CS11);

  151. #if F_CPU >= 8000000L

  152.   sbi(TCCR1B, CS10);

  153. #endif

  154. #elif defined(TCCR1) && defined(CS11) && defined(CS10)

  155.   sbi(TCCR1, CS11);

  156. #if F_CPU >= 8000000L

  157.   sbi(TCCR1, CS10);

  158. #endif

  159. #endif

  160.   // put timer 1 in 8-bit phase correct pwm mode

  161. #if defined(TCCR1A) && defined(WGM10)

  162.   sbi(TCCR1A, WGM10);

  163. #elif defined(TCCR1)

  164.   #warning this needs to be finished

  165. #endif

  166. 

  167.   // set timer 2 prescale factor to 64

  168. #if defined(TCCR2) && defined(CS22)

  169.   sbi(TCCR2, CS22);

  170. #elif defined(TCCR2B) && defined(CS22)

  171.   sbi(TCCR2B, CS22);

  172. #else

  173.   #warning Timer 2 not finished (may not be present on this CPU)

  174. #endif

  175. 

  176.   // configure timer 2 for phase correct pwm (8-bit)

  177. #if defined(TCCR2) && defined(WGM20)

  178.   sbi(TCCR2, WGM20);

  179. #elif defined(TCCR2A) && defined(WGM20)

  180.   sbi(TCCR2A, WGM20);

  181. #else

  182.   #warning Timer 2 not finished (may not be present on this CPU)

  183. #endif

  184. 

  185. #if defined(TCCR3B) && defined(CS31) && defined(WGM30)

  186.   sbi(TCCR3B, CS31);		// set timer 3 prescale factor to 64

  187.   sbi(TCCR3B, CS30);

  188.   sbi(TCCR3A, WGM30);		// put timer 3 in 8-bit phase correct pwm mode

  189. #endif

  190. 

  191. #if defined(TCCR4A) && defined(TCCR4B) && defined(TCCR4D) /* beginning of timer4 block for 32U4 and similar */

  192.   sbi(TCCR4B, CS42);		// set timer4 prescale factor to 64

  193.   sbi(TCCR4B, CS41);

  194.   sbi(TCCR4B, CS40);

  195.   sbi(TCCR4D, WGM40);		// put timer 4 in phase- and frequency-correct PWM mode

  196.   sbi(TCCR4A, PWM4A);		// enable PWM mode for comparator OCR4A

  197.   sbi(TCCR4C, PWM4D);		// enable PWM mode for comparator OCR4D

  198. #else /* beginning of timer4 block for ATMEGA1280 and ATMEGA2560 */

  199. #if defined(TCCR4B) && defined(CS41) && defined(WGM40)

  200.   sbi(TCCR4B, CS41);		// set timer 4 prescale factor to 64

  201.   sbi(TCCR4B, CS40);

  202.   sbi(TCCR4A, WGM40);		// put timer 4 in 8-bit phase correct pwm mode

  203. #endif

  204. #endif /* end timer4 block for ATMEGA1280/2560 and similar */

  205. 

  206. #if defined(TCCR5B) && defined(CS51) && defined(WGM50)

  207.   sbi(TCCR5B, CS51);		// set timer 5 prescale factor to 64

  208.   sbi(TCCR5B, CS50);

  209.   sbi(TCCR5A, WGM50);		// put timer 5 in 8-bit phase correct pwm mode

  210. #endif

  211. 

  212. #if defined(ADCSRA)

  213.   // set a2d prescale factor to 128

  214.   // 16 MHz / 128 = 125 KHz, inside the desired 50-200 KHz range.

  215.   // XXX: this will not work properly for other clock speeds, and

  216.   // this code should use F_CPU to determine the prescale factor.

  217.   sbi(ADCSRA, ADPS2);

  218.   sbi(ADCSRA, ADPS1);

  219.   sbi(ADCSRA, ADPS0);

  220. 

  221.   // enable a2d conversions

  222.   sbi(ADCSRA, ADEN);

  223. #endif

  224. 

  225.   // the bootloader connects pins 0 and 1 to the USART; disconnect them

  226.   // here so they can be used as normal digital i/o; they will be

  227.   // reconnected in Serial.begin()

  228. #if defined(UCSRB)

  229.   UCSRB = 0;

  230. #elif defined(UCSR0B)

  231.   UCSR0B = 0;

  232. #endif

  233. }

  234. };

  235. #endif

  236. 

  237. #endif