PlatformIO package of the Teensy core framework compatible with GCC 10 & C++20
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  1. /* Copyright (c) 2009 by Alex Leone <acleone ~AT~ gmail.com>
  2. This file is part of the Arduino TLC5940 Library.
  3. The Arduino TLC5940 Library is free software: you can redistribute it
  4. and/or modify it under the terms of the GNU General Public License as
  5. published by the Free Software Foundation, either version 3 of the
  6. License, or (at your option) any later version.
  7. The Arduino TLC5940 Library is distributed in the hope that it will be
  8. useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with The Arduino TLC5940 Library. If not, see
  13. <http://www.gnu.org/licenses/>. */
  14. #ifndef ARDUINO_MEGA_H
  15. #define ARDUINO_MEGA_H
  16. /** \file
  17. SPI and timer pins for the Arduino Mega. Don't edit these. All
  18. changeable pins are defined in tlc_config.h */
  19. /** VPRG (Mega pin 50) -> VPRG (TLC pin 27) */
  20. #define DEFAULT_VPRG_PIN PB3
  21. #define DEFAULT_VPRG_PORT PORTB
  22. #define DEFAULT_VPRG_DDR DDRB
  23. /** XERR (Mega pin 10) -> XERR (TLC pin 16) */
  24. #define DEFAULT_XERR_PIN PB4
  25. #define DEFAULT_XERR_PORT PORTB
  26. #define DEFAULT_XERR_DDR DDRB
  27. #define DEFAULT_XERR_PINS PINB
  28. /** SIN (Mega pin 51) -> SIN (TLC pin 26) */
  29. #define DEFAULT_BB_SIN_PIN PB2
  30. #define DEFAULT_BB_SIN_PORT PORTB
  31. #define DEFAULT_BB_SIN_DDR DDRB
  32. /** SCLK (Mega pin 52) -> SCLK (TLC pin 25) */
  33. #define DEFAULT_BB_SCLK_PIN PB1
  34. #define DEFAULT_BB_SCLK_PORT PORTB
  35. #define DEFAULT_BB_SCLK_DDR DDRB
  36. /** MOSI (Mega pin 51) -> SIN (TLC pin 26) */
  37. #define TLC_MOSI_PIN PB2
  38. #define TLC_MOSI_PORT PORTB
  39. #define TLC_MOSI_DDR DDRB
  40. /** SCK (Mega pin 52) -> SCLK (TLC pin 25) */
  41. #define TLC_SCK_PIN PB1
  42. #define TLC_SCK_PORT PORTB
  43. #define TLC_SCK_DDR DDRB
  44. // SS (Mega pin 53)
  45. /** SS will be set to output as to not interfere with SPI master operation.
  46. If you have changed the pin-outs and the library doesn't seem to work
  47. or works intermittently, make sure this pin is set correctly. This pin
  48. will not be used by the library other than setting its direction to
  49. output. */
  50. #define TLC_SS_PIN PB0
  51. #define TLC_SS_DDR DDRB
  52. /** OC1A (Mega pin 11) -> XLAT (TLC pin 24) */
  53. #define XLAT_PIN PB5
  54. #define XLAT_PORT PORTB
  55. #define XLAT_DDR DDRB
  56. /** OC1B (Mega pin 12) -> BLANK (TLC pin 23) */
  57. #define BLANK_PIN PB6
  58. #define BLANK_PORT PORTB
  59. #define BLANK_DDR DDRB
  60. /** OC2B (Mega pin 9) -> GSCLK (TLC pin 18) */
  61. #define GSCLK_PIN PH6
  62. #define GSCLK_PORT PORTH
  63. #define GSCLK_DDR DDRH
  64. #endif