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output_spdif3.cpp 8.4KB

5 years ago
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  1. /* Hardware-SPDIF for Teensy 4
  2. * Copyright (c) 2019, Frank Bösing, f.boesing@gmx.de
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a copy
  5. * of this software and associated documentation files (the "Software"), to deal
  6. * in the Software without restriction, including without limitation the rights
  7. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  8. * copies of the Software, and to permit persons to whom the Software is
  9. * furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice, development funding notice, and this permission
  12. * notice shall be included in all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  17. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20. * THE SOFTWARE.
  21. */
  22. /*
  23. http://www.hardwarebook.info/S/PDIF
  24. https://www.mikrocontroller.net/articles/S/PDIF
  25. https://en.wikipedia.org/wiki/S/PDIF
  26. */
  27. #if defined(__IMXRT1052__) || defined(__IMXRT1062__)
  28. #include <Arduino.h>
  29. #include "output_spdif3.h"
  30. #include "utility/imxrt_hw.h"
  31. #include "memcpy_audio.h"
  32. #include <math.h>
  33. audio_block_t * AudioOutputSPDIF3::block_left_1st = nullptr;
  34. audio_block_t * AudioOutputSPDIF3::block_right_1st = nullptr;
  35. audio_block_t * AudioOutputSPDIF3::block_left_2nd = nullptr;
  36. audio_block_t * AudioOutputSPDIF3::block_right_2nd = nullptr;
  37. bool AudioOutputSPDIF3::update_responsibility = false;
  38. DMAChannel AudioOutputSPDIF3::dma(false);
  39. DMAMEM __attribute__((aligned(32)))
  40. static int32_t SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4];
  41. DMAMEM __attribute__((aligned(32)))
  42. audio_block_t AudioOutputSPDIF3::block_silent;
  43. PROGMEM
  44. void AudioOutputSPDIF3::begin(void)
  45. {
  46. dma.begin(true); // Allocate the DMA channel first
  47. block_left_1st = nullptr;
  48. block_right_1st = nullptr;
  49. memset(&block_silent, 0, sizeof(block_silent));
  50. uint32_t fs = AUDIO_SAMPLE_RATE_EXACT;
  51. // PLL between 27*24 = 648MHz und 54*24=1296MHz
  52. // n1, n2 choosen for compatibility with I2S (same PLL frequency) :
  53. int n1 = 4; //SAI prescaler 4 => (n1*n2) = multiple of 4
  54. int n2 = 1 + (24000000 * 27) / (fs * 256 * n1);
  55. double C = ((double)fs * 256 * n1 * n2) / 24000000;
  56. int c0 = C;
  57. int c2 = 10000;
  58. int c1 = C * c2 - (c0 * c2);
  59. set_audioClock(c0, c1, c2);
  60. double pllclock = (c0 + (double)c1 / c2) * 24000000; //677376000 Hz
  61. //use new pred/podf values
  62. n1 = 7; //0: divide by 1 (do not use with high input frequencies), 1:/2, 2: /3, 7:/8
  63. n2 = 0; //0: divide by 1, 7: divide by 8
  64. uint32_t clock = pllclock / (1 + n1) / (1 + n2);
  65. uint32_t clkdiv = clock / (fs * 64); // 1 .. 128
  66. uint32_t mod = clock % (fs * 64);
  67. if (mod > ((fs * 64) / 2)) clkdiv += 1; //nearest divider
  68. CCM_CCGR5 &= ~CCM_CCGR5_SPDIF(CCM_CCGR_ON); //Clock gate off
  69. CCM_CDCDR = (CCM_CDCDR & ~(CCM_CDCDR_SPDIF0_CLK_SEL_MASK | CCM_CDCDR_SPDIF0_CLK_PRED_MASK | CCM_CDCDR_SPDIF0_CLK_PODF_MASK))
  70. | CCM_CDCDR_SPDIF0_CLK_SEL(0) // 0 PLL4, 1 PLL3 PFD2, 2 PLL5, 3 pll3_sw_clk
  71. | CCM_CDCDR_SPDIF0_CLK_PRED(n1)
  72. | CCM_CDCDR_SPDIF0_CLK_PODF(n2);
  73. CCM_CCGR5 |= CCM_CCGR5_SPDIF(CCM_CCGR_ON); //Clock gate on
  74. if ((SPDIF_SCR & 0x400) != 0) { //If default value:
  75. SPDIF_SCR = SPDIF_SCR_SOFT_RESET; //Reset SPDIF
  76. while (SPDIF_SCR & SPDIF_SCR_SOFT_RESET) {;} //Wait for Reset (takes 8 cycles)
  77. SPDIF_SCR = 0;
  78. }
  79. SPDIF_SCR |=
  80. SPDIF_SCR_RXFIFOFULL_SEL(0) |// Full interrupt if at least 1 sample in Rx left and right FIFOs
  81. SPDIF_SCR_RXAUTOSYNC |
  82. SPDIF_SCR_TXAUTOSYNC |
  83. SPDIF_SCR_TXFIFOEMPTY_SEL(3) | // Empty interrupt if at most 4 sample in Tx left and right FIFOs
  84. SPDIF_SCR_TXFIFO_CTRL(1) | // 0:Send zeros 1: normal operation
  85. SPDIF_SCR_DMA_TX_EN |
  86. //SPDIF_SCR_VALCTRL | // Outgoing Validity always clear
  87. SPDIF_SCR_TXSEL(5) | //0:off and output 0, 1:Feed-though SPDIFIN, 5:Tx Normal operation
  88. SPDIF_SCR_USRC_SEL(3); // No embedded U channel
  89. SPDIF_SRCD = 0;
  90. SPDIF_STCSCH = 0;
  91. SPDIF_STCSCL = 0;
  92. SPDIF_SRCD = 0;
  93. SPDIF_STC = SPDIF_STC_TXCLK_SOURCE(1) //tx_clk input (from SPDIF0_CLK_ROOT)
  94. | SPDIF_STC_SYSCLK_DF(0)
  95. | SPDIF_STC_TXCLK_DF(clkdiv - 1);
  96. const int nbytes_mlno = 2 * 4; // 8 Bytes per minor loop
  97. dma.TCD->SADDR = SPDIF_tx_buffer;
  98. dma.TCD->SOFF = 4;
  99. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2);
  100. dma.TCD->NBYTES_MLNO = DMA_TCD_NBYTES_MLOFFYES_NBYTES(nbytes_mlno) | DMA_TCD_NBYTES_DMLOE |
  101. DMA_TCD_NBYTES_MLOFFYES_MLOFF(-8);
  102. dma.TCD->SLAST = -sizeof(SPDIF_tx_buffer);
  103. dma.TCD->DADDR = &SPDIF_STL;
  104. dma.TCD->DOFF = 4;
  105. dma.TCD->DLASTSGA = -8;
  106. //dma.TCD->ATTR_DST = ((31 - __builtin_clz(8)) << 3);
  107. dma.TCD->CITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno;
  108. dma.TCD->BITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno;
  109. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  110. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SPDIF_TX);
  111. update_responsibility = update_setup();
  112. dma.enable();
  113. dma.attachInterrupt(isr);
  114. CORE_PIN14_CONFIG = 3; //3:SPDIF_OUT
  115. SPDIF_STC |= SPDIF_STC_TX_ALL_CLK_EN;
  116. // pinMode(13, OUTPUT);
  117. }
  118. void AudioOutputSPDIF3::isr(void)
  119. {
  120. const int16_t *src_left, *src_right;
  121. const int32_t *end;
  122. int32_t *dest;
  123. audio_block_t *block_left, *block_right;
  124. uint32_t saddr;
  125. saddr = (uint32_t)(dma.TCD->SADDR);
  126. dma.clearInterrupt();
  127. if (saddr < (uint32_t)SPDIF_tx_buffer + sizeof(SPDIF_tx_buffer) / 2) {
  128. // DMA is transmitting the first half of the buffer
  129. // so we must fill the second half
  130. dest = SPDIF_tx_buffer + AUDIO_BLOCK_SAMPLES*2;
  131. end = SPDIF_tx_buffer + AUDIO_BLOCK_SAMPLES*4;
  132. } else {
  133. // DMA is transmitting the second half of the buffer
  134. // so we must fill the first half
  135. dest = SPDIF_tx_buffer;
  136. end = SPDIF_tx_buffer + AUDIO_BLOCK_SAMPLES*2;
  137. }
  138. block_left = block_left_1st;
  139. if (!block_left) block_left = &block_silent;
  140. block_right = block_right_1st;
  141. if (!block_right) block_right = &block_silent;
  142. src_left = (const int16_t *)(block_left->data);
  143. src_right = (const int16_t *)(block_right->data);
  144. do {
  145. *dest++ = (*src_left++) << 8;
  146. *dest++ = (*src_right++) << 8;
  147. *dest++ = (*src_left++) << 8;
  148. *dest++ = (*src_right++) << 8;
  149. *dest++ = (*src_left++) << 8;
  150. *dest++ = (*src_right++) << 8;
  151. *dest++ = (*src_left++) << 8;
  152. *dest++ = (*src_right++) << 8;
  153. #if IMXRT_CACHE_ENABLED >= 2
  154. SCB_CACHE_DCCIMVAC = (uint32_t) dest - 32;
  155. #endif
  156. } while (dest < end);
  157. if (block_left != &block_silent) {
  158. release(block_left);
  159. #if IMXRT_CACHE_ENABLED > 0
  160. SCB_CACHE_DCCIMVAC = (uint32_t)block_left;
  161. #endif
  162. block_left_1st = block_left_2nd;
  163. block_left_2nd = nullptr;
  164. }
  165. if (block_right != &block_silent) {
  166. release(block_right);
  167. #if IMXRT_CACHE_ENABLED > 0
  168. SCB_CACHE_DCCIMVAC = (uint32_t)block_right;
  169. #endif
  170. block_right_1st = block_right_2nd;
  171. block_right_2nd = nullptr;
  172. }
  173. if (update_responsibility) update_all();
  174. //digitalWriteFast(13,!digitalReadFast(13));
  175. }
  176. void AudioOutputSPDIF3::update(void)
  177. {
  178. audio_block_t *block_left, *block_right;
  179. block_left = receiveReadOnly(0); // input 0
  180. block_right = receiveReadOnly(1); // input 1
  181. __disable_irq();
  182. if (block_left) {
  183. if (block_left_1st == nullptr) {
  184. block_left_1st = block_left;
  185. block_left = nullptr;
  186. } else if (block_left_2nd == nullptr) {
  187. block_left_2nd = block_left;
  188. block_left = nullptr;
  189. } else {
  190. audio_block_t *tmp = block_left_1st;
  191. block_left_1st = block_left_2nd;
  192. block_left_2nd = block_left;
  193. block_left = tmp;
  194. }
  195. }
  196. if (block_right) {
  197. if (block_right_1st == nullptr) {
  198. block_right_1st = block_right;
  199. block_right = nullptr;
  200. } else if (block_right_2nd == nullptr) {
  201. block_right_2nd = block_right;
  202. block_right = nullptr;
  203. } else {
  204. audio_block_t *tmp = block_right_1st;
  205. block_right_1st = block_right_2nd;
  206. block_right_2nd = block_right;
  207. block_right = tmp;
  208. }
  209. }
  210. __enable_irq();
  211. if (block_left) {
  212. release(block_left);
  213. #if IMXRT_CACHE_ENABLED > 0
  214. SCB_CACHE_DCCIMVAC = (uint32_t)block_left;
  215. #endif
  216. }
  217. if (block_right) {
  218. release(block_right);
  219. #if IMXRT_CACHE_ENABLED > 0
  220. SCB_CACHE_DCCIMVAC = (uint32_t)block_right;
  221. #endif
  222. }
  223. }
  224. void AudioOutputSPDIF3::mute_PCM(const bool mute)
  225. {
  226. if (mute)
  227. SPDIF_SCR |= SPDIF_SCR_VALCTRL;
  228. else
  229. SPDIF_SCR &= ~SPDIF_SCR_VALCTRL;
  230. }
  231. #endif