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output_spdif.cpp 12KB

8 jaren geleden
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  1. /* SPDIF for Teensy 3.X
  2. * Copyright (c) 2015, Frank Bösing, f.boesing@gmx.de,
  3. * Thanks to KPC & Paul Stoffregen!
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice, development funding notice, and this permission
  13. * notice shall be included in all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. // 2015/08/23: (FB) added mute_PCM() - sets or unsets VALID in VUCP (and adjusts PARITY)
  24. #include "output_spdif.h"
  25. #if defined(KINETISK)
  26. #define PREAMBLE_B (0xE8) //11101000
  27. #define PREAMBLE_M (0xE2) //11100010
  28. #define PREAMBLE_W (0xE4) //11100100
  29. #define VUCP_VALID ((0xCC) << 24)
  30. #define VUCP_INVALID ((0xD4) << 24)// To mute PCM, set VUCP = invalid.
  31. audio_block_t * AudioOutputSPDIF::block_left_1st = NULL;
  32. audio_block_t * AudioOutputSPDIF::block_right_1st = NULL;
  33. audio_block_t * AudioOutputSPDIF::block_left_2nd = NULL;
  34. audio_block_t * AudioOutputSPDIF::block_right_2nd = NULL;
  35. uint16_t AudioOutputSPDIF::block_left_offset = 0;
  36. uint16_t AudioOutputSPDIF::block_right_offset = 0;
  37. bool AudioOutputSPDIF::update_responsibility = false;
  38. uint32_t AudioOutputSPDIF::vucp = VUCP_VALID;
  39. DMAMEM static uint32_t SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4]; //2 KB
  40. DMAChannel AudioOutputSPDIF::dma(false);
  41. static const
  42. uint16_t bmclookup[256] = { //biphase mark encoded values (least significant bit first)
  43. 0xcccc, 0x4ccc, 0x2ccc, 0xaccc, 0x34cc, 0xb4cc, 0xd4cc, 0x54cc,
  44. 0x32cc, 0xb2cc, 0xd2cc, 0x52cc, 0xcacc, 0x4acc, 0x2acc, 0xaacc,
  45. 0x334c, 0xb34c, 0xd34c, 0x534c, 0xcb4c, 0x4b4c, 0x2b4c, 0xab4c,
  46. 0xcd4c, 0x4d4c, 0x2d4c, 0xad4c, 0x354c, 0xb54c, 0xd54c, 0x554c,
  47. 0x332c, 0xb32c, 0xd32c, 0x532c, 0xcb2c, 0x4b2c, 0x2b2c, 0xab2c,
  48. 0xcd2c, 0x4d2c, 0x2d2c, 0xad2c, 0x352c, 0xb52c, 0xd52c, 0x552c,
  49. 0xccac, 0x4cac, 0x2cac, 0xacac, 0x34ac, 0xb4ac, 0xd4ac, 0x54ac,
  50. 0x32ac, 0xb2ac, 0xd2ac, 0x52ac, 0xcaac, 0x4aac, 0x2aac, 0xaaac,
  51. 0x3334, 0xb334, 0xd334, 0x5334, 0xcb34, 0x4b34, 0x2b34, 0xab34,
  52. 0xcd34, 0x4d34, 0x2d34, 0xad34, 0x3534, 0xb534, 0xd534, 0x5534,
  53. 0xccb4, 0x4cb4, 0x2cb4, 0xacb4, 0x34b4, 0xb4b4, 0xd4b4, 0x54b4,
  54. 0x32b4, 0xb2b4, 0xd2b4, 0x52b4, 0xcab4, 0x4ab4, 0x2ab4, 0xaab4,
  55. 0xccd4, 0x4cd4, 0x2cd4, 0xacd4, 0x34d4, 0xb4d4, 0xd4d4, 0x54d4,
  56. 0x32d4, 0xb2d4, 0xd2d4, 0x52d4, 0xcad4, 0x4ad4, 0x2ad4, 0xaad4,
  57. 0x3354, 0xb354, 0xd354, 0x5354, 0xcb54, 0x4b54, 0x2b54, 0xab54,
  58. 0xcd54, 0x4d54, 0x2d54, 0xad54, 0x3554, 0xb554, 0xd554, 0x5554,
  59. 0x3332, 0xb332, 0xd332, 0x5332, 0xcb32, 0x4b32, 0x2b32, 0xab32,
  60. 0xcd32, 0x4d32, 0x2d32, 0xad32, 0x3532, 0xb532, 0xd532, 0x5532,
  61. 0xccb2, 0x4cb2, 0x2cb2, 0xacb2, 0x34b2, 0xb4b2, 0xd4b2, 0x54b2,
  62. 0x32b2, 0xb2b2, 0xd2b2, 0x52b2, 0xcab2, 0x4ab2, 0x2ab2, 0xaab2,
  63. 0xccd2, 0x4cd2, 0x2cd2, 0xacd2, 0x34d2, 0xb4d2, 0xd4d2, 0x54d2,
  64. 0x32d2, 0xb2d2, 0xd2d2, 0x52d2, 0xcad2, 0x4ad2, 0x2ad2, 0xaad2,
  65. 0x3352, 0xb352, 0xd352, 0x5352, 0xcb52, 0x4b52, 0x2b52, 0xab52,
  66. 0xcd52, 0x4d52, 0x2d52, 0xad52, 0x3552, 0xb552, 0xd552, 0x5552,
  67. 0xccca, 0x4cca, 0x2cca, 0xacca, 0x34ca, 0xb4ca, 0xd4ca, 0x54ca,
  68. 0x32ca, 0xb2ca, 0xd2ca, 0x52ca, 0xcaca, 0x4aca, 0x2aca, 0xaaca,
  69. 0x334a, 0xb34a, 0xd34a, 0x534a, 0xcb4a, 0x4b4a, 0x2b4a, 0xab4a,
  70. 0xcd4a, 0x4d4a, 0x2d4a, 0xad4a, 0x354a, 0xb54a, 0xd54a, 0x554a,
  71. 0x332a, 0xb32a, 0xd32a, 0x532a, 0xcb2a, 0x4b2a, 0x2b2a, 0xab2a,
  72. 0xcd2a, 0x4d2a, 0x2d2a, 0xad2a, 0x352a, 0xb52a, 0xd52a, 0x552a,
  73. 0xccaa, 0x4caa, 0x2caa, 0xacaa, 0x34aa, 0xb4aa, 0xd4aa, 0x54aa,
  74. 0x32aa, 0xb2aa, 0xd2aa, 0x52aa, 0xcaaa, 0x4aaa, 0x2aaa, 0xaaaa
  75. };
  76. void AudioOutputSPDIF::begin(void)
  77. {
  78. dma.begin(true); // Allocate the DMA channel first
  79. block_left_1st = NULL;
  80. block_right_1st = NULL;
  81. // TODO: should we set & clear the I2S_TCSR_SR bit here?
  82. config_SPDIF();
  83. CORE_PIN22_CONFIG = PORT_PCR_MUX(6); // pin 22, PTC1, I2S0_TXD0
  84. const int nbytes_mlno = 2 * 4; // 8 Bytes per minor loop
  85. dma.TCD->SADDR = SPDIF_tx_buffer;
  86. dma.TCD->SOFF = 4;
  87. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2);
  88. dma.TCD->NBYTES_MLNO = nbytes_mlno;
  89. dma.TCD->SLAST = -sizeof(SPDIF_tx_buffer);
  90. dma.TCD->DADDR = &I2S0_TDR0;
  91. dma.TCD->DOFF = 0;
  92. dma.TCD->CITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno;
  93. dma.TCD->DLASTSGA = 0;
  94. dma.TCD->BITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno;
  95. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  96. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX);
  97. update_responsibility = update_setup();
  98. dma.enable();
  99. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR;
  100. dma.attachInterrupt(isr);
  101. }
  102. /*
  103. http://www.hardwarebook.info/S/PDIF
  104. 1. To make it easier and a bit faster, the parity-bit is always the same.
  105. - With a alternating parity we had to adjust the next subframe. Instead, use a bit from the aux-info as parity.
  106. 2. The buffer is filled with an offset of 1 byte, so the last parity (which is always 0 now (see 1.) ) is written as first byte.
  107. -> A bit easier and faster to construct both subframes.
  108. */
  109. void AudioOutputSPDIF::isr(void)
  110. {
  111. static uint16_t frame = 0;
  112. const int16_t *src;
  113. int32_t *end, *dest;
  114. audio_block_t *block;
  115. uint32_t saddr, offset;
  116. uint16_t sample, lo, hi, aux;
  117. saddr = (uint32_t)(dma.TCD->SADDR);
  118. dma.clearInterrupt();
  119. if (saddr < (uint32_t)SPDIF_tx_buffer + sizeof(SPDIF_tx_buffer) / 2) {
  120. // DMA is transmitting the first half of the buffer
  121. // so we must fill the second half
  122. dest = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4/2];
  123. end = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4];
  124. if (AudioOutputSPDIF::update_responsibility) AudioStream::update_all();
  125. } else {
  126. // DMA is transmitting the second half of the buffer
  127. // so we must fill the first half
  128. dest = (int32_t *)SPDIF_tx_buffer;
  129. end = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4/2];
  130. }
  131. block = AudioOutputSPDIF::block_left_1st;
  132. if (block) {
  133. offset = AudioOutputSPDIF::block_left_offset;
  134. src = &block->data[offset];
  135. do {
  136. sample = *src++;
  137. //Subframe Channel 1
  138. hi = bmclookup[(uint8_t)(sample >> 8)];
  139. lo = bmclookup[(uint8_t) sample];
  140. lo ^= (~((int16_t)hi) >> 16);
  141. // 16 Bit sample:
  142. *(dest+1) = ((uint32_t)lo << 16) | hi;
  143. // 4 Bit Auxillary-audio-databits, the first used as parity
  144. aux = (0xB333 ^ (((uint32_t)((int16_t)lo)) >> 17));
  145. if (++frame > 191) {
  146. // VUCP-Bits ("Valid, Subcode, Channelstatus, Parity) = 0 (0xcc) | Preamble (depends on Framno.) | Auxillary
  147. *(dest+0) = vucp | (PREAMBLE_B << 16 ) | aux; //special preamble for one of 192 frames
  148. frame = 0;
  149. } else {
  150. *(dest+0) = vucp | (PREAMBLE_M << 16 ) | aux;
  151. }
  152. dest += 4;
  153. } while (dest < end);
  154. offset += AUDIO_BLOCK_SAMPLES/2;
  155. if (offset < AUDIO_BLOCK_SAMPLES) {
  156. AudioOutputSPDIF::block_left_offset = offset;
  157. } else {
  158. AudioOutputSPDIF::block_left_offset = 0;
  159. AudioStream::release(block);
  160. AudioOutputSPDIF::block_left_1st = AudioOutputSPDIF::block_left_2nd;
  161. AudioOutputSPDIF::block_left_2nd = NULL;
  162. }
  163. } else {
  164. do {
  165. if ( ++frame > 191 ) {
  166. *(dest+0) = vucp | 0x00e8cccc;
  167. frame = 0;
  168. } else {
  169. *(dest+0) = vucp | 0x00e2cccc;
  170. }
  171. *(dest+1) = 0xccccccccUL;
  172. dest +=4;
  173. } while (dest < end);
  174. }
  175. dest -= AUDIO_BLOCK_SAMPLES * 4/2 - 4/2;
  176. block = AudioOutputSPDIF::block_right_1st;
  177. if (block) {
  178. offset = AudioOutputSPDIF::block_right_offset;
  179. src = &block->data[offset];
  180. do {
  181. sample = *src++;
  182. //Subframe Channel 2
  183. hi = bmclookup[(uint8_t)(sample >> 8)];
  184. lo = bmclookup[(uint8_t)sample];
  185. lo ^= (~((int16_t)hi) >> 16);
  186. *(dest+1) = ( ((uint32_t)lo << 16) | hi );
  187. aux = (0xB333 ^ (((uint32_t)((int16_t)lo)) >> 17));
  188. *(dest+0) = vucp | (PREAMBLE_W << 16 ) | aux;
  189. dest += 4;
  190. } while (dest < end);
  191. offset += AUDIO_BLOCK_SAMPLES/2;
  192. if (offset < AUDIO_BLOCK_SAMPLES) {
  193. AudioOutputSPDIF::block_right_offset = offset;
  194. } else {
  195. AudioOutputSPDIF::block_right_offset = 0;
  196. AudioStream::release(block);
  197. AudioOutputSPDIF::block_right_1st = AudioOutputSPDIF::block_right_2nd;
  198. AudioOutputSPDIF::block_right_2nd = NULL;
  199. }
  200. } else {
  201. do {
  202. *dest = vucp | 0x00e4ccccUL;
  203. *(dest+1) = 0xccccccccUL;
  204. dest += 4 ;
  205. } while (dest < end);
  206. }
  207. }
  208. void AudioOutputSPDIF::mute_PCM(const bool mute)
  209. {
  210. vucp = mute?VUCP_INVALID:VUCP_VALID;
  211. }
  212. void AudioOutputSPDIF::update(void)
  213. {
  214. audio_block_t *block;
  215. block = receiveReadOnly(0); // input 0 = left channel
  216. if (block) {
  217. __disable_irq();
  218. if (block_left_1st == NULL) {
  219. block_left_1st = block;
  220. block_left_offset = 0;
  221. __enable_irq();
  222. } else if (block_left_2nd == NULL) {
  223. block_left_2nd = block;
  224. __enable_irq();
  225. } else {
  226. audio_block_t *tmp = block_left_1st;
  227. block_left_1st = block_left_2nd;
  228. block_left_2nd = block;
  229. block_left_offset = 0;
  230. __enable_irq();
  231. release(tmp);
  232. }
  233. }
  234. block = receiveReadOnly(1); // input 1 = right channel
  235. if (block) {
  236. __disable_irq();
  237. if (block_right_1st == NULL) {
  238. block_right_1st = block;
  239. block_right_offset = 0;
  240. __enable_irq();
  241. } else if (block_right_2nd == NULL) {
  242. block_right_2nd = block;
  243. __enable_irq();
  244. } else {
  245. audio_block_t *tmp = block_right_1st;
  246. block_right_1st = block_right_2nd;
  247. block_right_2nd = block;
  248. block_right_offset = 0;
  249. __enable_irq();
  250. release(tmp);
  251. }
  252. }
  253. }
  254. #if F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000
  255. // PLL is at 96 MHz in these modes
  256. #define MCLK_MULT 2
  257. #define MCLK_DIV 17
  258. #elif F_CPU == 72000000
  259. #define MCLK_MULT 8
  260. #define MCLK_DIV 51
  261. #elif F_CPU == 120000000
  262. #define MCLK_MULT 8
  263. #define MCLK_DIV 85
  264. #elif F_CPU == 144000000
  265. #define MCLK_MULT 4
  266. #define MCLK_DIV 51
  267. #elif F_CPU == 168000000
  268. #define MCLK_MULT 8
  269. #define MCLK_DIV 119
  270. #elif F_CPU == 180000000
  271. #define MCLK_MULT 16
  272. #define MCLK_DIV 255
  273. #elif F_CPU == 192000000
  274. #define MCLK_MULT 1
  275. #define MCLK_DIV 17
  276. #elif F_CPU == 16000000
  277. #define MCLK_MULT 12
  278. #define MCLK_DIV 17
  279. #else
  280. #error "This CPU Clock Speed is not supported by the Audio library";
  281. #endif
  282. #if F_CPU >= 20000000
  283. #define MCLK_SRC 3 // the PLL
  284. #else
  285. #define MCLK_SRC 0 // system clock
  286. #endif
  287. void AudioOutputSPDIF::config_SPDIF(void)
  288. {
  289. SIM_SCGC6 |= SIM_SCGC6_I2S;
  290. SIM_SCGC7 |= SIM_SCGC7_DMA;
  291. SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
  292. // enable MCLK output
  293. I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE;
  294. while (I2S0_MCR & I2S_MCR_DUF) ;
  295. I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1));
  296. // configure transmitter
  297. I2S0_TMR = 0;
  298. I2S0_TCR1 = I2S_TCR1_TFW(1); // watermark
  299. I2S0_TCR2 = I2S_TCR2_SYNC(0) | I2S_TCR2_MSEL(1) | I2S_TCR2_BCD | I2S_TCR2_DIV(0);
  300. I2S0_TCR3 = I2S_TCR3_TCE;
  301. //4 Words per Frame 32 Bit Word-Length -> 128 Bit Frame-Length, MSB First:
  302. I2S0_TCR4 = I2S_TCR4_FRSZ(3) | I2S_TCR4_SYWD(0) | I2S_TCR4_MF | I2S_TCR4_FSP | I2S_TCR4_FSD;
  303. I2S0_TCR5 = I2S_TCR5_WNW(31) | I2S_TCR5_W0W(31) | I2S_TCR5_FBT(31);
  304. I2S0_RCSR = 0;
  305. #if 0
  306. // configure pin mux for 3 clock signals (debug only)
  307. CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK)
  308. CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK
  309. // CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK
  310. #endif
  311. }
  312. #elif defined(KINETISL)
  313. void AudioOutputSPDIF::update(void)
  314. {
  315. audio_block_t *block;
  316. block = receiveReadOnly(0); // input 0 = left channel
  317. if (block) release(block);
  318. block = receiveReadOnly(1); // input 1 = right channel
  319. if (block) release(block);
  320. }
  321. #endif