Ви не можете вибрати більше 25 тем Теми мають розпочинатися з літери або цифри, можуть містити дефіси (-) і не повинні перевищувати 35 символів.

10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
10 роки тому
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "input_i2s.h"
  27. #include "output_i2s.h"
  28. DMAMEM static uint32_t i2s_rx_buffer[AUDIO_BLOCK_SAMPLES];
  29. audio_block_t * AudioInputI2S::block_left = NULL;
  30. audio_block_t * AudioInputI2S::block_right = NULL;
  31. uint16_t AudioInputI2S::block_offset = 0;
  32. bool AudioInputI2S::update_responsibility = false;
  33. DMAChannel AudioInputI2S::dma(false);
  34. void AudioInputI2S::begin(void)
  35. {
  36. dma.begin(true); // Allocate the DMA channel first
  37. //block_left_1st = NULL;
  38. //block_right_1st = NULL;
  39. // TODO: should we set & clear the I2S_RCSR_SR bit here?
  40. AudioOutputI2S::config_i2s();
  41. CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
  42. #if defined(KINETISK)
  43. dma.TCD->SADDR = &I2S0_RDR0;
  44. dma.TCD->SOFF = 0;
  45. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  46. dma.TCD->NBYTES_MLNO = 2;
  47. dma.TCD->SLAST = 0;
  48. dma.TCD->DADDR = i2s_rx_buffer;
  49. dma.TCD->DOFF = 2;
  50. dma.TCD->CITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  51. dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
  52. dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  53. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  54. #endif
  55. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
  56. update_responsibility = update_setup();
  57. dma.enable();
  58. I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
  59. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
  60. dma.attachInterrupt(isr);
  61. }
  62. void AudioInputI2S::isr(void)
  63. {
  64. uint32_t daddr, offset;
  65. const int16_t *src, *end;
  66. int16_t *dest_left, *dest_right;
  67. audio_block_t *left, *right;
  68. //digitalWriteFast(3, HIGH);
  69. #if defined(KINETISK)
  70. daddr = (uint32_t)(dma.TCD->DADDR);
  71. #endif
  72. dma.clearInterrupt();
  73. if (daddr < (uint32_t)i2s_rx_buffer + sizeof(i2s_rx_buffer) / 2) {
  74. // DMA is receiving to the first half of the buffer
  75. // need to remove data from the second half
  76. src = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  77. end = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES];
  78. if (AudioInputI2S::update_responsibility) AudioStream::update_all();
  79. } else {
  80. // DMA is receiving to the second half of the buffer
  81. // need to remove data from the first half
  82. src = (int16_t *)&i2s_rx_buffer[0];
  83. end = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  84. }
  85. left = AudioInputI2S::block_left;
  86. right = AudioInputI2S::block_right;
  87. if (left != NULL && right != NULL) {
  88. offset = AudioInputI2S::block_offset;
  89. if (offset <= AUDIO_BLOCK_SAMPLES/2) {
  90. dest_left = &(left->data[offset]);
  91. dest_right = &(right->data[offset]);
  92. AudioInputI2S::block_offset = offset + AUDIO_BLOCK_SAMPLES/2;
  93. do {
  94. //n = *src++;
  95. //*dest_left++ = (int16_t)n;
  96. //*dest_right++ = (int16_t)(n >> 16);
  97. *dest_left++ = *src++;
  98. *dest_right++ = *src++;
  99. } while (src < end);
  100. }
  101. }
  102. //digitalWriteFast(3, LOW);
  103. }
  104. void AudioInputI2S::update(void)
  105. {
  106. audio_block_t *new_left=NULL, *new_right=NULL, *out_left=NULL, *out_right=NULL;
  107. // allocate 2 new blocks, but if one fails, allocate neither
  108. new_left = allocate();
  109. if (new_left != NULL) {
  110. new_right = allocate();
  111. if (new_right == NULL) {
  112. release(new_left);
  113. new_left = NULL;
  114. }
  115. }
  116. __disable_irq();
  117. if (block_offset >= AUDIO_BLOCK_SAMPLES) {
  118. // the DMA filled 2 blocks, so grab them and get the
  119. // 2 new blocks to the DMA, as quickly as possible
  120. out_left = block_left;
  121. block_left = new_left;
  122. out_right = block_right;
  123. block_right = new_right;
  124. block_offset = 0;
  125. __enable_irq();
  126. // then transmit the DMA's former blocks
  127. transmit(out_left, 0);
  128. release(out_left);
  129. transmit(out_right, 1);
  130. release(out_right);
  131. //Serial.print(".");
  132. } else if (new_left != NULL) {
  133. // the DMA didn't fill blocks, but we allocated blocks
  134. if (block_left == NULL) {
  135. // the DMA doesn't have any blocks to fill, so
  136. // give it the ones we just allocated
  137. block_left = new_left;
  138. block_right = new_right;
  139. block_offset = 0;
  140. __enable_irq();
  141. } else {
  142. // the DMA already has blocks, doesn't need these
  143. __enable_irq();
  144. release(new_left);
  145. release(new_right);
  146. }
  147. } else {
  148. // The DMA didn't fill blocks, and we could not allocate
  149. // memory... the system is likely starving for memory!
  150. // Sadly, there's nothing we can do.
  151. __enable_irq();
  152. }
  153. }
  154. /******************************************************************/
  155. void AudioInputI2Sslave::begin(void)
  156. {
  157. dma.begin(true); // Allocate the DMA channel first
  158. //block_left_1st = NULL;
  159. //block_right_1st = NULL;
  160. AudioOutputI2Sslave::config_i2s();
  161. CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
  162. #if defined(KINETISK)
  163. dma.TCD->SADDR = &I2S0_RDR0;
  164. dma.TCD->SOFF = 0;
  165. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  166. dma.TCD->NBYTES_MLNO = 2;
  167. dma.TCD->SLAST = 0;
  168. dma.TCD->DADDR = i2s_rx_buffer;
  169. dma.TCD->DOFF = 2;
  170. dma.TCD->CITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  171. dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
  172. dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  173. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  174. #endif
  175. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
  176. update_responsibility = update_setup();
  177. dma.enable();
  178. I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
  179. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
  180. dma.attachInterrupt(isr);
  181. }