control_cs4272.cpp 7.1KB

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  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * https://hackaday.io/project/5912-teensy-super-audio-board
  5. * https://github.com/whollender/Audio/tree/SuperAudioBoard
  6. *
  7. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  8. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  9. * open source software by purchasing Teensy or other PJRC products.
  10. *
  11. * Permission is hereby granted, free of charge, to any person obtaining a copy
  12. * of this software and associated documentation files (the "Software"), to deal
  13. * in the Software without restriction, including without limitation the rights
  14. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  15. * copies of the Software, and to permit persons to whom the Software is
  16. * furnished to do so, subject to the following conditions:
  17. *
  18. * The above copyright notice, development funding notice, and this permission
  19. * notice shall be included in all copies or substantial portions of the Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  24. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  25. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  26. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  27. * THE SOFTWARE.
  28. */
  29. #include <Arduino.h>
  30. #include "control_cs4272.h"
  31. #include "Wire.h"
  32. #define CS4272_ADDR 0x10 // TODO: need to double check
  33. // Section 8.1 Mode Control
  34. #define CS4272_MODE_CONTROL (uint8_t)0x01
  35. #define CS4272_MC_FUNC_MODE(x) (uint8_t)(((x) & 0x03) << 6)
  36. #define CS4272_MC_RATIO_SEL(x) (uint8_t)(((x) & 0x03) << 4)
  37. #define CS4272_MC_MASTER_SLAVE (uint8_t)0x08
  38. #define CS4272_MC_SERIAL_FORMAT(x) (uint8_t)(((x) & 0x07) << 0)
  39. // Section 8.2 DAC Control
  40. #define CS4272_DAC_CONTROL (uint8_t)0x02
  41. #define CS4272_DAC_CTRL_AUTO_MUTE (uint8_t)0x80
  42. #define CS4272_DAC_CTRL_FILTER_SEL (uint8_t)0x40
  43. #define CS4272_DAC_CTRL_DE_EMPHASIS(x) (uint8_t)(((x) & 0x03) << 4)
  44. #define CS4272_DAC_CTRL_VOL_RAMP_UP (uint8_t)0x08
  45. #define CS4272_DAC_CTRL_VOL_RAMP_DN (uint8_t)0x04
  46. #define CS4272_DAC_CTRL_INV_POL(x) (uint8_t)(((x) & 0x03) << 0)
  47. // Section 8.3 DAC Volume and Mixing
  48. #define CS4272_DAC_VOL (uint8_t)0x03
  49. #define CS4272_DAC_VOL_CH_VOL_TRACKING (uint8_t)0x40
  50. #define CS4272_DAC_VOL_SOFT_RAMP(x) (uint8_t)(((x) & 0x03) << 4)
  51. #define CS4272_DAC_VOL_ATAPI(x) (uint8_t)(((x) & 0x0F) << 0)
  52. // Section 8.4 DAC Channel A volume
  53. #define CS4272_DAC_CHA_VOL (uint8_t)0x04
  54. #define CS4272_DAC_CHA_VOL_MUTE (uint8_t)0x80
  55. #define CS4272_DAC_CHA_VOL_VOLUME(x) (uint8_t)(((x) & 0x7F) << 0)
  56. // Section 8.5 DAC Channel B volume
  57. #define CS4272_DAC_CHB_VOL (uint8_t)0x05
  58. #define CS4272_DAC_CHB_VOL_MUTE (uint8_t)0x80
  59. #define CS4272_DAC_CHB_VOL_VOLUME(x) (uint8_t)(((x) & 0x7F) << 0)
  60. // Section 8.6 ADC Control
  61. #define CS4272_ADC_CTRL (uint8_t)0x06
  62. #define CS4272_ADC_CTRL_DITHER (uint8_t)0x20
  63. #define CS4272_ADC_CTRL_SER_FORMAT (uint8_t)0x10
  64. #define CS4272_ADC_CTRL_MUTE(x) (uint8_t)(((x) & 0x03) << 2)
  65. #define CS4272_ADC_CTRL_HPF(x) (uint8_t)(((x) & 0x03) << 0)
  66. // Section 8.7 Mode Control 2
  67. #define CS4272_MODE_CTRL2 (uint8_t)0x07
  68. #define CS4272_MODE_CTRL2_LOOP (uint8_t)0x10
  69. #define CS4272_MODE_CTRL2_MUTE_TRACK (uint8_t)0x08
  70. #define CS4272_MODE_CTRL2_CTRL_FREEZE (uint8_t)0x04
  71. #define CS4272_MODE_CTRL2_CTRL_PORT_EN (uint8_t)0x02
  72. #define CS4272_MODE_CTRL2_POWER_DOWN (uint8_t)0x01
  73. // Section 8.8 Chip ID
  74. #define CS4272_CHIP_ID (uint8_t)0x08
  75. #define CS4272_CHIP_ID_PART(x) (uint8_t)(((x) & 0x0F) << 4)
  76. #define CS4272_CHIP_ID_REV(x) (uint8_t)(((x) & 0x0F) << 0)
  77. #define CS4272_RESET_PIN 2
  78. bool AudioControlCS4272::enable(void)
  79. {
  80. Wire.begin();
  81. delay(5);
  82. initLocalRegs();
  83. // Setup Reset pin
  84. pinMode(CS4272_RESET_PIN, OUTPUT);
  85. // Drive pin low
  86. digitalWriteFast(CS4272_RESET_PIN, LOW);
  87. delay(1);
  88. // Release Reset
  89. digitalWriteFast(CS4272_RESET_PIN, HIGH);
  90. delay(2);
  91. // Set power down and control port enable as spec'd in the
  92. // datasheet for control port mode
  93. write(CS4272_MODE_CTRL2, CS4272_MODE_CTRL2_POWER_DOWN
  94. | CS4272_MODE_CTRL2_CTRL_PORT_EN);
  95. // Wait for further setup
  96. delay(1);
  97. // Set ratio select for MCLK=512*LRCLK (BCLK = 64*LRCLK), and master mode
  98. write(CS4272_MODE_CONTROL, CS4272_MC_RATIO_SEL(3) | CS4272_MC_MASTER_SLAVE);
  99. delay(10);
  100. // Release power down bit to start up codec
  101. // TODO: May need other bits set in this reg
  102. write(CS4272_MODE_CTRL2, CS4272_MODE_CTRL2_CTRL_PORT_EN);
  103. // Wait for everything to come up
  104. delay(10);
  105. return true;
  106. }
  107. bool AudioControlCS4272::volumeInteger(unsigned int n)
  108. {
  109. unsigned int val = 0x7F - (n & 0x7F);
  110. write(CS4272_DAC_CHA_VOL,CS4272_DAC_CHA_VOL_VOLUME(val));
  111. write(CS4272_DAC_CHB_VOL,CS4272_DAC_CHB_VOL_VOLUME(val));
  112. return true;
  113. }
  114. bool AudioControlCS4272::volume(float left, float right)
  115. {
  116. unsigned int leftInt,rightInt;
  117. leftInt = left*127 + 0.499;
  118. rightInt = right*127 + 0.499;
  119. unsigned int val = 0x7F - (leftInt & 0x7F);
  120. write(CS4272_DAC_CHA_VOL,CS4272_DAC_CHA_VOL_VOLUME(val));
  121. val = 0x7F - (rightInt & 0x7F);
  122. write(CS4272_DAC_CHB_VOL,CS4272_DAC_CHB_VOL_VOLUME(val));
  123. return true;
  124. }
  125. bool AudioControlCS4272::dacVolume(float left, float right)
  126. {
  127. return volume(left,right);
  128. }
  129. bool AudioControlCS4272::muteOutput(void)
  130. {
  131. write(CS4272_DAC_CHA_VOL,
  132. regLocal[CS4272_DAC_CHA_VOL] | CS4272_DAC_CHA_VOL_MUTE);
  133. write(CS4272_DAC_CHB_VOL,
  134. regLocal[CS4272_DAC_CHB_VOL] | CS4272_DAC_CHB_VOL_MUTE);
  135. return true;
  136. }
  137. bool AudioControlCS4272::unmuteOutput(void)
  138. {
  139. write(CS4272_DAC_CHA_VOL,
  140. regLocal[CS4272_DAC_CHA_VOL] & ~CS4272_DAC_CHA_VOL_MUTE);
  141. write(CS4272_DAC_CHB_VOL,
  142. regLocal[CS4272_DAC_CHB_VOL] & ~CS4272_DAC_CHB_VOL_MUTE);
  143. return true;
  144. }
  145. bool AudioControlCS4272::muteInput(void)
  146. {
  147. uint8_t val = regLocal[CS4272_ADC_CTRL] | CS4272_ADC_CTRL_MUTE(3);
  148. write(CS4272_ADC_CTRL,val);
  149. return true;
  150. }
  151. bool AudioControlCS4272::unmuteInput(void)
  152. {
  153. uint8_t val = regLocal[CS4272_ADC_CTRL] & ~CS4272_ADC_CTRL_MUTE(3);
  154. write(CS4272_ADC_CTRL,val);
  155. return true;
  156. }
  157. bool AudioControlCS4272::enableDither(void)
  158. {
  159. uint8_t val = regLocal[CS4272_ADC_CTRL] | CS4272_ADC_CTRL_DITHER;
  160. write(CS4272_ADC_CTRL,val);
  161. return true;
  162. }
  163. bool AudioControlCS4272::disableDither(void)
  164. {
  165. uint8_t val = regLocal[CS4272_ADC_CTRL] & ~CS4272_ADC_CTRL_DITHER;
  166. write(CS4272_ADC_CTRL,val);
  167. return true;
  168. }
  169. bool AudioControlCS4272::write(unsigned int reg, unsigned int val)
  170. {
  171. // Write local copy first
  172. if(reg > 7)
  173. return false;
  174. regLocal[reg] = val;
  175. Wire.beginTransmission(CS4272_ADDR);
  176. Wire.write(reg & 0xFF);
  177. Wire.write(val & 0xFF);
  178. Wire.endTransmission();
  179. return true;
  180. }
  181. // Initialize local registers to CS4272 reset status
  182. void AudioControlCS4272::initLocalRegs(void)
  183. {
  184. regLocal[CS4272_MODE_CONTROL] = 0x00;
  185. regLocal[CS4272_DAC_CONTROL] = CS4272_DAC_CTRL_AUTO_MUTE;
  186. regLocal[CS4272_DAC_VOL] = CS4272_DAC_VOL_SOFT_RAMP(2) | CS4272_DAC_VOL_ATAPI(9);
  187. regLocal[CS4272_DAC_CHA_VOL] = 0x00;
  188. regLocal[CS4272_DAC_CHB_VOL] = 0x00;
  189. regLocal[CS4272_ADC_CTRL] = 0x00;
  190. regLocal[CS4272_MODE_CTRL2] = 0x00;
  191. }