input_i2s_quad.cpp 7.8KB

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  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include <Arduino.h>
  27. #include "input_i2s_quad.h"
  28. #include "output_i2s_quad.h"
  29. #include "output_i2s.h"
  30. DMAMEM __attribute__((aligned(32))) static uint32_t i2s_rx_buffer[AUDIO_BLOCK_SAMPLES*2];
  31. audio_block_t * AudioInputI2SQuad::block_ch1 = NULL;
  32. audio_block_t * AudioInputI2SQuad::block_ch2 = NULL;
  33. audio_block_t * AudioInputI2SQuad::block_ch3 = NULL;
  34. audio_block_t * AudioInputI2SQuad::block_ch4 = NULL;
  35. uint16_t AudioInputI2SQuad::block_offset = 0;
  36. bool AudioInputI2SQuad::update_responsibility = false;
  37. DMAChannel AudioInputI2SQuad::dma(false);
  38. #if defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__IMXRT1062__)
  39. void AudioInputI2SQuad::begin(void)
  40. {
  41. dma.begin(true); // Allocate the DMA channel first
  42. #if defined(KINETISK)
  43. // TODO: should we set & clear the I2S_RCSR_SR bit here?
  44. AudioOutputI2SQuad::config_i2s();
  45. CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
  46. #if defined(__MK20DX256__)
  47. CORE_PIN30_CONFIG = PORT_PCR_MUX(4); // pin 30, PTC11, I2S0_RXD1
  48. #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
  49. CORE_PIN38_CONFIG = PORT_PCR_MUX(4); // pin 38, PTC11, I2S0_RXD1
  50. #endif
  51. #if defined(KINETISK)
  52. dma.TCD->SADDR = &I2S0_RDR0;
  53. dma.TCD->SOFF = 4;
  54. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_SMOD(3) | DMA_TCD_ATTR_DSIZE(1);
  55. dma.TCD->NBYTES_MLNO = 4;
  56. dma.TCD->SLAST = 0;
  57. dma.TCD->DADDR = i2s_rx_buffer;
  58. dma.TCD->DOFF = 2;
  59. dma.TCD->CITER_ELINKNO = sizeof(i2s_rx_buffer) / 4;
  60. dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
  61. dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 4;
  62. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  63. #endif
  64. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
  65. update_responsibility = update_setup();
  66. dma.enable();
  67. I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
  68. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
  69. dma.attachInterrupt(isr);
  70. #elif defined(__IMXRT1062__)
  71. const int pinoffset = 0; // TODO: make this configurable...
  72. AudioOutputI2S::config_i2s();
  73. I2S1_RCR3 = I2S_RCR3_RCE_2CH << pinoffset;
  74. switch (pinoffset) {
  75. case 0:
  76. CORE_PIN8_CONFIG = 3;
  77. CORE_PIN6_CONFIG = 3;
  78. IOMUXC_SAI1_RX_DATA0_SELECT_INPUT = 2; // GPIO_B1_00_ALT3, pg 873
  79. IOMUXC_SAI1_RX_DATA1_SELECT_INPUT = 1; // GPIO_B0_10_ALT3, pg 873
  80. break;
  81. case 1:
  82. CORE_PIN6_CONFIG = 3;
  83. CORE_PIN9_CONFIG = 3;
  84. IOMUXC_SAI1_RX_DATA1_SELECT_INPUT = 1; // GPIO_B0_10_ALT3, pg 873
  85. IOMUXC_SAI1_RX_DATA2_SELECT_INPUT = 1; // GPIO_B0_11_ALT3, pg 874
  86. break;
  87. case 2:
  88. CORE_PIN9_CONFIG = 3;
  89. CORE_PIN32_CONFIG = 3;
  90. IOMUXC_SAI1_RX_DATA2_SELECT_INPUT = 1; // GPIO_B0_11_ALT3, pg 874
  91. IOMUXC_SAI1_RX_DATA3_SELECT_INPUT = 1; // GPIO_B0_12_ALT3, pg 875
  92. break;
  93. }
  94. dma.TCD->SADDR = (void *)((uint32_t)&I2S1_RDR0 + 2 + pinoffset * 4);
  95. dma.TCD->SOFF = 4;
  96. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  97. dma.TCD->NBYTES_MLOFFYES = DMA_TCD_NBYTES_SMLOE |
  98. DMA_TCD_NBYTES_MLOFFYES_MLOFF(-8) |
  99. DMA_TCD_NBYTES_MLOFFYES_NBYTES(4);
  100. dma.TCD->SLAST = -8;
  101. dma.TCD->DADDR = i2s_rx_buffer;
  102. dma.TCD->DOFF = 2;
  103. dma.TCD->CITER_ELINKNO = AUDIO_BLOCK_SAMPLES * 2;
  104. dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
  105. dma.TCD->BITER_ELINKNO = AUDIO_BLOCK_SAMPLES * 2;
  106. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  107. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SAI1_RX);
  108. I2S1_RCSR = 0;
  109. I2S1_RCR3 = I2S_RCR3_RCE_2CH << pinoffset;
  110. I2S1_RCSR = I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
  111. update_responsibility = update_setup();
  112. dma.enable();
  113. dma.attachInterrupt(isr);
  114. #endif
  115. }
  116. void AudioInputI2SQuad::isr(void)
  117. {
  118. uint32_t daddr, offset;
  119. const int16_t *src;
  120. int16_t *dest1, *dest2, *dest3, *dest4;
  121. //digitalWriteFast(3, HIGH);
  122. daddr = (uint32_t)(dma.TCD->DADDR);
  123. dma.clearInterrupt();
  124. if (daddr < (uint32_t)i2s_rx_buffer + sizeof(i2s_rx_buffer) / 2) {
  125. // DMA is receiving to the first half of the buffer
  126. // need to remove data from the second half
  127. src = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES];
  128. if (update_responsibility) update_all();
  129. } else {
  130. // DMA is receiving to the second half of the buffer
  131. // need to remove data from the first half
  132. src = (int16_t *)&i2s_rx_buffer[0];
  133. }
  134. if (block_ch1) {
  135. offset = block_offset;
  136. if (offset <= AUDIO_BLOCK_SAMPLES/2) {
  137. arm_dcache_delete((void*)src, sizeof(i2s_rx_buffer) / 2);
  138. block_offset = offset + AUDIO_BLOCK_SAMPLES/2;
  139. dest1 = &(block_ch1->data[offset]);
  140. dest2 = &(block_ch2->data[offset]);
  141. dest3 = &(block_ch3->data[offset]);
  142. dest4 = &(block_ch4->data[offset]);
  143. for (int i=0; i < AUDIO_BLOCK_SAMPLES/2; i++) {
  144. *dest1++ = *src++;
  145. *dest3++ = *src++;
  146. *dest2++ = *src++;
  147. *dest4++ = *src++;
  148. }
  149. }
  150. }
  151. //digitalWriteFast(3, LOW);
  152. }
  153. void AudioInputI2SQuad::update(void)
  154. {
  155. audio_block_t *new1, *new2, *new3, *new4;
  156. audio_block_t *out1, *out2, *out3, *out4;
  157. // allocate 4 new blocks
  158. new1 = allocate();
  159. new2 = allocate();
  160. new3 = allocate();
  161. new4 = allocate();
  162. // but if any fails, allocate none
  163. if (!new1 || !new2 || !new3 || !new4) {
  164. if (new1) {
  165. release(new1);
  166. new1 = NULL;
  167. }
  168. if (new2) {
  169. release(new2);
  170. new2 = NULL;
  171. }
  172. if (new3) {
  173. release(new3);
  174. new3 = NULL;
  175. }
  176. if (new4) {
  177. release(new4);
  178. new4 = NULL;
  179. }
  180. }
  181. __disable_irq();
  182. if (block_offset >= AUDIO_BLOCK_SAMPLES) {
  183. // the DMA filled 4 blocks, so grab them and get the
  184. // 4 new blocks to the DMA, as quickly as possible
  185. out1 = block_ch1;
  186. block_ch1 = new1;
  187. out2 = block_ch2;
  188. block_ch2 = new2;
  189. out3 = block_ch3;
  190. block_ch3 = new3;
  191. out4 = block_ch4;
  192. block_ch4 = new4;
  193. block_offset = 0;
  194. __enable_irq();
  195. // then transmit the DMA's former blocks
  196. transmit(out1, 0);
  197. release(out1);
  198. transmit(out2, 1);
  199. release(out2);
  200. transmit(out3, 2);
  201. release(out3);
  202. transmit(out4, 3);
  203. release(out4);
  204. } else if (new1 != NULL) {
  205. // the DMA didn't fill blocks, but we allocated blocks
  206. if (block_ch1 == NULL) {
  207. // the DMA doesn't have any blocks to fill, so
  208. // give it the ones we just allocated
  209. block_ch1 = new1;
  210. block_ch2 = new2;
  211. block_ch3 = new3;
  212. block_ch4 = new4;
  213. block_offset = 0;
  214. __enable_irq();
  215. } else {
  216. // the DMA already has blocks, doesn't need these
  217. __enable_irq();
  218. release(new1);
  219. release(new2);
  220. release(new3);
  221. release(new4);
  222. }
  223. } else {
  224. // The DMA didn't fill blocks, and we could not allocate
  225. // memory... the system is likely starving for memory!
  226. // Sadly, there's nothing we can do.
  227. __enable_irq();
  228. }
  229. }
  230. #else // not __MK20DX256__
  231. void AudioInputI2SQuad::begin(void)
  232. {
  233. }
  234. #endif