| dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; | dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; | ||||
| dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX); | dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX); | ||||
| update_responsibility = update_setup(); | |||||
| dma.attachInterrupt(isr); | |||||
| dma.enable(); | |||||
| I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; | I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; | ||||
| return; | |||||
| #elif defined(__IMXRT1052__) || defined(__IMXRT1062__) | #elif defined(__IMXRT1052__) || defined(__IMXRT1062__) | ||||
| #if defined(__IMXRT1052__) | #if defined(__IMXRT1052__) | ||||
| I2S1_RCSR |= I2S_RCSR_RE; | I2S1_RCSR |= I2S_RCSR_RE; | ||||
| I2S1_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE; | I2S1_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE; | ||||
| #endif | |||||
| update_responsibility = update_setup(); | update_responsibility = update_setup(); | ||||
| dma.attachInterrupt(isr); | dma.attachInterrupt(isr); | ||||
| dma.enable(); | dma.enable(); | ||||
| return; | |||||
| #endif | |||||
| } | } | ||||
| void AudioOutputPT8211::isr(void) | void AudioOutputPT8211::isr(void) |