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/* Audio Library for Teensy 3.X |
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* Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com |
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* |
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* https://hackaday.io/project/5912-teensy-super-audio-board |
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* https://github.com/whollender/Audio/tree/SuperAudioBoard |
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* |
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* Development of this audio library was funded by PJRC.COM, LLC by sales of |
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* Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop |
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* open source software by purchasing Teensy or other PJRC products. |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a copy |
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* of this software and associated documentation files (the "Software"), to deal |
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* in the Software without restriction, including without limitation the rights |
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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* copies of the Software, and to permit persons to whom the Software is |
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* furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice, development funding notice, and this permission |
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* notice shall be included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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* THE SOFTWARE. |
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*/ |
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#include "control_cs4272.h" |
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#include "Wire.h" |
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#define CS4272_ADDR 0x10 // TODO: need to double check |
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// Section 8.1 Mode Control |
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#define CS4272_MODE_CONTROL (uint8_t)0x01 |
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#define CS4272_MC_FUNC_MODE(x) (uint8_t)(((x) & 0x03) << 6) |
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#define CS4272_MC_RATIO_SEL(x) (uint8_t)(((x) & 0x03) << 4) |
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#define CS4272_MC_MASTER_SLAVE (uint8_t)0x08 |
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#define CS4272_MC_SERIAL_FORMAT(x) (uint8_t)(((x) & 0x07) << 0) |
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// Section 8.2 DAC Control |
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#define CS4272_DAC_CONTROL (uint8_t)0x02 |
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#define CS4272_DAC_CTRL_AUTO_MUTE (uint8_t)0x80 |
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#define CS4272_DAC_CTRL_FILTER_SEL (uint8_t)0x40 |
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#define CS4272_DAC_CTRL_DE_EMPHASIS(x) (uint8_t)(((x) & 0x03) << 4) |
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#define CS4272_DAC_CTRL_VOL_RAMP_UP (uint8_t)0x08 |
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#define CS4272_DAC_CTRL_VOL_RAMP_DN (uint8_t)0x04 |
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#define CS4272_DAC_CTRL_INV_POL(x) (uint8_t)(((x) & 0x03) << 0) |
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// Section 8.3 DAC Volume and Mixing |
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#define CS4272_DAC_VOL (uint8_t)0x03 |
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#define CS4272_DAC_VOL_CH_VOL_TRACKING (uint8_t)0x40 |
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#define CS4272_DAC_VOL_SOFT_RAMP(x) (uint8_t)(((x) & 0x03) << 4) |
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#define CS4272_DAC_VOL_ATAPI(x) (uint8_t)(((x) & 0x0F) << 0) |
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// Section 8.4 DAC Channel A volume |
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#define CS4272_DAC_CHA_VOL (uint8_t)0x04 |
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#define CS4272_DAC_CHA_VOL_MUTE (uint8_t)0x80 |
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#define CS4272_DAC_CHA_VOL_VOLUME(x) (uint8_t)(((x) & 0x7F) << 0) |
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// Section 8.5 DAC Channel B volume |
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#define CS4272_DAC_CHB_VOL (uint8_t)0x05 |
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#define CS4272_DAC_CHB_VOL_MUTE (uint8_t)0x80 |
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#define CS4272_DAC_CHB_VOL_VOLUME(x) (uint8_t)(((x) & 0x7F) << 0) |
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// Section 8.6 ADC Control |
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#define CS4272_ADC_CTRL (uint8_t)0x06 |
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#define CS4272_ADC_CTRL_DITHER (uint8_t)0x20 |
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#define CS4272_ADC_CTRL_SER_FORMAT (uint8_t)0x10 |
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#define CS4272_ADC_CTRL_MUTE(x) (uint8_t)(((x) & 0x03) << 2) |
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#define CS4272_ADC_CTRL_HPF(x) (uint8_t)(((x) & 0x03) << 0) |
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// Section 8.7 Mode Control 2 |
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#define CS4272_MODE_CTRL2 (uint8_t)0x07 |
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#define CS4272_MODE_CTRL2_LOOP (uint8_t)0x10 |
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#define CS4272_MODE_CTRL2_MUTE_TRACK (uint8_t)0x08 |
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#define CS4272_MODE_CTRL2_CTRL_FREEZE (uint8_t)0x04 |
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#define CS4272_MODE_CTRL2_CTRL_PORT_EN (uint8_t)0x02 |
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#define CS4272_MODE_CTRL2_POWER_DOWN (uint8_t)0x01 |
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// Section 8.8 Chip ID |
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#define CS4272_CHIP_ID (uint8_t)0x08 |
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#define CS4272_CHIP_ID_PART(x) (uint8_t)(((x) & 0x0F) << 4) |
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#define CS4272_CHIP_ID_REV(x) (uint8_t)(((x) & 0x0F) << 0) |
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#define CS4272_RESET_PIN 2 |
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bool AudioControlCS4272::enable(void) |
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{ |
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Wire.begin(); |
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delay(5); |
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initLocalRegs(); |
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// Setup Reset pin |
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pinMode(CS4272_RESET_PIN, OUTPUT); |
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// Drive pin low |
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digitalWriteFast(CS4272_RESET_PIN, LOW); |
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delay(1); |
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// Release Reset |
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digitalWriteFast(CS4272_RESET_PIN, HIGH); |
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delay(2); |
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// Set power down and control port enable as spec'd in the |
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// datasheet for control port mode |
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write(CS4272_MODE_CTRL2, CS4272_MODE_CTRL2_POWER_DOWN |
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| CS4272_MODE_CTRL2_CTRL_PORT_EN); |
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// Wait for further setup |
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delay(1); |
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// Set ratio select for MCLK=512*LRCLK (BCLK = 64*LRCLK), and master mode |
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write(CS4272_MODE_CONTROL, CS4272_MC_RATIO_SEL(3) | CS4272_MC_MASTER_SLAVE); |
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delay(10); |
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// Release power down bit to start up codec |
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// TODO: May need other bits set in this reg |
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write(CS4272_MODE_CTRL2, CS4272_MODE_CTRL2_CTRL_PORT_EN); |
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// Wait for everything to come up |
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delay(10); |
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return true; |
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} |
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bool AudioControlCS4272::volumeInteger(unsigned int n) |
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{ |
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unsigned int val = 0x7F - (n & 0x7F); |
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write(CS4272_DAC_CHA_VOL,CS4272_DAC_CHA_VOL_VOLUME(val)); |
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write(CS4272_DAC_CHB_VOL,CS4272_DAC_CHB_VOL_VOLUME(val)); |
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return true; |
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} |
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bool AudioControlCS4272::volume(float left, float right) |
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{ |
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unsigned int leftInt,rightInt; |
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leftInt = left*127 + 0.499; |
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rightInt = right*127 + 0.499; |
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unsigned int val = 0x7F - (leftInt & 0x7F); |
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write(CS4272_DAC_CHA_VOL,CS4272_DAC_CHA_VOL_VOLUME(val)); |
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val = 0x7F - (rightInt & 0x7F); |
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write(CS4272_DAC_CHB_VOL,CS4272_DAC_CHB_VOL_VOLUME(val)); |
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return true; |
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} |
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bool AudioControlCS4272::dacVolume(float left, float right) |
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{ |
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return volume(left,right); |
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} |
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bool AudioControlCS4272::muteOutput(void) |
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{ |
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write(CS4272_DAC_CHA_VOL, |
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regLocal[CS4272_DAC_CHA_VOL] | CS4272_DAC_CHA_VOL_MUTE); |
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write(CS4272_DAC_CHB_VOL, |
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regLocal[CS4272_DAC_CHB_VOL] | CS4272_DAC_CHB_VOL_MUTE); |
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return true; |
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} |
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bool AudioControlCS4272::unmuteOutput(void) |
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{ |
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write(CS4272_DAC_CHA_VOL, |
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regLocal[CS4272_DAC_CHA_VOL] & ~CS4272_DAC_CHA_VOL_MUTE); |
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write(CS4272_DAC_CHB_VOL, |
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regLocal[CS4272_DAC_CHB_VOL] & ~CS4272_DAC_CHB_VOL_MUTE); |
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return true; |
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} |
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bool AudioControlCS4272::muteInput(void) |
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{ |
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uint8_t val = regLocal[CS4272_ADC_CTRL] | CS4272_ADC_CTRL_MUTE(3); |
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write(CS4272_ADC_CTRL,val); |
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return true; |
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} |
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bool AudioControlCS4272::unmuteInput(void) |
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{ |
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uint8_t val = regLocal[CS4272_ADC_CTRL] & ~CS4272_ADC_CTRL_MUTE(3); |
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write(CS4272_ADC_CTRL,val); |
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return true; |
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} |
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bool AudioControlCS4272::enableDither(void) |
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{ |
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uint8_t val = regLocal[CS4272_ADC_CTRL] | CS4272_ADC_CTRL_DITHER; |
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write(CS4272_ADC_CTRL,val); |
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return true; |
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} |
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bool AudioControlCS4272::disableDither(void) |
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{ |
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uint8_t val = regLocal[CS4272_ADC_CTRL] & ~CS4272_ADC_CTRL_DITHER; |
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write(CS4272_ADC_CTRL,val); |
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return true; |
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} |
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bool AudioControlCS4272::write(unsigned int reg, unsigned int val) |
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{ |
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// Write local copy first |
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if(reg > 7) |
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return false; |
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regLocal[reg] = val; |
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Wire.beginTransmission(CS4272_ADDR); |
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Wire.write(reg & 0xFF); |
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Wire.write(val & 0xFF); |
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Wire.endTransmission(); |
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return true; |
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} |
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// Initialize local registers to CS4272 reset status |
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void AudioControlCS4272::initLocalRegs(void) |
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{ |
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regLocal[CS4272_MODE_CONTROL] = 0x00; |
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regLocal[CS4272_DAC_CONTROL] = CS4272_DAC_CTRL_AUTO_MUTE; |
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regLocal[CS4272_DAC_VOL] = CS4272_DAC_VOL_SOFT_RAMP(2) | CS4272_DAC_VOL_ATAPI(9); |
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regLocal[CS4272_DAC_CHA_VOL] = 0x00; |
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regLocal[CS4272_DAC_CHB_VOL] = 0x00; |
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regLocal[CS4272_ADC_CTRL] = 0x00; |
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regLocal[CS4272_MODE_CTRL2] = 0x00; |
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} |
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PaulStoffregen
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