// enable MCLK output | // enable MCLK output | ||||
I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; | I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; | ||||
while (I2S0_MCR & I2S_MCR_DUF) ; | |||||
I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); | I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); | ||||
// configure transmitter | // configure transmitter |
// enable MCLK output | // enable MCLK output | ||||
I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; | I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; | ||||
while (I2S0_MCR & I2S_MCR_DUF) ; | |||||
I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); | I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); | ||||
// configure transmitter | // configure transmitter |
// enable MCLK output | // enable MCLK output | ||||
I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; | I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; | ||||
while (I2S0_MCR & I2S_MCR_DUF) ; | |||||
I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); | I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); | ||||
// configure transmitter | // configure transmitter |