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I2S0_TCSR = I2S_TCSR_SR; |
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I2S0_TCSR = I2S_TCSR_SR; |
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I2S0_TCSR = I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE; |
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I2S0_TCSR = I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE; |
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#elif defined(__IMXRT1052__) || defined(__IMXRT1062__) |
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CORE_PIN6_CONFIG = 3; //1:TX_DATA0 |
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#elif defined(__IMXRT1062__) |
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CORE_PIN7_CONFIG = 3; //1:TX_DATA0 |
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dma.TCD->SADDR = tdm_tx_buffer; |
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dma.TCD->SADDR = tdm_tx_buffer; |
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dma.TCD->SOFF = 4; |
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dma.TCD->SOFF = 4; |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK - 11.2 MHz |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK - 11.2 MHz |
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CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK - 22.5 MHz |
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CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK - 22.5 MHz |
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#elif defined(__IMXRT1052__) || defined(__IMXRT1062__) |
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#elif defined(__IMXRT1062__) |
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CCM_CCGR5 |= CCM_CCGR5_SAI1(CCM_CCGR_ON); |
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CCM_CCGR5 |= CCM_CCGR5_SAI1(CCM_CCGR_ON); |
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//PLL: |
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//PLL: |
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int fs = AUDIO_SAMPLE_RATE_EXACT; |
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int fs = AUDIO_SAMPLE_RATE_EXACT; |