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@@ -504,19 +504,14 @@ void AudioOutputI2Sslave::begin(void) |
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void AudioOutputI2Sslave::config_i2s(void) |
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{ |
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#if defined(KINETISK) |
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// if either transmitter or receiver is enabled, do nothing |
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if (I2S0_TCSR & I2S_TCSR_TE) return; |
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if (I2S0_RCSR & I2S_RCSR_RE) return; |
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SIM_SCGC6 |= SIM_SCGC6_I2S; |
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SIM_SCGC7 |= SIM_SCGC7_DMA; |
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX; |
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// configure pin mux for 3 clock signals |
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CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK) |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK |
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CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK |
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// if either transmitter or receiver is enabled, do nothing |
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if (I2S0_TCSR & I2S_TCSR_TE) return; |
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if (I2S0_RCSR & I2S_RCSR_RE) return; |
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// Select input clock 0 |
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// Configure to input the bit-clock from pin, bypasses the MCLK divider |
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I2S0_MCR = I2S_MCR_MICS(0); |
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@@ -544,6 +539,11 @@ void AudioOutputI2Sslave::config_i2s(void) |
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I2S0_RCR5 = I2S_RCR5_WNW(31) | I2S_RCR5_W0W(31) | I2S_RCR5_FBT(31); |
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// configure pin mux for 3 clock signals |
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CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK) |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK |
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CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK |
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#elif 0 && (defined(__IMXRT1052__) || defined(__IMXRT1062__) ) |
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#if defined(SAI1) |