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Merge pull request #170 from FrankBoesing/patch-(a-b)/c

faster int32_t substract_32_then_divide (mixed c + assembly)
dds
Paul Stoffregen 9 年前
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共有 2 个文件被更改,包括 13 次插入17 次删除
  1. +10
    -13
      synth_dc.h
  2. +3
    -4
      utility/dspinst.h

+ 10
- 13
synth_dc.h 查看文件

// compute (a - b) / c // compute (a - b) / c
// handling 32 bit interger overflow at every step // handling 32 bit interger overflow at every step
// without resorting to slow 64 bit math // without resorting to slow 64 bit math
#if 0
// TODO: write this in assembly....
static inline int32_t substract_32_then_divide(int32_t a, int32_t b, int32_t c) __attribute__((always_inline, unused));
static inline int32_t substract_32_then_divide(int32_t a, int32_t b, int32_t c)
#if defined(KINETISK)
static inline int32_t substract_int32_then_divide_int32(int32_t a, int32_t b, int32_t c) __attribute__((always_inline, unused));
static inline int32_t substract_int32_then_divide_int32(int32_t a, int32_t b, int32_t c)
{ {
int32_t diff = substract_32_saturate(a, b);
// if only C language provided a way to test Q status bit....
if (diff != 0x7FFFFFFF && diff != 0x80000000) {
return diff / c;
} else {
diff = substract_32_saturate(a/2, b/2);
if (c == 1 || c == -1) c *= 2; // <-- horrible, incorrect hack
return (diff / c) * 2;
}
int r;
r = substract_32_saturate(a,b);
if ( !get_q_psr() ) return (r/c);
clr_q_psr();
if ( c==0 ) r=0;
if (__builtin_abs(c)<=1) return r;
return (a/c)-(b/c);
} }
#else #else
// compute (a - b) / c ... handling 32 bit interger overflow without slow 64 bit math // compute (a - b) / c ... handling 32 bit interger overflow without slow 64 bit math

+ 3
- 4
utility/dspinst.h 查看文件

static inline uint32_t get_q_psr(void) static inline uint32_t get_q_psr(void)
{ {
uint32_t out; uint32_t out;
asm volatile("mrs %0, APSR" : "=r" (out));
asm ("mrs %0, APSR" : "=r" (out));
return (out & 0x8000000)>>27; return (out & 0x8000000)>>27;
} }


static inline void clr_q_psr(void) static inline void clr_q_psr(void)
{ {
uint32_t t; uint32_t t;
asm volatile("mrs %0,APSR " : "=r" (t));
asm volatile("bfc %0, #27, #1" : "=r" (t));
asm volatile("msr APSR_nzcvq,%0" : "=r" (t));
asm ("mov %[t],#0\n"
"msr APSR_nzcvq,%0\n" : [t] "=&r" (t)::"cc");
} }


#endif #endif

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