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audio_block_t * AudioInputAnalog::block_left = NULL; |
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audio_block_t * AudioInputAnalog::block_left = NULL; |
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uint16_t AudioInputAnalog::block_offset = 0; |
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uint16_t AudioInputAnalog::block_offset = 0; |
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bool AudioInputAnalog::update_responsibility = false; |
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bool AudioInputAnalog::update_responsibility = false; |
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DMAChannel AudioInputAnalog::dma; |
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// #define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_CONT) |
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// #define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_CONT) |
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// #define PDB_PERIOD 1087 // 48e6 / 44100 |
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// #define PDB_PERIOD 1087 // 48e6 / 44100 |
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// constants A10-A13 are actually 34 to 37 |
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// constants A10-A13 are actually 34 to 37 |
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if (pin > 23 && !(pin >= 34 && pin <= 37)) return; |
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if (pin > 23 && !(pin >= 34 && pin <= 37)) return; |
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dma.begin(true); // Allocate the DMA channel first |
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//pinMode(2, OUTPUT); |
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//pinMode(2, OUTPUT); |
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//pinMode(3, OUTPUT); |
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//pinMode(3, OUTPUT); |
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//digitalWriteFast(3, HIGH); |
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//digitalWriteFast(3, HIGH); |
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ADC0_SC2 |= ADC_SC2_ADTRG | ADC_SC2_DMAEN; |
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ADC0_SC2 |= ADC_SC2_ADTRG | ADC_SC2_DMAEN; |
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// set up a DMA channel to store the ADC data |
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// set up a DMA channel to store the ADC data |
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SIM_SCGC7 |= SIM_SCGC7_DMA; |
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX; |
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DMA_CR = 0; |
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DMA_TCD_SADDR(AUDIO_IN_ADC_DMA_CHANNEL) = &ADC0_RA; |
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DMA_TCD_SOFF(AUDIO_IN_ADC_DMA_CHANNEL) = 0; |
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DMA_TCD_ATTR(AUDIO_IN_ADC_DMA_CHANNEL) = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1); |
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DMA_TCD_NBYTES_MLNO(AUDIO_IN_ADC_DMA_CHANNEL) = 2; |
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DMA_TCD_SLAST(AUDIO_IN_ADC_DMA_CHANNEL) = 0; |
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DMA_TCD_DADDR(AUDIO_IN_ADC_DMA_CHANNEL) = analog_rx_buffer; |
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DMA_TCD_DOFF(AUDIO_IN_ADC_DMA_CHANNEL) = 2; |
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DMA_TCD_CITER_ELINKNO(AUDIO_IN_ADC_DMA_CHANNEL) = sizeof(analog_rx_buffer) / 2; |
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DMA_TCD_DLASTSGA(AUDIO_IN_ADC_DMA_CHANNEL) = -sizeof(analog_rx_buffer); |
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DMA_TCD_BITER_ELINKNO(AUDIO_IN_ADC_DMA_CHANNEL) = sizeof(analog_rx_buffer) / 2; |
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DMA_TCD_CSR(AUDIO_IN_ADC_DMA_CHANNEL) = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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DMAMUX0_CHCFG(AUDIO_IN_ADC_DMA_CHANNEL) = DMAMUX_DISABLE; |
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DMAMUX0_CHCFG(AUDIO_IN_ADC_DMA_CHANNEL) = DMAMUX_SOURCE_ADC0 | DMAMUX_ENABLE; |
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dma.TCD->SADDR = &ADC0_RA; |
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dma.TCD->SOFF = 0; |
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1); |
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dma.TCD->NBYTES_MLNO = 2; |
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dma.TCD->SLAST = 0; |
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dma.TCD->DADDR = analog_rx_buffer; |
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dma.TCD->DOFF = 2; |
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dma.TCD->CITER_ELINKNO = sizeof(analog_rx_buffer) / 2; |
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dma.TCD->DLASTSGA = -sizeof(analog_rx_buffer); |
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dma.TCD->BITER_ELINKNO = sizeof(analog_rx_buffer) / 2; |
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_ADC0); |
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update_responsibility = update_setup(); |
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update_responsibility = update_setup(); |
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DMA_SERQ = AUDIO_IN_ADC_DMA_CHANNEL; |
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NVIC_ENABLE_IRQ(IRQ_DMA_CH(AUDIO_IN_ADC_DMA_CHANNEL)); |
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dma.enable(); |
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dma.attachInterrupt(isr); |
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} |
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} |
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void DMA_ISR(AUDIO_IN_ADC_DMA_CHANNEL)(void) |
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void AudioInputAnalog::isr(void) |
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{ |
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{ |
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uint32_t daddr, offset; |
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uint32_t daddr, offset; |
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const uint16_t *src, *end; |
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const uint16_t *src, *end; |
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audio_block_t *left; |
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audio_block_t *left; |
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//digitalWriteFast(3, HIGH); |
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//digitalWriteFast(3, HIGH); |
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daddr = (uint32_t)(DMA_TCD_DADDR(AUDIO_IN_ADC_DMA_CHANNEL)); |
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DMA_CINT = AUDIO_IN_ADC_DMA_CHANNEL; |
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daddr = (uint32_t)(dma.TCD->DADDR); |
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dma.clearInterrupt(); |
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if (daddr < (uint32_t)analog_rx_buffer + sizeof(analog_rx_buffer) / 2) { |
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if (daddr < (uint32_t)analog_rx_buffer + sizeof(analog_rx_buffer) / 2) { |
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// DMA is receiving to the first half of the buffer |
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// DMA is receiving to the first half of the buffer |