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/* SPDIF for Teensy 3.X |
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* Copyright (c) 2015, Frank Bösing, f.boesing@gmx.de, |
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* Thanks to KPC & Paul Stoffregen! |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a copy |
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* of this software and associated documentation files (the "Software"), to deal |
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* in the Software without restriction, including without limitation the rights |
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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* copies of the Software, and to permit persons to whom the Software is |
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* furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice, development funding notice, and this permission |
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* notice shall be included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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* THE SOFTWARE. |
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*/ |
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#include "output_spdif.h" |
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audio_block_t * AudioOutputSPDIF::block_left_1st = NULL; |
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audio_block_t * AudioOutputSPDIF::block_right_1st = NULL; |
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audio_block_t * AudioOutputSPDIF::block_left_2nd = NULL; |
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audio_block_t * AudioOutputSPDIF::block_right_2nd = NULL; |
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uint16_t AudioOutputSPDIF::block_left_offset = 0; |
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uint16_t AudioOutputSPDIF::block_right_offset = 0; |
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bool AudioOutputSPDIF::update_responsibility = false; |
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DMAMEM static uint32_t SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4]; //2 KB |
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DMAChannel AudioOutputSPDIF::dma(false); |
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static const |
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uint16_t bmclookup[256] = { //biphase mark encoded values (least significant bit first) |
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0xcccc, 0x4ccc, 0x2ccc, 0xaccc, 0x34cc, 0xb4cc, 0xd4cc, 0x54cc, |
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0x32cc, 0xb2cc, 0xd2cc, 0x52cc, 0xcacc, 0x4acc, 0x2acc, 0xaacc, |
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0x334c, 0xb34c, 0xd34c, 0x534c, 0xcb4c, 0x4b4c, 0x2b4c, 0xab4c, |
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0xcd4c, 0x4d4c, 0x2d4c, 0xad4c, 0x354c, 0xb54c, 0xd54c, 0x554c, |
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0x332c, 0xb32c, 0xd32c, 0x532c, 0xcb2c, 0x4b2c, 0x2b2c, 0xab2c, |
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0xcd2c, 0x4d2c, 0x2d2c, 0xad2c, 0x352c, 0xb52c, 0xd52c, 0x552c, |
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0xccac, 0x4cac, 0x2cac, 0xacac, 0x34ac, 0xb4ac, 0xd4ac, 0x54ac, |
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0x32ac, 0xb2ac, 0xd2ac, 0x52ac, 0xcaac, 0x4aac, 0x2aac, 0xaaac, |
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0x3334, 0xb334, 0xd334, 0x5334, 0xcb34, 0x4b34, 0x2b34, 0xab34, |
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0xcd34, 0x4d34, 0x2d34, 0xad34, 0x3534, 0xb534, 0xd534, 0x5534, |
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0xccb4, 0x4cb4, 0x2cb4, 0xacb4, 0x34b4, 0xb4b4, 0xd4b4, 0x54b4, |
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0x32b4, 0xb2b4, 0xd2b4, 0x52b4, 0xcab4, 0x4ab4, 0x2ab4, 0xaab4, |
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0xccd4, 0x4cd4, 0x2cd4, 0xacd4, 0x34d4, 0xb4d4, 0xd4d4, 0x54d4, |
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0x32d4, 0xb2d4, 0xd2d4, 0x52d4, 0xcad4, 0x4ad4, 0x2ad4, 0xaad4, |
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0x3354, 0xb354, 0xd354, 0x5354, 0xcb54, 0x4b54, 0x2b54, 0xab54, |
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0xcd54, 0x4d54, 0x2d54, 0xad54, 0x3554, 0xb554, 0xd554, 0x5554, |
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0x3332, 0xb332, 0xd332, 0x5332, 0xcb32, 0x4b32, 0x2b32, 0xab32, |
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0xcd32, 0x4d32, 0x2d32, 0xad32, 0x3532, 0xb532, 0xd532, 0x5532, |
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0xccb2, 0x4cb2, 0x2cb2, 0xacb2, 0x34b2, 0xb4b2, 0xd4b2, 0x54b2, |
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0x32b2, 0xb2b2, 0xd2b2, 0x52b2, 0xcab2, 0x4ab2, 0x2ab2, 0xaab2, |
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0xccd2, 0x4cd2, 0x2cd2, 0xacd2, 0x34d2, 0xb4d2, 0xd4d2, 0x54d2, |
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0x32d2, 0xb2d2, 0xd2d2, 0x52d2, 0xcad2, 0x4ad2, 0x2ad2, 0xaad2, |
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0x3352, 0xb352, 0xd352, 0x5352, 0xcb52, 0x4b52, 0x2b52, 0xab52, |
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0xcd52, 0x4d52, 0x2d52, 0xad52, 0x3552, 0xb552, 0xd552, 0x5552, |
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0xccca, 0x4cca, 0x2cca, 0xacca, 0x34ca, 0xb4ca, 0xd4ca, 0x54ca, |
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0x32ca, 0xb2ca, 0xd2ca, 0x52ca, 0xcaca, 0x4aca, 0x2aca, 0xaaca, |
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0x334a, 0xb34a, 0xd34a, 0x534a, 0xcb4a, 0x4b4a, 0x2b4a, 0xab4a, |
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0xcd4a, 0x4d4a, 0x2d4a, 0xad4a, 0x354a, 0xb54a, 0xd54a, 0x554a, |
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0x332a, 0xb32a, 0xd32a, 0x532a, 0xcb2a, 0x4b2a, 0x2b2a, 0xab2a, |
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0xcd2a, 0x4d2a, 0x2d2a, 0xad2a, 0x352a, 0xb52a, 0xd52a, 0x552a, |
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0xccaa, 0x4caa, 0x2caa, 0xacaa, 0x34aa, 0xb4aa, 0xd4aa, 0x54aa, |
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0x32aa, 0xb2aa, 0xd2aa, 0x52aa, 0xcaaa, 0x4aaa, 0x2aaa, 0xaaaa |
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}; |
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#define PREAMBLE_B (0xE8) //11101000 |
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#define PREAMBLE_M (0xE2) //11100010 |
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#define PREAMBLE_W (0xE4) //11100100 |
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void AudioOutputSPDIF::begin(void) |
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{ |
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dma.begin(true); // Allocate the DMA channel first |
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block_left_1st = NULL; |
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block_right_1st = NULL; |
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// TODO: should we set & clear the I2S_TCSR_SR bit here? |
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config_SPDIF(); |
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CORE_PIN22_CONFIG = PORT_PCR_MUX(6); // pin 22, PTC1, I2S0_TXD0 |
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const int nbytes_mlno = 2 * 4; // 8 Bytes per minor loop |
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dma.TCD->SADDR = SPDIF_tx_buffer; |
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dma.TCD->SOFF = 4; |
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2); |
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dma.TCD->NBYTES_MLNO = nbytes_mlno; |
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dma.TCD->SLAST = -sizeof(SPDIF_tx_buffer); |
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dma.TCD->DADDR = &I2S0_TDR0; |
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dma.TCD->DOFF = 0; |
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dma.TCD->CITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno; |
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dma.TCD->DLASTSGA = 0; |
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dma.TCD->BITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno; |
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX); |
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update_responsibility = update_setup(); |
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dma.enable(); |
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I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; |
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dma.attachInterrupt(isr); |
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} |
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/* |
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http://www.hardwarebook.info/S/PDIF |
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1. To make it easier and a bit faster, the parity-bit is always the same. |
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- With a alternating parity we had to adjust the next subframe. Instead, use a bit from the aux-info as parity. |
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2. The buffer is filled with an offset of 1 byte, so the last parity (which is always 0 now (see 1.) ) is written as first byte. |
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-> A bit easier and faster to construct both subframes. |
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*/ |
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void AudioOutputSPDIF::isr(void) |
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{ |
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static uint16_t frame = 0; |
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const int16_t *src; |
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int32_t *end, *dest; |
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audio_block_t *block; |
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uint32_t saddr, offset; |
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uint16_t sample, lo, hi, aux; |
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saddr = (uint32_t)(dma.TCD->SADDR); |
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dma.clearInterrupt(); |
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if (saddr < (uint32_t)SPDIF_tx_buffer + sizeof(SPDIF_tx_buffer) / 2) { |
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// DMA is transmitting the first half of the buffer |
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// so we must fill the second half |
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dest = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4/2]; |
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end = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4]; |
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if (AudioOutputSPDIF::update_responsibility) AudioStream::update_all(); |
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} else { |
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// DMA is transmitting the second half of the buffer |
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// so we must fill the first half |
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dest = (int32_t *)SPDIF_tx_buffer; |
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end = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4/2]; |
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} |
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block = AudioOutputSPDIF::block_left_1st; |
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if (block) { |
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offset = AudioOutputSPDIF::block_left_offset; |
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src = &block->data[offset]; |
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do { |
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sample = *src++; |
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//Subframe Channel 1 |
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hi = bmclookup[(uint8_t)(sample >> 8)]; |
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lo = bmclookup[(uint8_t) sample]; |
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lo ^= (~((int16_t)hi) >> 16); |
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// 16 Bit sample: |
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*(dest+1) = ((uint32_t)lo << 16) | hi; |
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// 4 Bit Auxillary-audio-databits, the first used as parity |
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aux = (0xB333 ^ (((uint32_t)((int16_t)lo)) >> 17)); |
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if (++frame > 191) { |
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// VUCP-Bits ("Valid, Subcode, Channelstatus, Parity) = 0 (0xcc) | Preamble (depends on Framno.) | Auxillary |
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*(dest+0) = 0xcc000000 | (PREAMBLE_B << 16 ) | aux; //special preamble for one of 192 frames |
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frame = 0; |
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} else { |
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*(dest+0) = 0xcc000000 | (PREAMBLE_M << 16 ) | aux; |
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} |
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dest += 4; |
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} while (dest < end); |
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offset += AUDIO_BLOCK_SAMPLES/2; |
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if (offset < AUDIO_BLOCK_SAMPLES) { |
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AudioOutputSPDIF::block_left_offset = offset; |
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} else { |
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AudioOutputSPDIF::block_left_offset = 0; |
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AudioStream::release(block); |
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AudioOutputSPDIF::block_left_1st = AudioOutputSPDIF::block_left_2nd; |
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AudioOutputSPDIF::block_left_2nd = NULL; |
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} |
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} else { |
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do { |
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if ( ++frame > 191 ) { |
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*(dest+0) = 0xcce8cccc; |
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frame = 0; |
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} else { |
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*(dest+0) = 0xcce2cccc; |
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} |
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*(dest+1) = 0xccccccccUL; |
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dest +=4; |
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} while (dest < end); |
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} |
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dest -= AUDIO_BLOCK_SAMPLES * 4/2 - 4/2; |
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block = AudioOutputSPDIF::block_right_1st; |
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if (block) { |
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offset = AudioOutputSPDIF::block_right_offset; |
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src = &block->data[offset]; |
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do { |
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sample = *src++; |
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//Subframe Channel 2 |
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hi = bmclookup[(uint8_t)(sample >> 8)]; |
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lo = bmclookup[(uint8_t)sample]; |
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lo ^= (~((int16_t)hi) >> 16); |
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*(dest+1) = ( ((uint32_t)lo << 16) | hi ); |
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aux = (0xB333 ^ (((uint32_t)((int16_t)lo)) >> 17)); |
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*(dest+0) = 0xcc000000 | (PREAMBLE_W << 16 ) | aux; |
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dest += 4; |
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} while (dest < end); |
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offset += AUDIO_BLOCK_SAMPLES/2; |
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if (offset < AUDIO_BLOCK_SAMPLES) { |
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AudioOutputSPDIF::block_right_offset = offset; |
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} else { |
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AudioOutputSPDIF::block_right_offset = 0; |
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AudioStream::release(block); |
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AudioOutputSPDIF::block_right_1st = AudioOutputSPDIF::block_right_2nd; |
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AudioOutputSPDIF::block_right_2nd = NULL; |
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} |
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} else { |
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do { |
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*dest = 0xcce4ccccUL; |
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*(dest+1) = 0xccccccccUL; |
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dest += 4 ; |
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} while (dest < end); |
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} |
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} |
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void AudioOutputSPDIF::update(void) |
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{ |
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audio_block_t *block; |
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block = receiveReadOnly(0); // input 0 = left channel |
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if (block) { |
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__disable_irq(); |
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if (block_left_1st == NULL) { |
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block_left_1st = block; |
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block_left_offset = 0; |
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__enable_irq(); |
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} else if (block_left_2nd == NULL) { |
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block_left_2nd = block; |
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__enable_irq(); |
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} else { |
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audio_block_t *tmp = block_left_1st; |
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block_left_1st = block_left_2nd; |
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block_left_2nd = block; |
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block_left_offset = 0; |
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__enable_irq(); |
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release(tmp); |
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} |
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} |
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block = receiveReadOnly(1); // input 1 = right channel |
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if (block) { |
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__disable_irq(); |
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if (block_right_1st == NULL) { |
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block_right_1st = block; |
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block_right_offset = 0; |
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__enable_irq(); |
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} else if (block_right_2nd == NULL) { |
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block_right_2nd = block; |
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__enable_irq(); |
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} else { |
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audio_block_t *tmp = block_right_1st; |
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block_right_1st = block_right_2nd; |
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block_right_2nd = block; |
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block_right_offset = 0; |
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__enable_irq(); |
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release(tmp); |
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} |
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} |
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} |
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#if F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000 |
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// PLL is at 96 MHz in these modes |
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#define MCLK_MULT 2 |
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#define MCLK_DIV 17 |
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#elif F_CPU == 72000000 |
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#define MCLK_MULT 8 |
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#define MCLK_DIV 51 |
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#elif F_CPU == 120000000 |
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#define MCLK_MULT 8 |
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#define MCLK_DIV 85 |
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#elif F_CPU == 144000000 |
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#define MCLK_MULT 4 |
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#define MCLK_DIV 51 |
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#elif F_CPU == 168000000 |
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#define MCLK_MULT 8 |
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#define MCLK_DIV 119 |
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#elif F_CPU == 16000000 |
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#define MCLK_MULT 12 |
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#define MCLK_DIV 17 |
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#else |
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#error "This CPU Clock Speed is not supported by the Audio library"; |
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#endif |
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#if F_CPU >= 20000000 |
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#define MCLK_SRC 3 // the PLL |
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#else |
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#define MCLK_SRC 0 // system clock |
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#endif |
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void AudioOutputSPDIF::config_SPDIF(void) |
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{ |
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SIM_SCGC6 |= SIM_SCGC6_I2S; |
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SIM_SCGC7 |= SIM_SCGC7_DMA; |
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX; |
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// enable MCLK output |
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I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE; |
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I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1)); |
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// configure transmitter |
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I2S0_TMR = 0; |
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I2S0_TCR1 = I2S_TCR1_TFW(1); // watermark |
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I2S0_TCR2 = I2S_TCR2_SYNC(0) | I2S_TCR2_MSEL(1) | I2S_TCR2_BCD | I2S_TCR2_DIV(0); |
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I2S0_TCR3 = I2S_TCR3_TCE; |
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//4 Words per Frame 32 Bit Word-Length -> 128 Bit Frame-Length, MSB First: |
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I2S0_TCR4 = I2S_TCR4_FRSZ(3) | I2S_TCR4_SYWD(0) | I2S_TCR4_MF | I2S_TCR4_FSP | I2S_TCR4_FSD; |
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I2S0_TCR5 = I2S_TCR5_WNW(31) | I2S_TCR5_W0W(31) | I2S_TCR5_FBT(31); |
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I2S0_RCSR = 0; |
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#if 0 |
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// configure pin mux for 3 clock signals (debug only) |
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CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK) |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK |
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// CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK |
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#endif |
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} |
Frank Bösing
пре 9 година