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  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "input_adc.h"
  27. #include "utility/pdb.h"
  28. DMAMEM static uint16_t analog_rx_buffer[AUDIO_BLOCK_SAMPLES];
  29. audio_block_t * AudioInputAnalog::block_left = NULL;
  30. uint16_t AudioInputAnalog::block_offset = 0;
  31. bool AudioInputAnalog::update_responsibility = false;
  32. // #define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_CONT)
  33. // #define PDB_PERIOD 1087 // 48e6 / 44100
  34. void AudioInputAnalog::begin(unsigned int pin)
  35. {
  36. uint32_t i, sum=0;
  37. // pin specified in user sketches should be A0 to A13
  38. // numbers can be used, but the recommended usage is
  39. // with the named constants A0 to A13
  40. // constants A0-A9 are actually 14 to 23
  41. // constants A10-A13 are actually 34 to 37
  42. if (pin > 23 && !(pin >= 34 && pin <= 37)) return;
  43. //pinMode(2, OUTPUT);
  44. //pinMode(3, OUTPUT);
  45. //digitalWriteFast(3, HIGH);
  46. //delayMicroseconds(500);
  47. //digitalWriteFast(3, LOW);
  48. // Configure the ADC and run at least one software-triggered
  49. // conversion. This completes the self calibration stuff and
  50. // leaves the ADC in a state that's mostly ready to use
  51. analogReadRes(16);
  52. analogReference(INTERNAL); // range 0 to 1.2 volts
  53. //analogReference(DEFAULT); // range 0 to 3.3 volts
  54. analogReadAveraging(8);
  55. // Actually, do many normal reads, to start with a nice DC level
  56. for (i=0; i < 1024; i++) {
  57. sum += analogRead(pin);
  58. }
  59. dc_average = sum >> 10;
  60. // testing only, enable adc interrupt
  61. //ADC0_SC1A |= ADC_SC1_AIEN;
  62. //while ((ADC0_SC1A & ADC_SC1_COCO) == 0) ; // wait
  63. //NVIC_ENABLE_IRQ(IRQ_ADC0);
  64. // set the programmable delay block to trigger the ADC at 44.1 kHz
  65. SIM_SCGC6 |= SIM_SCGC6_PDB;
  66. PDB0_MOD = PDB_PERIOD;
  67. PDB0_SC = PDB_CONFIG | PDB_SC_LDOK;
  68. PDB0_SC = PDB_CONFIG | PDB_SC_SWTRIG;
  69. PDB0_CH0C1 = 0x0101;
  70. // enable the ADC for hardware trigger and DMA
  71. ADC0_SC2 |= ADC_SC2_ADTRG | ADC_SC2_DMAEN;
  72. // set up a DMA channel to store the ADC data
  73. SIM_SCGC7 |= SIM_SCGC7_DMA;
  74. SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
  75. DMA_CR = 0;
  76. DMA_TCD2_SADDR = &ADC0_RA;
  77. DMA_TCD2_SOFF = 0;
  78. DMA_TCD2_ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  79. DMA_TCD2_NBYTES_MLNO = 2;
  80. DMA_TCD2_SLAST = 0;
  81. DMA_TCD2_DADDR = analog_rx_buffer;
  82. DMA_TCD2_DOFF = 2;
  83. DMA_TCD2_CITER_ELINKNO = sizeof(analog_rx_buffer) / 2;
  84. DMA_TCD2_DLASTSGA = -sizeof(analog_rx_buffer);
  85. DMA_TCD2_BITER_ELINKNO = sizeof(analog_rx_buffer) / 2;
  86. DMA_TCD2_CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  87. DMAMUX0_CHCFG2 = DMAMUX_DISABLE;
  88. DMAMUX0_CHCFG2 = DMAMUX_SOURCE_ADC0 | DMAMUX_ENABLE;
  89. update_responsibility = update_setup();
  90. DMA_SERQ = 2;
  91. NVIC_ENABLE_IRQ(IRQ_DMA_CH2);
  92. }
  93. void dma_ch2_isr(void)
  94. {
  95. uint32_t daddr, offset;
  96. const uint16_t *src, *end;
  97. uint16_t *dest_left;
  98. audio_block_t *left;
  99. //digitalWriteFast(3, HIGH);
  100. daddr = (uint32_t)DMA_TCD2_DADDR;
  101. DMA_CINT = 2;
  102. if (daddr < (uint32_t)analog_rx_buffer + sizeof(analog_rx_buffer) / 2) {
  103. // DMA is receiving to the first half of the buffer
  104. // need to remove data from the second half
  105. src = (uint16_t *)&analog_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  106. end = (uint16_t *)&analog_rx_buffer[AUDIO_BLOCK_SAMPLES];
  107. if (AudioInputAnalog::update_responsibility) AudioStream::update_all();
  108. } else {
  109. // DMA is receiving to the second half of the buffer
  110. // need to remove data from the first half
  111. src = (uint16_t *)&analog_rx_buffer[0];
  112. end = (uint16_t *)&analog_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  113. }
  114. left = AudioInputAnalog::block_left;
  115. if (left != NULL) {
  116. offset = AudioInputAnalog::block_offset;
  117. if (offset > AUDIO_BLOCK_SAMPLES/2) offset = AUDIO_BLOCK_SAMPLES/2;
  118. //if (offset <= AUDIO_BLOCK_SAMPLES/2) {
  119. dest_left = (uint16_t *)&(left->data[offset]);
  120. AudioInputAnalog::block_offset = offset + AUDIO_BLOCK_SAMPLES/2;
  121. do {
  122. *dest_left++ = *src++;
  123. } while (src < end);
  124. //}
  125. }
  126. //digitalWriteFast(3, LOW);
  127. }
  128. #if 0
  129. void adc0_isr(void)
  130. {
  131. uint32_t tmp = ADC0_RA; // read ADC result to clear interrupt
  132. digitalWriteFast(3, HIGH);
  133. delayMicroseconds(1);
  134. digitalWriteFast(3, LOW);
  135. }
  136. #endif
  137. void AudioInputAnalog::update(void)
  138. {
  139. audio_block_t *new_left=NULL, *out_left=NULL;
  140. unsigned int dc, offset;
  141. int16_t s, *p, *end;
  142. // allocate new block (ok if NULL)
  143. new_left = allocate();
  144. __disable_irq();
  145. offset = block_offset;
  146. if (offset < AUDIO_BLOCK_SAMPLES) {
  147. // the DMA didn't fill a block
  148. if (new_left != NULL) {
  149. // but we allocated a block
  150. if (block_left == NULL) {
  151. // the DMA doesn't have any blocks to fill, so
  152. // give it the one we just allocated
  153. block_left = new_left;
  154. block_offset = 0;
  155. __enable_irq();
  156. //Serial.println("fail1");
  157. } else {
  158. // the DMA already has blocks, doesn't need this
  159. __enable_irq();
  160. release(new_left);
  161. //Serial.print("fail2, offset=");
  162. //Serial.println(offset);
  163. }
  164. } else {
  165. // The DMA didn't fill a block, and we could not allocate
  166. // memory... the system is likely starving for memory!
  167. // Sadly, there's nothing we can do.
  168. __enable_irq();
  169. //Serial.println("fail3");
  170. }
  171. return;
  172. }
  173. // the DMA filled a block, so grab it and get the
  174. // new block to the DMA, as quickly as possible
  175. out_left = block_left;
  176. block_left = new_left;
  177. block_offset = 0;
  178. __enable_irq();
  179. // find and subtract DC offset....
  180. // TODO: this may not be correct, needs testing with more types of signals
  181. dc = dc_average;
  182. p = out_left->data;
  183. end = p + AUDIO_BLOCK_SAMPLES;
  184. do {
  185. s = (uint16_t)(*p) - dc; // TODO: should be saturating subtract
  186. *p++ = s;
  187. dc += s >> 13; // approx 5.38 Hz high pass filter
  188. } while (p < end);
  189. dc_average = dc;
  190. // then transmit the AC data
  191. transmit(out_left);
  192. release(out_left);
  193. }