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  1. /* SPDIF for Teensy 3.X
  2. * Copyright (c) 2015, Frank Bösing, f.boesing@gmx.de,
  3. * Thanks to KPC & Paul Stoffregen!
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice, development funding notice, and this permission
  13. * notice shall be included in all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. // 2015/08/23: (FB) added mute_PCM() - sets or unsets VALID in VUCP (and adjusts PARITY)
  24. #include <Arduino.h>
  25. #include "output_spdif.h"
  26. #if defined(KINETISK)
  27. #define PREAMBLE_B (0xE8) //11101000
  28. #define PREAMBLE_M (0xE2) //11100010
  29. #define PREAMBLE_W (0xE4) //11100100
  30. #define VUCP_VALID ((0xCC) << 24)
  31. #define VUCP_INVALID ((0xD4) << 24)// To mute PCM, set VUCP = invalid.
  32. audio_block_t * AudioOutputSPDIF::block_left_1st = NULL;
  33. audio_block_t * AudioOutputSPDIF::block_right_1st = NULL;
  34. audio_block_t * AudioOutputSPDIF::block_left_2nd = NULL;
  35. audio_block_t * AudioOutputSPDIF::block_right_2nd = NULL;
  36. uint16_t AudioOutputSPDIF::block_left_offset = 0;
  37. uint16_t AudioOutputSPDIF::block_right_offset = 0;
  38. bool AudioOutputSPDIF::update_responsibility = false;
  39. uint32_t AudioOutputSPDIF::vucp = VUCP_VALID;
  40. DMAMEM static uint32_t SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4]; //2 KB
  41. DMAChannel AudioOutputSPDIF::dma(false);
  42. static const
  43. uint16_t bmclookup[256] = { //biphase mark encoded values (least significant bit first)
  44. 0xcccc, 0x4ccc, 0x2ccc, 0xaccc, 0x34cc, 0xb4cc, 0xd4cc, 0x54cc,
  45. 0x32cc, 0xb2cc, 0xd2cc, 0x52cc, 0xcacc, 0x4acc, 0x2acc, 0xaacc,
  46. 0x334c, 0xb34c, 0xd34c, 0x534c, 0xcb4c, 0x4b4c, 0x2b4c, 0xab4c,
  47. 0xcd4c, 0x4d4c, 0x2d4c, 0xad4c, 0x354c, 0xb54c, 0xd54c, 0x554c,
  48. 0x332c, 0xb32c, 0xd32c, 0x532c, 0xcb2c, 0x4b2c, 0x2b2c, 0xab2c,
  49. 0xcd2c, 0x4d2c, 0x2d2c, 0xad2c, 0x352c, 0xb52c, 0xd52c, 0x552c,
  50. 0xccac, 0x4cac, 0x2cac, 0xacac, 0x34ac, 0xb4ac, 0xd4ac, 0x54ac,
  51. 0x32ac, 0xb2ac, 0xd2ac, 0x52ac, 0xcaac, 0x4aac, 0x2aac, 0xaaac,
  52. 0x3334, 0xb334, 0xd334, 0x5334, 0xcb34, 0x4b34, 0x2b34, 0xab34,
  53. 0xcd34, 0x4d34, 0x2d34, 0xad34, 0x3534, 0xb534, 0xd534, 0x5534,
  54. 0xccb4, 0x4cb4, 0x2cb4, 0xacb4, 0x34b4, 0xb4b4, 0xd4b4, 0x54b4,
  55. 0x32b4, 0xb2b4, 0xd2b4, 0x52b4, 0xcab4, 0x4ab4, 0x2ab4, 0xaab4,
  56. 0xccd4, 0x4cd4, 0x2cd4, 0xacd4, 0x34d4, 0xb4d4, 0xd4d4, 0x54d4,
  57. 0x32d4, 0xb2d4, 0xd2d4, 0x52d4, 0xcad4, 0x4ad4, 0x2ad4, 0xaad4,
  58. 0x3354, 0xb354, 0xd354, 0x5354, 0xcb54, 0x4b54, 0x2b54, 0xab54,
  59. 0xcd54, 0x4d54, 0x2d54, 0xad54, 0x3554, 0xb554, 0xd554, 0x5554,
  60. 0x3332, 0xb332, 0xd332, 0x5332, 0xcb32, 0x4b32, 0x2b32, 0xab32,
  61. 0xcd32, 0x4d32, 0x2d32, 0xad32, 0x3532, 0xb532, 0xd532, 0x5532,
  62. 0xccb2, 0x4cb2, 0x2cb2, 0xacb2, 0x34b2, 0xb4b2, 0xd4b2, 0x54b2,
  63. 0x32b2, 0xb2b2, 0xd2b2, 0x52b2, 0xcab2, 0x4ab2, 0x2ab2, 0xaab2,
  64. 0xccd2, 0x4cd2, 0x2cd2, 0xacd2, 0x34d2, 0xb4d2, 0xd4d2, 0x54d2,
  65. 0x32d2, 0xb2d2, 0xd2d2, 0x52d2, 0xcad2, 0x4ad2, 0x2ad2, 0xaad2,
  66. 0x3352, 0xb352, 0xd352, 0x5352, 0xcb52, 0x4b52, 0x2b52, 0xab52,
  67. 0xcd52, 0x4d52, 0x2d52, 0xad52, 0x3552, 0xb552, 0xd552, 0x5552,
  68. 0xccca, 0x4cca, 0x2cca, 0xacca, 0x34ca, 0xb4ca, 0xd4ca, 0x54ca,
  69. 0x32ca, 0xb2ca, 0xd2ca, 0x52ca, 0xcaca, 0x4aca, 0x2aca, 0xaaca,
  70. 0x334a, 0xb34a, 0xd34a, 0x534a, 0xcb4a, 0x4b4a, 0x2b4a, 0xab4a,
  71. 0xcd4a, 0x4d4a, 0x2d4a, 0xad4a, 0x354a, 0xb54a, 0xd54a, 0x554a,
  72. 0x332a, 0xb32a, 0xd32a, 0x532a, 0xcb2a, 0x4b2a, 0x2b2a, 0xab2a,
  73. 0xcd2a, 0x4d2a, 0x2d2a, 0xad2a, 0x352a, 0xb52a, 0xd52a, 0x552a,
  74. 0xccaa, 0x4caa, 0x2caa, 0xacaa, 0x34aa, 0xb4aa, 0xd4aa, 0x54aa,
  75. 0x32aa, 0xb2aa, 0xd2aa, 0x52aa, 0xcaaa, 0x4aaa, 0x2aaa, 0xaaaa
  76. };
  77. void AudioOutputSPDIF::begin(void)
  78. {
  79. dma.begin(true); // Allocate the DMA channel first
  80. block_left_1st = NULL;
  81. block_right_1st = NULL;
  82. // TODO: should we set & clear the I2S_TCSR_SR bit here?
  83. config_SPDIF();
  84. CORE_PIN22_CONFIG = PORT_PCR_MUX(6); // pin 22, PTC1, I2S0_TXD0
  85. const int nbytes_mlno = 2 * 4; // 8 Bytes per minor loop
  86. dma.TCD->SADDR = SPDIF_tx_buffer;
  87. dma.TCD->SOFF = 4;
  88. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2);
  89. dma.TCD->NBYTES_MLNO = nbytes_mlno;
  90. dma.TCD->SLAST = -sizeof(SPDIF_tx_buffer);
  91. dma.TCD->DADDR = &I2S0_TDR0;
  92. dma.TCD->DOFF = 0;
  93. dma.TCD->CITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno;
  94. dma.TCD->DLASTSGA = 0;
  95. dma.TCD->BITER_ELINKNO = sizeof(SPDIF_tx_buffer) / nbytes_mlno;
  96. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  97. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX);
  98. update_responsibility = update_setup();
  99. dma.enable();
  100. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR;
  101. dma.attachInterrupt(isr);
  102. }
  103. /*
  104. http://www.hardwarebook.info/S/PDIF
  105. 1. To make it easier and a bit faster, the parity-bit is always the same.
  106. - With a alternating parity we had to adjust the next subframe. Instead, use a bit from the aux-info as parity.
  107. 2. The buffer is filled with an offset of 1 byte, so the last parity (which is always 0 now (see 1.) ) is written as first byte.
  108. -> A bit easier and faster to construct both subframes.
  109. */
  110. void AudioOutputSPDIF::isr(void)
  111. {
  112. static uint16_t frame = 0;
  113. const int16_t *src;
  114. int32_t *end, *dest;
  115. audio_block_t *block;
  116. uint32_t saddr, offset;
  117. uint16_t sample, lo, hi, aux;
  118. saddr = (uint32_t)(dma.TCD->SADDR);
  119. dma.clearInterrupt();
  120. if (saddr < (uint32_t)SPDIF_tx_buffer + sizeof(SPDIF_tx_buffer) / 2) {
  121. // DMA is transmitting the first half of the buffer
  122. // so we must fill the second half
  123. dest = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4/2];
  124. end = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4];
  125. if (AudioOutputSPDIF::update_responsibility) AudioStream::update_all();
  126. } else {
  127. // DMA is transmitting the second half of the buffer
  128. // so we must fill the first half
  129. dest = (int32_t *)SPDIF_tx_buffer;
  130. end = (int32_t *)&SPDIF_tx_buffer[AUDIO_BLOCK_SAMPLES * 4/2];
  131. }
  132. block = AudioOutputSPDIF::block_left_1st;
  133. if (block) {
  134. offset = AudioOutputSPDIF::block_left_offset;
  135. src = &block->data[offset];
  136. do {
  137. sample = *src++;
  138. //Subframe Channel 1
  139. hi = bmclookup[(uint8_t)(sample >> 8)];
  140. lo = bmclookup[(uint8_t) sample];
  141. lo ^= (~((int16_t)hi) >> 16);
  142. // 16 Bit sample:
  143. *(dest+1) = ((uint32_t)lo << 16) | hi;
  144. // 4 Bit Auxillary-audio-databits, the first used as parity
  145. aux = (0xB333 ^ (((uint32_t)((int16_t)lo)) >> 17));
  146. if (++frame > 191) {
  147. // VUCP-Bits ("Valid, Subcode, Channelstatus, Parity) = 0 (0xcc) | Preamble (depends on Framno.) | Auxillary
  148. *(dest+0) = vucp | (PREAMBLE_B << 16 ) | aux; //special preamble for one of 192 frames
  149. frame = 0;
  150. } else {
  151. *(dest+0) = vucp | (PREAMBLE_M << 16 ) | aux;
  152. }
  153. dest += 4;
  154. } while (dest < end);
  155. offset += AUDIO_BLOCK_SAMPLES/2;
  156. if (offset < AUDIO_BLOCK_SAMPLES) {
  157. AudioOutputSPDIF::block_left_offset = offset;
  158. } else {
  159. AudioOutputSPDIF::block_left_offset = 0;
  160. AudioStream::release(block);
  161. AudioOutputSPDIF::block_left_1st = AudioOutputSPDIF::block_left_2nd;
  162. AudioOutputSPDIF::block_left_2nd = NULL;
  163. }
  164. } else {
  165. do {
  166. if ( ++frame > 191 ) {
  167. *(dest+0) = vucp | 0x00e8cccc;
  168. frame = 0;
  169. } else {
  170. *(dest+0) = vucp | 0x00e2cccc;
  171. }
  172. *(dest+1) = 0xccccccccUL;
  173. dest +=4;
  174. } while (dest < end);
  175. }
  176. dest -= AUDIO_BLOCK_SAMPLES * 4/2 - 4/2;
  177. block = AudioOutputSPDIF::block_right_1st;
  178. if (block) {
  179. offset = AudioOutputSPDIF::block_right_offset;
  180. src = &block->data[offset];
  181. do {
  182. sample = *src++;
  183. //Subframe Channel 2
  184. hi = bmclookup[(uint8_t)(sample >> 8)];
  185. lo = bmclookup[(uint8_t)sample];
  186. lo ^= (~((int16_t)hi) >> 16);
  187. *(dest+1) = ( ((uint32_t)lo << 16) | hi );
  188. aux = (0xB333 ^ (((uint32_t)((int16_t)lo)) >> 17));
  189. *(dest+0) = vucp | (PREAMBLE_W << 16 ) | aux;
  190. dest += 4;
  191. } while (dest < end);
  192. offset += AUDIO_BLOCK_SAMPLES/2;
  193. if (offset < AUDIO_BLOCK_SAMPLES) {
  194. AudioOutputSPDIF::block_right_offset = offset;
  195. } else {
  196. AudioOutputSPDIF::block_right_offset = 0;
  197. AudioStream::release(block);
  198. AudioOutputSPDIF::block_right_1st = AudioOutputSPDIF::block_right_2nd;
  199. AudioOutputSPDIF::block_right_2nd = NULL;
  200. }
  201. } else {
  202. do {
  203. *dest = vucp | 0x00e4ccccUL;
  204. *(dest+1) = 0xccccccccUL;
  205. dest += 4 ;
  206. } while (dest < end);
  207. }
  208. }
  209. void AudioOutputSPDIF::mute_PCM(const bool mute)
  210. {
  211. vucp = mute?VUCP_INVALID:VUCP_VALID;
  212. }
  213. void AudioOutputSPDIF::update(void)
  214. {
  215. audio_block_t *block;
  216. block = receiveReadOnly(0); // input 0 = left channel
  217. if (block) {
  218. __disable_irq();
  219. if (block_left_1st == NULL) {
  220. block_left_1st = block;
  221. block_left_offset = 0;
  222. __enable_irq();
  223. } else if (block_left_2nd == NULL) {
  224. block_left_2nd = block;
  225. __enable_irq();
  226. } else {
  227. audio_block_t *tmp = block_left_1st;
  228. block_left_1st = block_left_2nd;
  229. block_left_2nd = block;
  230. block_left_offset = 0;
  231. __enable_irq();
  232. release(tmp);
  233. }
  234. }
  235. block = receiveReadOnly(1); // input 1 = right channel
  236. if (block) {
  237. __disable_irq();
  238. if (block_right_1st == NULL) {
  239. block_right_1st = block;
  240. block_right_offset = 0;
  241. __enable_irq();
  242. } else if (block_right_2nd == NULL) {
  243. block_right_2nd = block;
  244. __enable_irq();
  245. } else {
  246. audio_block_t *tmp = block_right_1st;
  247. block_right_1st = block_right_2nd;
  248. block_right_2nd = block;
  249. block_right_offset = 0;
  250. __enable_irq();
  251. release(tmp);
  252. }
  253. }
  254. }
  255. #if F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000
  256. // PLL is at 96 MHz in these modes
  257. #define MCLK_MULT 2
  258. #define MCLK_DIV 17
  259. #elif F_CPU == 72000000
  260. #define MCLK_MULT 8
  261. #define MCLK_DIV 51
  262. #elif F_CPU == 120000000
  263. #define MCLK_MULT 8
  264. #define MCLK_DIV 85
  265. #elif F_CPU == 144000000
  266. #define MCLK_MULT 4
  267. #define MCLK_DIV 51
  268. #elif F_CPU == 168000000
  269. #define MCLK_MULT 8
  270. #define MCLK_DIV 119
  271. #elif F_CPU == 180000000
  272. #define MCLK_MULT 16
  273. #define MCLK_DIV 255
  274. #define MCLK_SRC 0
  275. #elif F_CPU == 192000000
  276. #define MCLK_MULT 1
  277. #define MCLK_DIV 17
  278. #elif F_CPU == 216000000
  279. #define MCLK_MULT 8
  280. #define MCLK_DIV 153
  281. #define MCLK_SRC 0
  282. #elif F_CPU == 240000000
  283. #define MCLK_MULT 4
  284. #define MCLK_DIV 85
  285. #elif F_CPU == 16000000
  286. #define MCLK_MULT 12
  287. #define MCLK_DIV 17
  288. #else
  289. #error "This CPU Clock Speed is not supported by the Audio library";
  290. #endif
  291. #ifndef MCLK_SRC
  292. #if F_CPU >= 20000000
  293. #define MCLK_SRC 3 // the PLL
  294. #else
  295. #define MCLK_SRC 0 // system clock
  296. #endif
  297. #endif
  298. void AudioOutputSPDIF::config_SPDIF(void)
  299. {
  300. SIM_SCGC6 |= SIM_SCGC6_I2S;
  301. SIM_SCGC7 |= SIM_SCGC7_DMA;
  302. SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
  303. // enable MCLK output
  304. I2S0_MCR = I2S_MCR_MICS(MCLK_SRC) | I2S_MCR_MOE;
  305. while (I2S0_MCR & I2S_MCR_DUF) ;
  306. I2S0_MDR = I2S_MDR_FRACT((MCLK_MULT-1)) | I2S_MDR_DIVIDE((MCLK_DIV-1));
  307. // configure transmitter
  308. I2S0_TMR = 0;
  309. I2S0_TCR1 = I2S_TCR1_TFW(1); // watermark
  310. I2S0_TCR2 = I2S_TCR2_SYNC(0) | I2S_TCR2_MSEL(1) | I2S_TCR2_BCD | I2S_TCR2_DIV(0);
  311. I2S0_TCR3 = I2S_TCR3_TCE;
  312. //4 Words per Frame 32 Bit Word-Length -> 128 Bit Frame-Length, MSB First:
  313. I2S0_TCR4 = I2S_TCR4_FRSZ(3) | I2S_TCR4_SYWD(0) | I2S_TCR4_MF | I2S_TCR4_FSP | I2S_TCR4_FSD;
  314. I2S0_TCR5 = I2S_TCR5_WNW(31) | I2S_TCR5_W0W(31) | I2S_TCR5_FBT(31);
  315. I2S0_RCSR = 0;
  316. #if 0
  317. // configure pin mux for 3 clock signals (debug only)
  318. CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK)
  319. CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK
  320. // CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK
  321. #endif
  322. }
  323. #elif defined(KINETISL)
  324. void AudioOutputSPDIF::update(void)
  325. {
  326. audio_block_t *block;
  327. block = receiveReadOnly(0); // input 0 = left channel
  328. if (block) release(block);
  329. block = receiveReadOnly(1); // input 1 = right channel
  330. if (block) release(block);
  331. }
  332. #endif