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  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "input_adc.h"
  27. #include "utility/pdb.h"
  28. DMAMEM static uint16_t analog_rx_buffer[AUDIO_BLOCK_SAMPLES];
  29. audio_block_t * AudioInputAnalog::block_left = NULL;
  30. uint16_t AudioInputAnalog::block_offset = 0;
  31. bool AudioInputAnalog::update_responsibility = false;
  32. // #define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_CONT)
  33. // #define PDB_PERIOD 1087 // 48e6 / 44100
  34. void AudioInputAnalog::begin(unsigned int pin)
  35. {
  36. uint32_t i, sum=0;
  37. // pin must be 0 to 13 (for A0 to A13)
  38. // or 14 to 23 for digital pin numbers A0-A9
  39. // or 34 to 37 corresponding to A10-A13
  40. if (pin > 23 && !(pin >= 34 && pin <= 37)) return;
  41. //pinMode(2, OUTPUT);
  42. //pinMode(3, OUTPUT);
  43. //digitalWriteFast(3, HIGH);
  44. //delayMicroseconds(500);
  45. //digitalWriteFast(3, LOW);
  46. // Configure the ADC and run at least one software-triggered
  47. // conversion. This completes the self calibration stuff and
  48. // leaves the ADC in a state that's mostly ready to use
  49. analogReadRes(16);
  50. analogReference(INTERNAL); // range 0 to 1.2 volts
  51. //analogReference(DEFAULT); // range 0 to 3.3 volts
  52. analogReadAveraging(8);
  53. // Actually, do many normal reads, to start with a nice DC level
  54. for (i=0; i < 1024; i++) {
  55. sum += analogRead(pin);
  56. }
  57. dc_average = sum >> 10;
  58. // testing only, enable adc interrupt
  59. //ADC0_SC1A |= ADC_SC1_AIEN;
  60. //while ((ADC0_SC1A & ADC_SC1_COCO) == 0) ; // wait
  61. //NVIC_ENABLE_IRQ(IRQ_ADC0);
  62. // set the programmable delay block to trigger the ADC at 44.1 kHz
  63. SIM_SCGC6 |= SIM_SCGC6_PDB;
  64. PDB0_MOD = PDB_PERIOD;
  65. PDB0_SC = PDB_CONFIG | PDB_SC_LDOK;
  66. PDB0_SC = PDB_CONFIG | PDB_SC_SWTRIG;
  67. PDB0_CH0C1 = 0x0101;
  68. // enable the ADC for hardware trigger and DMA
  69. ADC0_SC2 |= ADC_SC2_ADTRG | ADC_SC2_DMAEN;
  70. // set up a DMA channel to store the ADC data
  71. SIM_SCGC7 |= SIM_SCGC7_DMA;
  72. SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
  73. DMA_CR = 0;
  74. DMA_TCD2_SADDR = &ADC0_RA;
  75. DMA_TCD2_SOFF = 0;
  76. DMA_TCD2_ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  77. DMA_TCD2_NBYTES_MLNO = 2;
  78. DMA_TCD2_SLAST = 0;
  79. DMA_TCD2_DADDR = analog_rx_buffer;
  80. DMA_TCD2_DOFF = 2;
  81. DMA_TCD2_CITER_ELINKNO = sizeof(analog_rx_buffer) / 2;
  82. DMA_TCD2_DLASTSGA = -sizeof(analog_rx_buffer);
  83. DMA_TCD2_BITER_ELINKNO = sizeof(analog_rx_buffer) / 2;
  84. DMA_TCD2_CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  85. DMAMUX0_CHCFG2 = DMAMUX_DISABLE;
  86. DMAMUX0_CHCFG2 = DMAMUX_SOURCE_ADC0 | DMAMUX_ENABLE;
  87. update_responsibility = update_setup();
  88. DMA_SERQ = 2;
  89. NVIC_ENABLE_IRQ(IRQ_DMA_CH2);
  90. }
  91. void dma_ch2_isr(void)
  92. {
  93. uint32_t daddr, offset;
  94. const uint16_t *src, *end;
  95. uint16_t *dest_left;
  96. audio_block_t *left;
  97. //digitalWriteFast(3, HIGH);
  98. daddr = (uint32_t)DMA_TCD2_DADDR;
  99. DMA_CINT = 2;
  100. if (daddr < (uint32_t)analog_rx_buffer + sizeof(analog_rx_buffer) / 2) {
  101. // DMA is receiving to the first half of the buffer
  102. // need to remove data from the second half
  103. src = (uint16_t *)&analog_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  104. end = (uint16_t *)&analog_rx_buffer[AUDIO_BLOCK_SAMPLES];
  105. if (AudioInputAnalog::update_responsibility) AudioStream::update_all();
  106. } else {
  107. // DMA is receiving to the second half of the buffer
  108. // need to remove data from the first half
  109. src = (uint16_t *)&analog_rx_buffer[0];
  110. end = (uint16_t *)&analog_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  111. }
  112. left = AudioInputAnalog::block_left;
  113. if (left != NULL) {
  114. offset = AudioInputAnalog::block_offset;
  115. if (offset > AUDIO_BLOCK_SAMPLES/2) offset = AUDIO_BLOCK_SAMPLES/2;
  116. //if (offset <= AUDIO_BLOCK_SAMPLES/2) {
  117. dest_left = (uint16_t *)&(left->data[offset]);
  118. AudioInputAnalog::block_offset = offset + AUDIO_BLOCK_SAMPLES/2;
  119. do {
  120. *dest_left++ = *src++;
  121. } while (src < end);
  122. //}
  123. }
  124. //digitalWriteFast(3, LOW);
  125. }
  126. #if 0
  127. void adc0_isr(void)
  128. {
  129. uint32_t tmp = ADC0_RA; // read ADC result to clear interrupt
  130. digitalWriteFast(3, HIGH);
  131. delayMicroseconds(1);
  132. digitalWriteFast(3, LOW);
  133. }
  134. #endif
  135. void AudioInputAnalog::update(void)
  136. {
  137. audio_block_t *new_left=NULL, *out_left=NULL;
  138. unsigned int dc, offset;
  139. int16_t s, *p, *end;
  140. // allocate new block (ok if NULL)
  141. new_left = allocate();
  142. __disable_irq();
  143. offset = block_offset;
  144. if (offset < AUDIO_BLOCK_SAMPLES) {
  145. // the DMA didn't fill a block
  146. if (new_left != NULL) {
  147. // but we allocated a block
  148. if (block_left == NULL) {
  149. // the DMA doesn't have any blocks to fill, so
  150. // give it the one we just allocated
  151. block_left = new_left;
  152. block_offset = 0;
  153. __enable_irq();
  154. //Serial.println("fail1");
  155. } else {
  156. // the DMA already has blocks, doesn't need this
  157. __enable_irq();
  158. release(new_left);
  159. //Serial.print("fail2, offset=");
  160. //Serial.println(offset);
  161. }
  162. } else {
  163. // The DMA didn't fill a block, and we could not allocate
  164. // memory... the system is likely starving for memory!
  165. // Sadly, there's nothing we can do.
  166. __enable_irq();
  167. //Serial.println("fail3");
  168. }
  169. return;
  170. }
  171. // the DMA filled a block, so grab it and get the
  172. // new block to the DMA, as quickly as possible
  173. out_left = block_left;
  174. block_left = new_left;
  175. block_offset = 0;
  176. __enable_irq();
  177. // find and subtract DC offset....
  178. // TODO: this may not be correct, needs testing with more types of signals
  179. dc = dc_average;
  180. p = out_left->data;
  181. end = p + AUDIO_BLOCK_SAMPLES;
  182. do {
  183. s = (uint16_t)(*p) - dc; // TODO: should be saturating subtract
  184. *p++ = s;
  185. dc += s >> 13; // approx 5.38 Hz high pass filter
  186. } while (p < end);
  187. dc_average = dc;
  188. // then transmit the AC data
  189. transmit(out_left);
  190. release(out_left);
  191. }