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  1. /* Audio Library for Teensy 3.X
  2. * Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
  3. *
  4. * Development of this audio library was funded by PJRC.COM, LLC by sales of
  5. * Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
  6. * open source software by purchasing Teensy or other PJRC products.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice, development funding notice, and this permission
  16. * notice shall be included in all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "input_i2s.h"
  27. #include "output_i2s.h"
  28. DMAMEM static uint32_t i2s_rx_buffer[AUDIO_BLOCK_SAMPLES];
  29. audio_block_t * AudioInputI2S::block_left = NULL;
  30. audio_block_t * AudioInputI2S::block_right = NULL;
  31. uint16_t AudioInputI2S::block_offset = 0;
  32. bool AudioInputI2S::update_responsibility = false;
  33. DMAChannel AudioInputI2S::dma(false);
  34. void AudioInputI2S::begin(void)
  35. {
  36. dma.begin(true); // Allocate the DMA channel first
  37. //block_left_1st = NULL;
  38. //block_right_1st = NULL;
  39. // TODO: should we set & clear the I2S_RCSR_SR bit here?
  40. AudioOutputI2S::config_i2s();
  41. CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
  42. dma.TCD->SADDR = &I2S0_RDR0;
  43. dma.TCD->SOFF = 0;
  44. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  45. dma.TCD->NBYTES_MLNO = 2;
  46. dma.TCD->SLAST = 0;
  47. dma.TCD->DADDR = i2s_rx_buffer;
  48. dma.TCD->DOFF = 2;
  49. dma.TCD->CITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  50. dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
  51. dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  52. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  53. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
  54. update_responsibility = update_setup();
  55. dma.enable();
  56. I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
  57. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
  58. dma.attachInterrupt(isr);
  59. }
  60. void AudioInputI2S::isr(void)
  61. {
  62. uint32_t daddr, offset;
  63. const int16_t *src, *end;
  64. int16_t *dest_left, *dest_right;
  65. audio_block_t *left, *right;
  66. //digitalWriteFast(3, HIGH);
  67. daddr = (uint32_t)(dma.TCD->DADDR);
  68. dma.clearInterrupt();
  69. if (daddr < (uint32_t)i2s_rx_buffer + sizeof(i2s_rx_buffer) / 2) {
  70. // DMA is receiving to the first half of the buffer
  71. // need to remove data from the second half
  72. src = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  73. end = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES];
  74. if (AudioInputI2S::update_responsibility) AudioStream::update_all();
  75. } else {
  76. // DMA is receiving to the second half of the buffer
  77. // need to remove data from the first half
  78. src = (int16_t *)&i2s_rx_buffer[0];
  79. end = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES/2];
  80. }
  81. left = AudioInputI2S::block_left;
  82. right = AudioInputI2S::block_right;
  83. if (left != NULL && right != NULL) {
  84. offset = AudioInputI2S::block_offset;
  85. if (offset <= AUDIO_BLOCK_SAMPLES/2) {
  86. dest_left = &(left->data[offset]);
  87. dest_right = &(right->data[offset]);
  88. AudioInputI2S::block_offset = offset + AUDIO_BLOCK_SAMPLES/2;
  89. do {
  90. //n = *src++;
  91. //*dest_left++ = (int16_t)n;
  92. //*dest_right++ = (int16_t)(n >> 16);
  93. *dest_left++ = *src++;
  94. *dest_right++ = *src++;
  95. } while (src < end);
  96. }
  97. }
  98. //digitalWriteFast(3, LOW);
  99. }
  100. void AudioInputI2S::update(void)
  101. {
  102. audio_block_t *new_left=NULL, *new_right=NULL, *out_left=NULL, *out_right=NULL;
  103. // allocate 2 new blocks, but if one fails, allocate neither
  104. new_left = allocate();
  105. if (new_left != NULL) {
  106. new_right = allocate();
  107. if (new_right == NULL) {
  108. release(new_left);
  109. new_left = NULL;
  110. }
  111. }
  112. __disable_irq();
  113. if (block_offset >= AUDIO_BLOCK_SAMPLES) {
  114. // the DMA filled 2 blocks, so grab them and get the
  115. // 2 new blocks to the DMA, as quickly as possible
  116. out_left = block_left;
  117. block_left = new_left;
  118. out_right = block_right;
  119. block_right = new_right;
  120. block_offset = 0;
  121. __enable_irq();
  122. // then transmit the DMA's former blocks
  123. transmit(out_left, 0);
  124. release(out_left);
  125. transmit(out_right, 1);
  126. release(out_right);
  127. //Serial.print(".");
  128. } else if (new_left != NULL) {
  129. // the DMA didn't fill blocks, but we allocated blocks
  130. if (block_left == NULL) {
  131. // the DMA doesn't have any blocks to fill, so
  132. // give it the ones we just allocated
  133. block_left = new_left;
  134. block_right = new_right;
  135. block_offset = 0;
  136. __enable_irq();
  137. } else {
  138. // the DMA already has blocks, doesn't need these
  139. __enable_irq();
  140. release(new_left);
  141. release(new_right);
  142. }
  143. } else {
  144. // The DMA didn't fill blocks, and we could not allocate
  145. // memory... the system is likely starving for memory!
  146. // Sadly, there's nothing we can do.
  147. __enable_irq();
  148. }
  149. }
  150. /******************************************************************/
  151. void AudioInputI2Sslave::begin(void)
  152. {
  153. dma.begin(true); // Allocate the DMA channel first
  154. //block_left_1st = NULL;
  155. //block_right_1st = NULL;
  156. AudioOutputI2Sslave::config_i2s();
  157. CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
  158. dma.TCD->SADDR = &I2S0_RDR0;
  159. dma.TCD->SOFF = 0;
  160. dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
  161. dma.TCD->NBYTES_MLNO = 2;
  162. dma.TCD->SLAST = 0;
  163. dma.TCD->DADDR = i2s_rx_buffer;
  164. dma.TCD->DOFF = 2;
  165. dma.TCD->CITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  166. dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
  167. dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
  168. dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
  169. dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
  170. update_responsibility = update_setup();
  171. dma.enable();
  172. I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
  173. I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
  174. dma.attachInterrupt(isr);
  175. }