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- #include "mk20dx128.h"
- #include <stdint.h>
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-
-
- #define EEPROM_SIZE 2048
-
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-
-
- #define HANDLE_UNALIGNED_WRITES
-
-
-
- #if (EEPROM_SIZE == 2048)
- #define EEESIZE 0x33
- #elif (EEPROM_SIZE == 1024)
- #define EEESIZE 0x34
- #elif (EEPROM_SIZE == 512)
- #define EEESIZE 0x35
- #elif (EEPROM_SIZE == 256)
- #define EEESIZE 0x36
- #elif (EEPROM_SIZE == 128)
- #define EEESIZE 0x37
- #elif (EEPROM_SIZE == 64)
- #define EEESIZE 0x38
- #elif (EEPROM_SIZE == 32)
- #define EEESIZE 0x39
- #endif
-
- void eeprom_initialize(void)
- {
- uint32_t count=0;
- uint16_t do_flash_cmd[] = {
- 0xf06f, 0x037f, 0x7003, 0x7803,
- 0xf013, 0x0f80, 0xd0fb, 0x4770};
- uint8_t status;
-
- if (FTFL_FCNFG & FTFL_FCNFG_RAMRDY) {
-
-
- FTFL_FCCOB0 = 0x80;
- FTFL_FCCOB4 = EEESIZE;
- FTFL_FCCOB5 = 0x03;
- __disable_irq();
-
- (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&FTFL_FSTAT);
- __enable_irq();
- status = FTFL_FSTAT;
- if (status & 0x70) {
- FTFL_FSTAT = (status & 0x70);
- return;
- }
- }
-
- while (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) {
- if (++count > 20000) break;
- }
- }
-
- #define FlexRAM ((uint8_t *)0x14000000)
-
- uint8_t eeprom_read_byte(const uint8_t *addr)
- {
- uint32_t offset = (uint32_t)addr;
- if (offset >= EEPROM_SIZE) return 0;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- return FlexRAM[offset];
- }
-
- uint16_t eeprom_read_word(const uint16_t *addr)
- {
- uint32_t offset = (uint32_t)addr;
- if (offset >= EEPROM_SIZE-1) return 0;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- return *(uint16_t *)(&FlexRAM[offset]);
- }
-
- uint32_t eeprom_read_dword(const uint32_t *addr)
- {
- uint32_t offset = (uint32_t)addr;
- if (offset >= EEPROM_SIZE-3) return 0;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- return *(uint32_t *)(&FlexRAM[offset]);
- }
-
- void eeprom_read_block(void *buf, const void *addr, uint32_t len)
- {
- uint32_t offset = (uint32_t)addr;
- uint8_t *dest = (uint8_t *)buf;
- uint32_t end = offset + len;
-
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- if (end > EEPROM_SIZE) end = EEPROM_SIZE;
- while (offset < end) {
- *dest++ = FlexRAM[offset++];
- }
- }
-
- int eeprom_is_ready(void)
- {
- return (FTFL_FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0;
- }
-
- static void flexram_wait(void)
- {
- while (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) {
-
- }
- }
-
- void eeprom_write_byte(uint8_t *addr, uint8_t value)
- {
- uint32_t offset = (uint32_t)addr;
-
- if (offset >= EEPROM_SIZE) return;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- if (FlexRAM[offset] != value) {
- FlexRAM[offset] = value;
- flexram_wait();
- }
- }
-
- void eeprom_write_word(uint16_t *addr, uint16_t value)
- {
- uint32_t offset = (uint32_t)addr;
-
- if (offset >= EEPROM_SIZE-1) return;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- #ifdef HANDLE_UNALIGNED_WRITES
- if ((offset & 1) == 0) {
- #endif
- if (*(uint16_t *)(&FlexRAM[offset]) != value) {
- *(uint16_t *)(&FlexRAM[offset]) = value;
- flexram_wait();
- }
- #ifdef HANDLE_UNALIGNED_WRITES
- } else {
- if (FlexRAM[offset] != value) {
- FlexRAM[offset] = value;
- flexram_wait();
- }
- if (FlexRAM[offset + 1] != (value >> 8)) {
- FlexRAM[offset + 1] = value >> 8;
- flexram_wait();
- }
- }
- #endif
- }
-
- void eeprom_write_dword(uint32_t *addr, uint32_t value)
- {
- uint32_t offset = (uint32_t)addr;
-
- if (offset >= EEPROM_SIZE-3) return;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- #ifdef HANDLE_UNALIGNED_WRITES
- switch (offset & 3) {
- case 0:
- #endif
- if (*(uint32_t *)(&FlexRAM[offset]) != value) {
- *(uint32_t *)(&FlexRAM[offset]) = value;
- flexram_wait();
- }
- return;
- #ifdef HANDLE_UNALIGNED_WRITES
- case 2:
- if (*(uint16_t *)(&FlexRAM[offset]) != value) {
- *(uint16_t *)(&FlexRAM[offset]) = value;
- flexram_wait();
- }
- if (*(uint16_t *)(&FlexRAM[offset + 2]) != (value >> 16)) {
- *(uint16_t *)(&FlexRAM[offset + 2]) = value >> 16;
- flexram_wait();
- }
- return;
- default:
- if (FlexRAM[offset] != value) {
- FlexRAM[offset] = value;
- flexram_wait();
- }
- if (*(uint16_t *)(&FlexRAM[offset + 1]) != (value >> 8)) {
- *(uint16_t *)(&FlexRAM[offset + 1]) = value >> 8;
- flexram_wait();
- }
- if (FlexRAM[offset + 3] != (value >> 24)) {
- FlexRAM[offset + 3] = value >> 24;
- flexram_wait();
- }
- }
- #endif
- }
-
- void eeprom_write_block(const void *buf, void *addr, uint32_t len)
- {
- uint32_t offset = (uint32_t)addr;
- const uint8_t *src = (const uint8_t *)buf;
-
- if (offset >= EEPROM_SIZE) return;
- if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
- if (len >= EEPROM_SIZE) len = EEPROM_SIZE;
- if (offset + len >= EEPROM_SIZE) len = EEPROM_SIZE - offset;
- while (len > 0) {
- uint32_t lsb = offset & 3;
- if (lsb == 0 && len >= 4) {
-
- uint32_t val32;
- val32 = *src++;
- val32 |= (*src++ << 8);
- val32 |= (*src++ << 16);
- val32 |= (*src++ << 24);
- if (*(uint32_t *)(&FlexRAM[offset]) != val32) {
- *(uint32_t *)(&FlexRAM[offset]) = val32;
- flexram_wait();
- }
- offset += 4;
- len -= 4;
- } else if ((lsb == 0 || lsb == 2) && len >= 2) {
-
- uint16_t val16;
- val16 = *src++;
- val16 |= (*src++ << 8);
- if (*(uint16_t *)(&FlexRAM[offset]) != val16) {
- *(uint16_t *)(&FlexRAM[offset]) = val16;
- flexram_wait();
- }
- offset += 2;
- len -= 2;
- } else {
-
- uint8_t val8 = *src++;
- if (FlexRAM[offset] != val8) {
- FlexRAM[offset] = val8;
- flexram_wait();
- }
- offset++;
- len--;
- }
- }
- }
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