Teensy 4.1 core updated for C++20
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8 роки тому
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8 роки тому
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6 роки тому
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  1. /* Teensyduino Core Library
  2. * http://www.pjrc.com/teensy/
  3. * Copyright (c) 2017 PJRC.COM, LLC.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * 1. The above copyright notice and this permission notice shall be
  14. * included in all copies or substantial portions of the Software.
  15. *
  16. * 2. If the Software is incorporated into a build system that allows
  17. * selection among a list of target devices, then similar target
  18. * devices manufactured by PJRC.COM must be included in the list of
  19. * target devices and selectable in the same manner.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  25. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  26. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  27. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  28. * SOFTWARE.
  29. */
  30. #include "kinetis.h"
  31. #include "core_pins.h"
  32. #include "HardwareSerial.h"
  33. #ifdef HAS_KINETISK_LPUART0
  34. #define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
  35. #define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
  36. #define BITBAND_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1)
  37. #define BITBAND_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0)
  38. #define TCIE_BIT 22
  39. #define TIE_BIT 23
  40. ////////////////////////////////////////////////////////////////
  41. // Tunable parameters (relatively safe to edit these numbers)
  42. ////////////////////////////////////////////////////////////////
  43. #ifndef SERIAL6_TX_BUFFER_SIZE
  44. #define SERIAL6_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer
  45. #endif
  46. #ifndef SERIAL6_RX_BUFFER_SIZE
  47. #define SERIAL6_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer
  48. #endif
  49. #define RTS_HIGH_WATERMARK (SERIAL6_RX_BUFFER_SIZE-24) // RTS requests sender to pause
  50. #define RTS_LOW_WATERMARK (SERIAL6_RX_BUFFER_SIZE-38) // RTS allows sender to resume
  51. #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest
  52. ////////////////////////////////////////////////////////////////
  53. // changes not recommended below this point....
  54. ////////////////////////////////////////////////////////////////
  55. #ifdef SERIAL_9BIT_SUPPORT
  56. static uint8_t use9Bits = 0;
  57. #define BUFTYPE uint16_t
  58. #else
  59. #define BUFTYPE uint8_t
  60. #define use9Bits 0
  61. #endif
  62. static volatile BUFTYPE tx_buffer[SERIAL6_TX_BUFFER_SIZE];
  63. static volatile BUFTYPE rx_buffer[SERIAL6_RX_BUFFER_SIZE];
  64. static volatile uint8_t transmitting = 0;
  65. static volatile uint8_t *transmit_pin=NULL;
  66. #define transmit_assert() *transmit_pin = 1
  67. #define transmit_deassert() *transmit_pin = 0
  68. static volatile uint8_t *rts_pin=NULL;
  69. #define rts_assert() *rts_pin = 0
  70. #define rts_deassert() *rts_pin = 1
  71. #if SERIAL6_TX_BUFFER_SIZE > 255
  72. static volatile uint16_t tx_buffer_head = 0;
  73. static volatile uint16_t tx_buffer_tail = 0;
  74. #else
  75. static volatile uint8_t tx_buffer_head = 0;
  76. static volatile uint8_t tx_buffer_tail = 0;
  77. #endif
  78. #if SERIAL6_RX_BUFFER_SIZE > 255
  79. static volatile uint16_t rx_buffer_head = 0;
  80. static volatile uint16_t rx_buffer_tail = 0;
  81. #else
  82. static volatile uint8_t rx_buffer_head = 0;
  83. static volatile uint8_t rx_buffer_tail = 0;
  84. #endif
  85. static uint8_t tx_pin_num = 48;
  86. // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
  87. // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
  88. void serial6_begin(uint32_t desiredBaudRate)
  89. {
  90. #define F_LPUART_CLOCK_SPEED 48000000 //F_BUS
  91. // Make sure the clock for this uart is enabled, else the registers are not
  92. // vailable.
  93. SIM_SCGC2 |= SIM_SCGC2_LPUART0; // Turn on the clock
  94. // Convert the baud rate to best divisor and OSR, based off of code I found in posting
  95. // try to find an OSR > 4 with the minimum difference from the actual disired baud rate.
  96. uint16_t sbr, sbrTemp, osrCheck;
  97. uint32_t osr, baudDiffCheck, calculatedBaud, baudDiff;
  98. uint32_t clockSpeed;
  99. // First lets figure out what the LPUART Clock speed is.
  100. uint32_t PLLFLLSEL = SIM_SOPT2 & SIM_SOPT2_IRC48SEL; // Note: Bot bits on here
  101. if (PLLFLLSEL == SIM_SOPT2_IRC48SEL)
  102. clockSpeed = 48000000; // Fixed to 48mhz
  103. else if (PLLFLLSEL == SIM_SOPT2_PLLFLLSEL)
  104. clockSpeed = F_PLL; // Using PLL clock
  105. else
  106. clockSpeed = F_CPU/4; // FLL clock, guessing
  107. osr = 4;
  108. sbr = (clockSpeed/(desiredBaudRate * osr));
  109. /*set sbr to 1 if the clockSpeed can not satisfy the desired baud rate*/
  110. if(sbr == 0) {
  111. // Maybe print something.
  112. return; // can not initialize
  113. }
  114. // With integer math the divide*muliply implies the calculated baud will be >= desired baud
  115. calculatedBaud = (clockSpeed / (osr * sbr));
  116. baudDiff = calculatedBaud - desiredBaudRate;
  117. // Check if better off with sbr+1
  118. if (baudDiff != 0) {
  119. calculatedBaud = (clockSpeed / (osr * (sbr + 1)));
  120. baudDiffCheck = desiredBaudRate - calculatedBaud ;
  121. if (baudDiffCheck < baudDiff) {
  122. sbr++; // use the higher sbr
  123. baudDiff = baudDiffCheck;
  124. }
  125. }
  126. // loop to find the best osr value possible, one that generates minimum baudDiff
  127. for (osrCheck = 5; osrCheck <= 32; osrCheck++) {
  128. sbrTemp = (clockSpeed/(desiredBaudRate * osrCheck));
  129. if(sbrTemp == 0)
  130. break; // higher divisor returns 0 so can not use...
  131. // Remember integer math so (X/Y)*Y will always be <=X
  132. calculatedBaud = (clockSpeed / (osrCheck * sbrTemp));
  133. baudDiffCheck = calculatedBaud - desiredBaudRate;
  134. if (baudDiffCheck <= baudDiff) {
  135. baudDiff = baudDiffCheck;
  136. osr = osrCheck;
  137. sbr = sbrTemp;
  138. }
  139. // Lets try the rounded up one as well
  140. if (baudDiffCheck) {
  141. calculatedBaud = (clockSpeed / (osrCheck * ++sbrTemp));
  142. baudDiffCheck = desiredBaudRate - calculatedBaud;
  143. if (baudDiffCheck <= baudDiff) {
  144. baudDiff = baudDiffCheck;
  145. osr = osrCheck;
  146. sbr = sbrTemp;
  147. }
  148. }
  149. }
  150. // for lower OSR <= 7x turn on both edge sampling
  151. uint32_t lpb = LPUART_BAUD_OSR(osr-1) | LPUART_BAUD_SBR(sbr);
  152. if (osr < 8) {
  153. lpb |= LPUART_BAUD_BOTHEDGE;
  154. }
  155. LPUART0_BAUD = lpb;
  156. SIM_SOPT2 |= SIM_SOPT2_LPUARTSRC(1); // Lets use PLL?
  157. rx_buffer_head = 0;
  158. rx_buffer_tail = 0;
  159. tx_buffer_head = 0;
  160. tx_buffer_tail = 0;
  161. transmitting = 0;
  162. CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(5);
  163. CORE_PIN48_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(5);
  164. LPUART0_CTRL = 0;
  165. LPUART0_MATCH = 0;
  166. LPUART0_STAT = 0;
  167. // Enable the transmitter, receiver and enable receiver interrupt
  168. LPUART0_CTRL |= LPUART_CTRL_RIE | LPUART_CTRL_TE | LPUART_CTRL_RE;
  169. NVIC_SET_PRIORITY(IRQ_LPUART0, IRQ_PRIORITY);
  170. NVIC_ENABLE_IRQ(IRQ_LPUART0);
  171. }
  172. void serial6_format(uint32_t format)
  173. {
  174. uint32_t c;
  175. // Bits 0-2 - Parity plus 9 bit.
  176. c = LPUART0_CTRL;
  177. //c = (c & ~(LPUART_CTRL_M | LPUART_CTRL_PE | LPUART_CTRL_PT)) | (format & (LPUART_CTRL_PE | LPUART_CTRL_PT)); // configure parity
  178. //if (format & 0x04) c |= LPUART_CTRL_M; // 9 bits (might include parity)
  179. c = (c & ~0x13) | (format & 0x03); // configure parity
  180. if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
  181. LPUART0_CTRL = c;
  182. if ((format & 0x0F) == 0x04) LPUART0_CTRL |= LPUART_CTRL_T8; // 8N2 is 9 bit with 9th bit always 1
  183. // Bit 3 10 bit - Will assume that begin already cleared it.
  184. if (format & 0x08)
  185. LPUART0_BAUD |= LPUART_BAUD_M10;
  186. // Bit 4 RXINVERT
  187. c = LPUART0_STAT & ~LPUART_STAT_RXINV;
  188. if (format & 0x10) c |= LPUART_STAT_RXINV; // rx invert
  189. LPUART0_STAT = c;
  190. // Bit 5 TXINVERT
  191. c = LPUART0_CTRL & ~LPUART_CTRL_TXINV;
  192. if (format & 0x20) c |= LPUART_CTRL_TXINV; // tx invert
  193. LPUART0_CTRL = c;
  194. // For T3.6 See about turning on 2 stop bit mode
  195. if ( format & 0x100) LPUART0_BAUD |= LPUART_BAUD_SBNS;
  196. }
  197. void serial6_end(void)
  198. {
  199. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return;
  200. while (transmitting) yield(); // wait for buffered data to send
  201. NVIC_DISABLE_IRQ(IRQ_LPUART0);
  202. LPUART0_CTRL = 0;
  203. CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  204. CORE_PIN48_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  205. rx_buffer_head = 0;
  206. rx_buffer_tail = 0;
  207. if (rts_pin) rts_deassert();
  208. }
  209. void serial6_set_transmit_pin(uint8_t pin)
  210. {
  211. while (transmitting) ;
  212. pinMode(pin, OUTPUT);
  213. digitalWrite(pin, LOW);
  214. transmit_pin = portOutputRegister(pin);
  215. }
  216. void serial6_set_tx(uint8_t pin, uint8_t opendrain)
  217. {
  218. uint32_t cfg;
  219. if (opendrain) pin |= 128;
  220. if (pin == tx_pin_num) return;
  221. if ((SIM_SCGC2 & SIM_SCGC2_LPUART0)) {
  222. switch (tx_pin_num & 127) {
  223. case 48: CORE_PIN48_CONFIG = 0; break; // PTE24
  224. }
  225. if (opendrain) {
  226. cfg = PORT_PCR_DSE | PORT_PCR_ODE;
  227. } else {
  228. cfg = PORT_PCR_DSE | PORT_PCR_SRE;
  229. }
  230. switch (pin & 127) {
  231. case 48: CORE_PIN48_CONFIG = cfg | PORT_PCR_MUX(5); break;
  232. }
  233. }
  234. tx_pin_num = pin;
  235. }
  236. void serial6_set_rx(uint8_t pin)
  237. {
  238. }
  239. int serial6_set_rts(uint8_t pin)
  240. {
  241. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
  242. if (pin < CORE_NUM_DIGITAL) {
  243. rts_pin = portOutputRegister(pin);
  244. pinMode(pin, OUTPUT);
  245. rts_assert();
  246. } else {
  247. rts_pin = NULL;
  248. return 0;
  249. }
  250. return 1;
  251. }
  252. int serial6_set_cts(uint8_t pin)
  253. {
  254. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
  255. if (pin == 56) {
  256. CORE_PIN56_CONFIG = PORT_PCR_MUX(5) | PORT_PCR_PE; // weak pulldown
  257. } else {
  258. UART5_MODEM &= ~UART_MODEM_TXCTSE;
  259. return 0;
  260. }
  261. UART5_MODEM |= UART_MODEM_TXCTSE;
  262. return 1;
  263. }
  264. void serial6_putchar(uint32_t c)
  265. {
  266. uint32_t head, n;
  267. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return;
  268. if (transmit_pin) transmit_assert();
  269. head = tx_buffer_head;
  270. if (++head >= SERIAL6_TX_BUFFER_SIZE) head = 0;
  271. while (tx_buffer_tail == head) {
  272. int priority = nvic_execution_priority();
  273. if (priority <= IRQ_PRIORITY) {
  274. if ((LPUART0_STAT & LPUART_STAT_TDRE)) {
  275. uint32_t tail = tx_buffer_tail;
  276. if (++tail >= SERIAL6_TX_BUFFER_SIZE) tail = 0;
  277. n = tx_buffer[tail];
  278. //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2);
  279. LPUART0_DATA = n;
  280. tx_buffer_tail = tail;
  281. }
  282. } else if (priority >= 256) {
  283. yield(); // wait
  284. }
  285. }
  286. tx_buffer[head] = c;
  287. transmitting = 1;
  288. tx_buffer_head = head;
  289. //LPUART0_CTRL |= LPUART_CTRL_TIE; // enable the transmit interrupt
  290. BITBAND_SET_BIT(LPUART0_CTRL, TIE_BIT);
  291. }
  292. void serial6_write(const void *buf, unsigned int count)
  293. {
  294. const uint8_t *p = (const uint8_t *)buf;
  295. while (count-- > 0) serial6_putchar(*p++);
  296. }
  297. void serial6_flush(void)
  298. {
  299. while (transmitting) yield(); // wait
  300. }
  301. int serial6_write_buffer_free(void)
  302. {
  303. uint32_t head, tail;
  304. head = tx_buffer_head;
  305. tail = tx_buffer_tail;
  306. if (head >= tail) return SERIAL6_TX_BUFFER_SIZE - 1 - head + tail;
  307. return tail - head - 1;
  308. }
  309. int serial6_available(void)
  310. {
  311. uint32_t head, tail;
  312. head = rx_buffer_head;
  313. tail = rx_buffer_tail;
  314. if (head >= tail) return head - tail;
  315. return SERIAL6_RX_BUFFER_SIZE + head - tail;
  316. }
  317. int serial6_getchar(void)
  318. {
  319. uint32_t head, tail;
  320. int c;
  321. head = rx_buffer_head;
  322. tail = rx_buffer_tail;
  323. if (head == tail) return -1;
  324. if (++tail >= SERIAL6_RX_BUFFER_SIZE) tail = 0;
  325. c = rx_buffer[tail];
  326. rx_buffer_tail = tail;
  327. if (rts_pin) {
  328. int avail;
  329. if (head >= tail) avail = head - tail;
  330. else avail = SERIAL6_RX_BUFFER_SIZE + head - tail;
  331. if (avail <= RTS_LOW_WATERMARK) rts_assert();
  332. }
  333. return c;
  334. }
  335. int serial6_peek(void)
  336. {
  337. uint32_t head, tail;
  338. head = rx_buffer_head;
  339. tail = rx_buffer_tail;
  340. if (head == tail) return -1;
  341. if (++tail >= SERIAL6_RX_BUFFER_SIZE) tail = 0;
  342. return rx_buffer[tail];
  343. }
  344. void serial6_clear(void)
  345. {
  346. rx_buffer_head = rx_buffer_tail;
  347. if (rts_pin) rts_assert();
  348. }
  349. // status interrupt combines
  350. // Transmit data below watermark LPUART_STAT_TDRE
  351. // Transmit complete LPUART_STAT_TC
  352. // Idle line LPUART_STAT_IDLE
  353. // Receive data above watermark LPUART_STAT_RDRF
  354. // LIN break detect UART_S2_LBKDIF
  355. // RxD pin active edge UART_S2_RXEDGIF
  356. void lpuart0_status_isr(void)
  357. {
  358. uint32_t head, tail, n;
  359. uint32_t c;
  360. if (LPUART0_STAT & LPUART_STAT_RDRF) {
  361. // if (use9Bits && (UART5_C3 & 0x80)) {
  362. // n = UART5_D | 0x100;
  363. // } else {
  364. // n = UART5_D;
  365. // }
  366. n = LPUART0_DATA & 0x3ff; // use only the 10 data bits
  367. head = rx_buffer_head + 1;
  368. if (head >= SERIAL6_RX_BUFFER_SIZE) head = 0;
  369. if (head != rx_buffer_tail) {
  370. rx_buffer[head] = n;
  371. rx_buffer_head = head;
  372. }
  373. if (rts_pin) {
  374. int avail;
  375. tail = tx_buffer_tail;
  376. if (head >= tail) avail = head - tail;
  377. else avail = SERIAL6_RX_BUFFER_SIZE + head - tail;
  378. if (avail >= RTS_HIGH_WATERMARK) rts_deassert();
  379. }
  380. }
  381. c = LPUART0_CTRL;
  382. if ((c & LPUART_CTRL_TIE) && (LPUART0_STAT & LPUART_STAT_TDRE)) {
  383. head = tx_buffer_head;
  384. tail = tx_buffer_tail;
  385. if (head == tail) {
  386. BITBAND_CLR_BIT(LPUART0_CTRL, TIE_BIT);
  387. BITBAND_SET_BIT(LPUART0_CTRL, TCIE_BIT);
  388. //LPUART0_CTRL &= ~LPUART_CTRL_TIE;
  389. //LPUART0_CTRL |= LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on...
  390. } else {
  391. if (++tail >= SERIAL6_TX_BUFFER_SIZE) tail = 0;
  392. n = tx_buffer[tail];
  393. //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2);
  394. LPUART0_DATA = n;
  395. tx_buffer_tail = tail;
  396. }
  397. }
  398. if ((c & LPUART_CTRL_TCIE) && (LPUART0_STAT & LPUART_STAT_TC)) {
  399. transmitting = 0;
  400. if (transmit_pin) transmit_deassert();
  401. BITBAND_CLR_BIT(LPUART0_CTRL, TCIE_BIT);
  402. // LPUART0_CTRL &= ~LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on...
  403. }
  404. }
  405. #endif // HAS_KINETISK_LPUART0