Teensy 4.1 core updated for C++20
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  1. #include "imxrt.h"
  2. #include "core_pins.h"
  3. #include "debug/printf.h"
  4. struct pwm_pin_info_struct {
  5. uint8_t type; // 0=no pwm, 1=flexpwm, 2=quad
  6. uint8_t module; // 0-3, 0-3
  7. uint8_t channel; // 0=X, 1=A, 2=B
  8. uint8_t muxval; //
  9. };
  10. uint8_t analog_write_res = 8;
  11. #define M(a, b) ((((a) - 1) << 4) | (b))
  12. #if defined(__IMXRT1062__)
  13. const struct pwm_pin_info_struct pwm_pin_info[] = {
  14. {1, M(1, 1), 0, 4}, // FlexPWM1_1_X 0 // AD_B0_03
  15. {1, M(1, 0), 0, 4}, // FlexPWM1_0_X 1 // AD_B0_02
  16. {1, M(4, 2), 1, 1}, // FlexPWM4_2_A 2 // EMC_04
  17. {1, M(4, 2), 2, 1}, // FlexPWM4_2_B 3 // EMC_05
  18. {1, M(2, 0), 1, 1}, // FlexPWM2_0_A 4 // EMC_06
  19. {1, M(2, 1), 1, 1}, // FlexPWM2_1_A 5 // EMC_08
  20. {1, M(2, 2), 1, 2}, // FlexPWM2_2_A 6 // B0_10
  21. {1, M(1, 3), 2, 6}, // FlexPWM1_3_B 7 // B1_01
  22. {1, M(1, 3), 1, 6}, // FlexPWM1_3_A 8 // B1_00
  23. {1, M(2, 2), 2, 2}, // FlexPWM2_2_B 9 // B0_11
  24. {2, M(1, 0), 0, 1}, // QuadTimer1_0 10 // B0_00
  25. {2, M(1, 2), 0, 1}, // QuadTimer1_2 11 // B0_02
  26. {2, M(1, 1), 0, 1}, // QuadTimer1_1 12 // B0_01
  27. {2, M(2, 0), 0, 1}, // QuadTimer2_0 13 // B0_03
  28. {2, M(3, 2), 0, 1}, // QuadTimer3_2 14 // AD_B1_02
  29. {2, M(3, 3), 0, 1}, // QuadTimer3_3 15 // AD_B1_03
  30. {0, M(1, 0), 0, 0},
  31. {0, M(1, 0), 0, 0},
  32. {2, M(3, 1), 0, 1}, // QuadTimer3_1 18 // AD_B1_01
  33. {2, M(3, 0), 0, 1}, // QuadTimer3_0 19 // AD_B1_00
  34. {0, M(1, 0), 0, 0},
  35. {0, M(1, 0), 0, 0},
  36. {1, M(4, 0), 1, 1}, // FlexPWM4_0_A 22 // AD_B1_08
  37. {1, M(4, 1), 1, 1}, // FlexPWM4_1_A 23 // AD_B1_09
  38. {1, M(1, 2), 0, 4}, // FlexPWM1_2_X 24 // AD_B0_12
  39. {1, M(1, 3), 0, 4}, // FlexPWM1_3_X 25 // AD_B0_13
  40. {0, M(1, 0), 0, 0},
  41. {0, M(1, 0), 0, 0},
  42. {1, M(3, 1), 2, 1}, // FlexPWM3_1_B 28 // EMC_32
  43. {1, M(3, 1), 1, 1}, // FlexPWM3_1_A 29 // EMC_31
  44. {0, M(1, 0), 0, 0},
  45. {0, M(1, 0), 0, 0},
  46. {0, M(1, 0), 0, 0},
  47. {1, M(2, 0), 2, 1}, // FlexPWM2_0_B 33 // EMC_07
  48. #ifdef ARDUINO_TEENSY40
  49. {1, M(1, 1), 2, 1}, // FlexPWM1_1_B 34 // SD_B0_03
  50. {1, M(1, 1), 1, 1}, // FlexPWM1_1_A 35 // SD_B0_02
  51. {1, M(1, 0), 2, 1}, // FlexPWM1_0_B 36 // SD_B0_01
  52. {1, M(1, 0), 1, 1}, // FlexPWM1_0_A 37 // SD_B0_00
  53. {1, M(1, 2), 2, 1}, // FlexPWM1_2_B 38 // SD_B0_05
  54. {1, M(1, 2), 1, 1}, // FlexPWM1_2_A 39 // SD_B0_04
  55. #endif
  56. #ifdef ARDUINO_TEENSY41
  57. {0, M(1, 0), 0, 0},
  58. {0, M(1, 0), 0, 0},
  59. {1, M(2, 3), 1, 6}, // FlexPWM2_3_A 36 // B1_00
  60. {1, M(2, 3), 2, 6}, // FlexPWM2_3_B 37 // B1_01
  61. {0, M(1, 0), 0, 0},
  62. {0, M(1, 0), 0, 0},
  63. {0, M(1, 0), 0, 0},
  64. {0, M(1, 0), 0, 0},
  65. {1, M(1, 1), 2, 1}, // FlexPWM1_1_B 42 // SD_B0_03
  66. {1, M(1, 1), 1, 1}, // FlexPWM1_1_A 43 // SD_B0_02
  67. {1, M(1, 0), 2, 1}, // FlexPWM1_0_B 44 // SD_B0_01
  68. {1, M(1, 0), 1, 1}, // FlexPWM1_0_A 45 // SD_B0_00
  69. {1, M(1, 2), 2, 1}, // FlexPWM1_2_B 46 // SD_B0_05
  70. {1, M(1, 2), 1, 1}, // FlexPWM1_2_A 47 // SD_B0_04
  71. {0, M(1, 0), 0, 0}, // duplicate FlexPWM1_0_B
  72. {0, M(1, 0), 0, 0}, // duplicate FlexPWM1_2_A
  73. {0, M(1, 0), 0, 0}, // duplicate FlexPWM1_2_B
  74. {1, M(3, 3), 2, 1}, // FlexPWM3_3_B 51 // EMC_22
  75. {0, M(1, 0), 0, 0}, // duplicate FlexPWM1_1_B
  76. {0, M(1, 0), 0, 0}, // duplicate FlexPWM1_1_A
  77. {1, M(3, 0), 1, 1}, // FlexPWM3_0_A 53 // EMC_29
  78. #endif
  79. };
  80. // Known usage of FlexPWM and QuadTimers
  81. // -------------------------------------
  82. // FlexPWM1_0 PWM pin 1, 36(T4.0), 37(T4.0), 44(T4.1), 45(T4.1)
  83. // FlexPWM1_1 PWM pin 0, 34(T4.0), 35(T4.0), 42(T4.1), 43(T4.1)
  84. // FlexPWM1_2 PWM pin 24, 38(T4.0), 39(T4.0), 46(T4.1), 47(T4.1)
  85. // FlexPWM1_3 PWM pin 7, 8, 25
  86. // FlexPWM2_0 PWM pin 4, 33
  87. // FlexPWM2_1 PWM pin 5
  88. // FlexPWM2_2 PWM pin 6, 9
  89. // FlexPWM2_3 PWM pin 36(T4.1), 37(T4.1)
  90. // FlexPWM3_0 PWM pin 53(T4.1)
  91. // FlexPWM3_1 PWM pin 28, 29
  92. // FlexPWM3_2
  93. // FlexPWM3_3 PWM pin 41(T4.1)
  94. // FlexPWM4_0 PWM pin 22
  95. // FlexPWM4_1 PWM pin 23
  96. // FlexPWM4_2 PWM pin 2, 3
  97. // FlexPWM4_3
  98. // QuadTimer1_0 PWM pin 10
  99. // QuadTimer1_1 PWM pin 12
  100. // QuadTimer1_2 PWM pin 11
  101. // QuadTimer1_3
  102. // QuadTimer2_0 PWM pin 13
  103. // QuadTimer2_1
  104. // QuadTimer2_2
  105. // QuadTimer2_3
  106. // QuadTimer3_0 PWM pin 19
  107. // QuadTimer3_1 PWM pin 18
  108. // QuadTimer3_2 PWM pin 14
  109. // QuadTimer3_3 PWM pin 15
  110. // QuadTimer4_0 OctoWS2811
  111. // QuadTimer4_1 OctoWS2811
  112. // QuadTimer4_2 OctoWS2811
  113. // QuadTimer4_3 AudioInputAnalog
  114. #endif // __IMXRT1062__
  115. void flexpwmWrite(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, uint16_t val)
  116. {
  117. uint16_t mask = 1 << submodule;
  118. uint32_t modulo = p->SM[submodule].VAL1;
  119. uint32_t cval = ((uint32_t)val * (modulo + 1)) >> analog_write_res;
  120. if (cval > modulo) cval = modulo; // TODO: is this check correct?
  121. //printf("flexpwmWrite, p=%08lX, sm=%d, ch=%c, cval=%ld\n",
  122. //(uint32_t)p, submodule, channel == 0 ? 'X' : (channel == 1 ? 'A' : 'B'), cval);
  123. p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);
  124. switch (channel) {
  125. case 0: // X
  126. p->SM[submodule].VAL0 = modulo - cval;
  127. p->OUTEN |= FLEXPWM_OUTEN_PWMX_EN(mask);
  128. //printf(" write channel X\n");
  129. break;
  130. case 1: // A
  131. p->SM[submodule].VAL3 = cval;
  132. p->OUTEN |= FLEXPWM_OUTEN_PWMA_EN(mask);
  133. //printf(" write channel A\n");
  134. break;
  135. case 2: // B
  136. p->SM[submodule].VAL5 = cval;
  137. p->OUTEN |= FLEXPWM_OUTEN_PWMB_EN(mask);
  138. //printf(" write channel B\n");
  139. }
  140. p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);
  141. }
  142. void flexpwmFrequency(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, float frequency)
  143. {
  144. uint16_t mask = 1 << submodule;
  145. uint32_t olddiv = p->SM[submodule].VAL1;
  146. uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5f);
  147. uint32_t prescale = 0;
  148. //printf(" div=%lu\n", newdiv);
  149. while (newdiv > 65535 && prescale < 7) {
  150. newdiv = newdiv >> 1;
  151. prescale = prescale + 1;
  152. }
  153. if (newdiv > 65535) {
  154. newdiv = 65535;
  155. } else if (newdiv < 2) {
  156. newdiv = 2;
  157. }
  158. //printf(" div=%lu, scale=%lu\n", newdiv, prescale);
  159. p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);
  160. p->SM[submodule].CTRL = FLEXPWM_SMCTRL_FULL | FLEXPWM_SMCTRL_PRSC(prescale);
  161. p->SM[submodule].VAL1 = newdiv - 1;
  162. p->SM[submodule].VAL0 = (p->SM[submodule].VAL0 * newdiv) / olddiv;
  163. p->SM[submodule].VAL3 = (p->SM[submodule].VAL3 * newdiv) / olddiv;
  164. p->SM[submodule].VAL5 = (p->SM[submodule].VAL5 * newdiv) / olddiv;
  165. p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);
  166. }
  167. void quadtimerWrite(IMXRT_TMR_t *p, unsigned int submodule, uint16_t val)
  168. {
  169. uint32_t modulo = 65537 - p->CH[submodule].LOAD + p->CH[submodule].CMPLD1;
  170. uint32_t high = ((uint32_t)val * (modulo - 1)) >> analog_write_res;
  171. if (high >= modulo - 1) high = modulo - 2;
  172. //printf(" modulo=%lu\n", modulo);
  173. //printf(" high=%lu\n", high);
  174. uint32_t low = modulo - high; // low must 2 or higher
  175. //printf(" low=%lu\n", low);
  176. p->CH[submodule].LOAD = 65537 - low;
  177. p->CH[submodule].CMPLD1 = high;
  178. }
  179. void quadtimerFrequency(IMXRT_TMR_t *p, unsigned int submodule, float frequency)
  180. {
  181. uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5f);
  182. uint32_t prescale = 0;
  183. //printf(" div=%lu\n", newdiv);
  184. while (newdiv > 65534 && prescale < 7) {
  185. newdiv = newdiv >> 1;
  186. prescale = prescale + 1;
  187. }
  188. if (newdiv > 65534) {
  189. newdiv = 65534;
  190. } else if (newdiv < 2) {
  191. newdiv = 2;
  192. }
  193. //printf(" div=%lu, scale=%lu\n", newdiv, prescale);
  194. uint32_t oldhigh = p->CH[submodule].CMPLD1;
  195. uint32_t oldlow = 65537 - p->CH[submodule].LOAD;
  196. uint32_t high = (oldhigh * newdiv) / (oldhigh + oldlow);
  197. // TODO: low must never be less than 2 - can it happen with this?
  198. uint32_t low = newdiv - high;
  199. //printf(" high=%lu, low=%lu\n", high, low);
  200. p->CH[submodule].LOAD = 65537 - low;
  201. p->CH[submodule].CMPLD1 = high;
  202. p->CH[submodule].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8 + prescale) |
  203. TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);
  204. }
  205. void analogWrite(uint8_t pin, int val)
  206. {
  207. const struct pwm_pin_info_struct *info;
  208. if (pin >= CORE_NUM_DIGITAL) return;
  209. //printf("analogWrite, pin %d, val %d\n", pin, val);
  210. info = pwm_pin_info + pin;
  211. if (info->type == 1) {
  212. // FlexPWM pin
  213. IMXRT_FLEXPWM_t *flexpwm;
  214. switch ((info->module >> 4) & 3) {
  215. case 0: flexpwm = &IMXRT_FLEXPWM1; break;
  216. case 1: flexpwm = &IMXRT_FLEXPWM2; break;
  217. case 2: flexpwm = &IMXRT_FLEXPWM3; break;
  218. default: flexpwm = &IMXRT_FLEXPWM4;
  219. }
  220. flexpwmWrite(flexpwm, info->module & 0x03, info->channel, val);
  221. } else if (info->type == 2) {
  222. // QuadTimer pin
  223. IMXRT_TMR_t *qtimer;
  224. switch ((info->module >> 4) & 3) {
  225. case 0: qtimer = &IMXRT_TMR1; break;
  226. case 1: qtimer = &IMXRT_TMR2; break;
  227. case 2: qtimer = &IMXRT_TMR3; break;
  228. default: qtimer = &IMXRT_TMR4;
  229. }
  230. quadtimerWrite(qtimer, info->module & 0x03, val);
  231. } else {
  232. return;
  233. }
  234. *(portConfigRegister(pin)) = info->muxval;
  235. // TODO: pad config register
  236. }
  237. void analogWriteFrequency(uint8_t pin, float frequency)
  238. {
  239. const struct pwm_pin_info_struct *info;
  240. if (pin >= CORE_NUM_DIGITAL) return;
  241. //printf("analogWriteFrequency, pin %d, freq %d\n", pin, (int)frequency);
  242. info = pwm_pin_info + pin;
  243. if (info->type == 1) {
  244. // FlexPWM pin
  245. IMXRT_FLEXPWM_t *flexpwm;
  246. switch ((info->module >> 4) & 3) {
  247. case 0: flexpwm = &IMXRT_FLEXPWM1; break;
  248. case 1: flexpwm = &IMXRT_FLEXPWM2; break;
  249. case 2: flexpwm = &IMXRT_FLEXPWM3; break;
  250. default: flexpwm = &IMXRT_FLEXPWM4;
  251. }
  252. flexpwmFrequency(flexpwm, info->module & 0x03, info->channel, frequency);
  253. } else if (info->type == 2) {
  254. // QuadTimer pin
  255. IMXRT_TMR_t *qtimer;
  256. switch ((info->module >> 4) & 3) {
  257. case 0: qtimer = &IMXRT_TMR1; break;
  258. case 1: qtimer = &IMXRT_TMR2; break;
  259. case 2: qtimer = &IMXRT_TMR3; break;
  260. default: qtimer = &IMXRT_TMR4;
  261. }
  262. quadtimerFrequency(qtimer, info->module & 0x03, frequency);
  263. }
  264. }
  265. void flexpwm_init(IMXRT_FLEXPWM_t *p)
  266. {
  267. int i;
  268. p->FCTRL0 = FLEXPWM_FCTRL0_FLVL(15); // logic high = fault
  269. p->FSTS0 = 0x000F; // clear fault status
  270. p->FFILT0 = 0;
  271. p->MCTRL |= FLEXPWM_MCTRL_CLDOK(15);
  272. for (i=0; i < 4; i++) {
  273. p->SM[i].CTRL2 = FLEXPWM_SMCTRL2_INDEP | FLEXPWM_SMCTRL2_WAITEN
  274. | FLEXPWM_SMCTRL2_DBGEN;
  275. p->SM[i].CTRL = FLEXPWM_SMCTRL_FULL;
  276. p->SM[i].OCTRL = 0;
  277. p->SM[i].DTCNT0 = 0;
  278. p->SM[i].INIT = 0;
  279. p->SM[i].VAL0 = 0;
  280. p->SM[i].VAL1 = 33464;
  281. p->SM[i].VAL2 = 0;
  282. p->SM[i].VAL3 = 0;
  283. p->SM[i].VAL4 = 0;
  284. p->SM[i].VAL5 = 0;
  285. }
  286. p->MCTRL |= FLEXPWM_MCTRL_LDOK(15);
  287. p->MCTRL |= FLEXPWM_MCTRL_RUN(15);
  288. }
  289. void quadtimer_init(IMXRT_TMR_t *p)
  290. {
  291. int i;
  292. for (i=0; i < 4; i++) {
  293. p->CH[i].CTRL = 0; // stop timer
  294. p->CH[i].CNTR = 0;
  295. p->CH[i].SCTRL = TMR_SCTRL_OEN | TMR_SCTRL_OPS | TMR_SCTRL_VAL | TMR_SCTRL_FORCE;
  296. p->CH[i].CSCTRL = TMR_CSCTRL_CL1(1) | TMR_CSCTRL_ALT_LOAD;
  297. // COMP must be less than LOAD - otherwise output is always low
  298. p->CH[i].LOAD = 24000; // low time (65537 - x) -
  299. p->CH[i].COMP1 = 0; // high time (0 = always low, max = LOAD-1)
  300. p->CH[i].CMPLD1 = 0;
  301. p->CH[i].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8) |
  302. TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);
  303. }
  304. }
  305. void pwm_init(void)
  306. {
  307. //printf("pwm init\n");
  308. CCM_CCGR4 |= CCM_CCGR4_PWM1(CCM_CCGR_ON) | CCM_CCGR4_PWM2(CCM_CCGR_ON) |
  309. CCM_CCGR4_PWM3(CCM_CCGR_ON) | CCM_CCGR4_PWM4(CCM_CCGR_ON);
  310. CCM_CCGR6 |= CCM_CCGR6_QTIMER1(CCM_CCGR_ON) | CCM_CCGR6_QTIMER2(CCM_CCGR_ON) |
  311. CCM_CCGR6_QTIMER3(CCM_CCGR_ON) | CCM_CCGR6_QTIMER4(CCM_CCGR_ON);
  312. flexpwm_init(&IMXRT_FLEXPWM1);
  313. flexpwm_init(&IMXRT_FLEXPWM2);
  314. flexpwm_init(&IMXRT_FLEXPWM3);
  315. flexpwm_init(&IMXRT_FLEXPWM4);
  316. quadtimer_init(&IMXRT_TMR1);
  317. quadtimer_init(&IMXRT_TMR2);
  318. quadtimer_init(&IMXRT_TMR3);
  319. }
  320. void xbar_connect(unsigned int input, unsigned int output)
  321. {
  322. if (input >= 88) return;
  323. if (output >= 132) return;
  324. #if 1
  325. volatile uint16_t *xbar = &XBARA1_SEL0 + (output / 2);
  326. uint16_t val = *xbar;
  327. if (!(output & 1)) {
  328. val = (val & 0xFF00) | input;
  329. } else {
  330. val = (val & 0x00FF) | (input << 8);
  331. }
  332. *xbar = val;
  333. #else
  334. // does not work, seems 8 bit access is not allowed
  335. volatile uint8_t *xbar = (volatile uint8_t *)XBARA1_SEL0;
  336. xbar[output] = input;
  337. #endif
  338. }
  339. uint32_t analogWriteRes(uint32_t bits)
  340. {
  341. uint32_t prior;
  342. if (bits < 1) {
  343. bits = 1;
  344. } else if (bits > 16) {
  345. bits = 16;
  346. }
  347. prior = analog_write_res;
  348. analog_write_res = bits;
  349. return prior;
  350. }