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Merge pull request #1 from PaulStoffregen/master 

resync
teensy4-core
duff2013 10 lat temu
rodzic
7b040b4be0 c871fc1069
commit
021742f93b
3 zmienionych plików z 1491 dodań i 1088 usunięć
Widok podzielony Pokaż statystyki zmian
  1. +5
    -0
      teensy3/DMAChannel.cpp
  2. +536
    -138
      teensy3/DMAChannel.h
  3. +950
    -950
      teensy3/mk20dx128.h

+ 5
- 0
teensy3/DMAChannel.cpp Wyświetl plik

@@ -24,6 +24,11 @@ DMAChannel::DMAChannel(uint8_t channelRequest) : TCD(*(TCD_t *)0), channel(16)
}
channel = ch;
TCD = *(TCD_t *)(0x40009000 + ch * 32);
TCD.CSR = 0;
TCD.ATTR = 0;
TCD.NBYTES = 0;
TCD.BITER = 0;
TCD.CITER = 0;
SIM_SCGC7 |= SIM_SCGC7_DMA;
SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
DMA_CR = 0;

+ 536
- 138
teensy3/DMAChannel.h Wyświetl plik

@@ -4,6 +4,19 @@
#include "mk20dx128.h"

// This code is a work-in-progress. It's incomplete and not usable yet...
//
// http://forum.pjrc.com/threads/25778-Could-there-be-something-like-an-ISR-template-function/page3


// known libraries with DMA usage (in need of porting to this new scheme):
//
// https://github.com/PaulStoffregen/Audio
// https://github.com/PaulStoffregen/OctoWS2811
// https://github.com/pedvide/ADC
// https://github.com/duff2013/SerialEvent
// https://github.com/pixelmatix/SmartMatrix
// https://github.com/crteensy/DmaSpi


#ifdef __cplusplus

@@ -22,11 +35,21 @@ class DMAChannel {
volatile uint16_t BITER;
} TCD_t;
public:
/*************************************************/
/** Channel Allocation **/
/*************************************************/

// Constructor - allocates which DMA channel each object actually uses
DMAChannel(uint8_t channelRequest=0);
// TODO: should the copy constructor be private?


/***************************************/
/** Triggering **/
/***************************************/

// Triggers cause the DMA channel to actually move data.
//
// Use a hardware trigger to make the DMA channel run
void attachTrigger(uint8_t source) {
volatile uint8_t *mux;
@@ -34,18 +57,34 @@ public:
*mux = 0;
*mux = source | DMAMUX_ENABLE;
}

// Use another DMA channel as the trigger, causing this
// channel to trigger every time it triggers. This
// effectively makes the 2 channels run in parallel.
void attachTrigger(DMAChannel &channel) {

}

// Use another DMA channel as the trigger, causing this
// channel to trigger when it completes.
// channel to trigger when the other channel completes.
void attachTriggerOnCompletion(DMAChannel &channel) {

}

void attachTriggerContinuous(DMAChannel &channel) {

}

// Manually trigger the DMA channel.
void trigger(void) {

}


/***************************************/
/** Interrupts **/
/***************************************/

// An interrupt routine can be run when the DMA channel completes
// the entire transfer.
void attachInterrupt(void (*isr)(void)) {
@@ -53,172 +92,531 @@ public:
NVIC_ENABLE_IRQ(IRQ_DMA_CH0 + channel);
}

// Use a single variable as the data source. Typically a register
// for receiving data from one of the hardware peripherals is used.
void source(const signed char &p) { src(&p, 1); }
void source(const unsigned char &p) { src(&p, 1); }
void source(const signed short &p) { src(&p, 2); }
void source(const unsigned short &p) { src(&p, 2); }
void source(const signed int &p) { src(&p, 4); }
void source(const unsigned int &p) { src(&p, 4); }
void source(const signed long &p) { src(&p, 4); }
void source(const unsigned long &p) { src(&p, 4); }
void interruptAtHalf(void) {

// Use a buffer (array of data) as the data source. Typically a
// buffer for transmitting data is used.
void sourceBuffer(const signed char p[], unsigned int len) { src(p, 1, len); }
void sourceBuffer(const unsigned char p[], unsigned int len) { src(p, 1, len); }
void sourceBuffer(const signed short p[], unsigned int len) { src(p, 2, len); }
void sourceBuffer(const unsigned short p[], unsigned int len) { src(p, 2, len); }
void sourceBuffer(const signed int p[], unsigned int len) { src(p, 4, len); }
void sourceBuffer(const unsigned int p[], unsigned int len) { src(p, 4, len); }
void sourceBuffer(const signed long p[], unsigned int len) { src(p, 4, len); }
void sourceBuffer(const unsigned long p[], unsigned int len) { src(p, 4, len); }
}

// Use a circular buffer as the data source
void sourceCircular(const signed char p[], unsigned int len) { srcc(p, 1, len); }
void sourceCircular(const unsigned char p[], unsigned int len) { srcc(p, 1, len); }
void sourceCircular(const signed short p[], unsigned int len) { srcc(p, 2, len); }
void sourceCircular(const unsigned short p[], unsigned int len) { srcc(p, 2, len); }
void sourceCircular(const signed int p[], unsigned int len) { srcc(p, 4, len); }
void sourceCircular(const unsigned int p[], unsigned int len) { srcc(p, 4, len); }
void sourceCircular(const signed long p[], unsigned int len) { srcc(p, 4, len); }
void sourceCircular(const unsigned long p[], unsigned int len) { srcc(p, 4, len); }
void clearInterrupt(void) {


// Use a single variable as the data destination. Typically a register
// for transmitting data to one of the hardware peripherals is used.
void destination(signed char &p) { src(&p, 1); }
void destination(unsigned char &p) { src(&p, 1); }
void destination(signed short &p) { src(&p, 2); }
void destination(unsigned short &p) { src(&p, 2); }
void destination(signed int &p) { src(&p, 4); }
void destination(unsigned int &p) { src(&p, 4); }
void destination(signed long &p) { src(&p, 4); }
void destination(unsigned long &p) { src(&p, 4); }
}

// Use a buffer (array of data) as the data destination. Typically a
// buffer for receiving data is used.
void destinationBuffer(signed char p[], unsigned int len) { src(p, 1, len); }
void destinationBuffer(unsigned char p[], unsigned int len) { src(p, 1, len); }
void destinationBuffer(signed short p[], unsigned int len) { src(p, 2, len); }
void destinationBuffer(unsigned short p[], unsigned int len) { src(p, 2, len); }
void destinationBuffer(signed int p[], unsigned int len) { src(p, 4, len); }
void destinationBuffer(unsigned int p[], unsigned int len) { src(p, 4, len); }
void destinationBuffer(signed long p[], unsigned int len) { src(p, 4, len); }
void destinationBuffer(unsigned long p[], unsigned int len) { src(p, 4, len); }

// Use a circular buffer as the data destination
void destinationCircular(signed char p[], unsigned int len) { srcc(p, 1, len); }
void destinationCircular(unsigned char p[], unsigned int len) { srcc(p, 1, len); }
void destinationCircular(signed short p[], unsigned int len) { srcc(p, 2, len); }
void destinationCircular(unsigned short p[], unsigned int len) { srcc(p, 2, len); }
void destinationCircular(signed int p[], unsigned int len) { srcc(p, 4, len); }
void destinationCircular(unsigned int p[], unsigned int len) { srcc(p, 4, len); }
void destinationCircular(signed long p[], unsigned int len) { srcc(p, 4, len); }
void destinationCircular(unsigned long p[], unsigned int len) { srcc(p, 4, len); }

// TODO: explicit function for configuring transfer length....
// should we try to automatically pick it up from the array lengths?

// TODO: functions to configure major/minor loop
// option #1 - trigger moves 1 byte/word (minor=1, major=count)
// option #2 - trigger moves all data (minor=count, major=1)
// option ?? - more complex config, write TCD manually....

// TODO: functions to set other options, functions to enable
// manual start function, etc
/***************************************/
/** Enable / Disable **/
/***************************************/

// TODO: "get" functions, to read important stuff, like SADDR & DADDR...
void enable(void) {

// For complex and unusual configurations not possible with the above
// functions, the Transfer Control Descriptor (TCD) and channel number
// can be used directly. This leads to less portable and less readable
// code, but direct control of all parameters is possible.
TCD_t &TCD;
uint8_t channel;
}

protected:
void src(const void *p, uint32_t size) {
TCD.SADDR = p;
void disable(void) {

}

void disableOnCompletion(void) {

}


/***************************************/
/** Data Transfer **/
/***************************************/

// Use a single variable as the data source. Typically a register
// for receiving data from one of the hardware peripherals is used.
void source(const signed char &p) { source(*(const uint8_t *)&p); }
void source(const unsigned char &p) {
TCD.SADDR = &p;
TCD.SOFF = 0;
if (size == 1) {
TCD.ATTR_SRC = 0; // 8 bits
} else if (size == 2) {
TCD.ATTR_SRC = 1; // 16 bits
} else {
TCD.ATTR_SRC = 2; // 32 bits
}
//TCD.NBYTES = size;
TCD.ATTR_SRC = 0;
if ((uint32_t)p < 0x40000000 || TCD.NBYTES == 0) TCD.NBYTES = 1;
TCD.SLAST = 0;
}
void src(const void *p, uint32_t size, uint32_t len) {
void source(const signed short &p) { source(*(const uint16_t *)&p); }
void source(const unsigned short &p) {
TCD.SADDR = &p;
TCD.SOFF = 0;
TCD.ATTR_SRC = 1;
if ((uint32_t)p < 0x40000000 || TCD.NBYTES == 0) TCD.NBYTES = 2;
TCD.SLAST = 0;
}
void source(const signed int &p) { source(*(const uint32_t *)&p); }
void source(const unsigned int &p) { source(*(const uint32_t *)&p); }
void source(const signed long &p) { source(*(const uint32_t *)&p); }
void source(const unsigned long &p) {
TCD.SADDR = &p;
TCD.SOFF = 0;
TCD.ATTR_SRC = 2;
if ((uint32_t)p < 0x40000000 || TCD.NBYTES == 0) TCD.NBYTES = 4;
TCD.SLAST = 0;
}

// Use a buffer (array of data) as the data source. Typically a
// buffer for transmitting data is used.
void sourceBuffer(const signed char p[], unsigned int len) { sourceBuffer((uint8_t *)p, len); }
void sourceBuffer(const unsigned char p[], unsigned int len) {
TCD.SADDR = p;
TCD.SOFF = size;
if (size == 1) {
TCD.ATTR_SRC = 0; // 8 bits
} else if (size == 2) {
TCD.ATTR_SRC = 1; // 16 bits
} else {
TCD.ATTR_SRC = 2; // 32 bits
}
//TCD.NBYTES = size;
TCD.SOFF = 1;
TCD.ATTR_SRC = 0;
TCD.NBYTES = 1;
TCD.SLAST = -len;
TCD.BITER = len;
TCD.CITER = len;
}
void srcc(const void *p, uint32_t size, uint32_t len) {
void sourceBuffer(const signed short p[], unsigned int len) { sourceBuffer((uint16_t *)p, len); }
void sourceBuffer(const unsigned short p[], unsigned int len) {
TCD.SADDR = p;
TCD.SOFF = size;
if (size == 1) {
TCD.ATTR_SRC = 0 | ((31 - __builtin_clz(len)) << 3); // 8 bits
} else if (size == 2) {
TCD.ATTR_SRC = 1 | ((31 - __builtin_clz(len)) << 3); // 16 bits
} else {
TCD.ATTR_SRC = 2 | ((31 - __builtin_clz(len)) << 3); // 32 bits
}
//TCD.NBYTES = size;
TCD.SOFF = 2;
TCD.ATTR_SRC = 1;
TCD.NBYTES = 2;
TCD.SLAST = -len;
TCD.BITER = len / 2;
TCD.CITER = len / 2;
}
void sourceBuffer(const signed int p[], unsigned int len) { sourceBuffer((uint32_t *)p, len); }
void sourceBuffer(const unsigned int p[], unsigned int len) {sourceBuffer((uint32_t *)p, len); }
void sourceBuffer(const signed long p[], unsigned int len) { sourceBuffer((uint32_t *)p, len); }
void sourceBuffer(const unsigned long p[], unsigned int len) {
TCD.SADDR = p;
TCD.SOFF = 4;
TCD.ATTR_SRC = 2;
TCD.NBYTES = 4;
TCD.SLAST = -len;
TCD.BITER = len / 4;
TCD.CITER = len / 4;
}

// Use a circular buffer as the data source
void sourceCircular(const signed char p[], unsigned int len) { sourceCircular((uint8_t *)p, len); }
void sourceCircular(const unsigned char p[], unsigned int len) {
TCD.SADDR = p;
TCD.SOFF = 1;
TCD.ATTR_SRC = ((31 - __builtin_clz(len)) << 3);
TCD.NBYTES = 1;
TCD.SLAST = 0;
TCD.BITER = len;
TCD.CITER = len;
}
void sourceCircular(const signed short p[], unsigned int len) { sourceCircular((uint16_t *)p, len); }
void sourceCircular(const unsigned short p[], unsigned int len) {
TCD.SADDR = p;
TCD.SOFF = 2;
TCD.ATTR_SRC = ((31 - __builtin_clz(len)) << 3) | 1;
TCD.NBYTES = 2;
TCD.SLAST = 0;
TCD.BITER = len / 2;
TCD.CITER = len / 2;
}
void sourceCircular(const signed int p[], unsigned int len) { sourceCircular((uint32_t *)p, len); }
void sourceCircular(const unsigned int p[], unsigned int len) { sourceCircular((uint32_t *)p, len); }
void sourceCircular(const signed long p[], unsigned int len) { sourceCircular((uint32_t *)p, len); }
void sourceCircular(const unsigned long p[], unsigned int len) {
TCD.SADDR = p;
TCD.SOFF = 4;
TCD.ATTR_SRC = ((31 - __builtin_clz(len)) << 3) | 2;
TCD.NBYTES = 4;
TCD.SLAST = 0;
TCD.BITER = len / 4;
TCD.CITER = len / 4;
}

void dst(void *p, uint32_t size) {
TCD.DADDR = p;
// Use a single variable as the data destination. Typically a register
// for transmitting data to one of the hardware peripherals is used.
void destination(signed char &p) { destination(*(uint8_t *)&p); }
void destination(unsigned char &p) {
TCD.DADDR = &p;
TCD.DOFF = 0;
if (size == 1) {
TCD.ATTR_SRC = 0; // 8 bits
} else if (size == 2) {
TCD.ATTR_SRC = 1; // 16 bits
} else {
TCD.ATTR_SRC = 2; // 32 bits
}
//TCD.NBYTES = size;
TCD.ATTR_DST = 0;
if ((uint32_t)p < 0x40000000 || TCD.NBYTES == 0) TCD.NBYTES = 1;
TCD.DLASTSGA = 0;
}
void dst(void *p, uint32_t size, uint32_t len) {
void destination(signed short &p) { destination(*(uint16_t *)&p); }
void destination(unsigned short &p) {
TCD.DADDR = &p;
TCD.DOFF = 0;
TCD.ATTR_DST = 1;
if ((uint32_t)p < 0x40000000 || TCD.NBYTES == 0) TCD.NBYTES = 2;
TCD.DLASTSGA = 0;
}
void destination(signed int &p) { destination(*(uint32_t *)&p); }
void destination(unsigned int &p) { destination(*(uint32_t *)&p); }
void destination(signed long &p) { destination(*(uint32_t *)&p); }
void destination(unsigned long &p) {
TCD.DADDR = &p;
TCD.DOFF = 0;
TCD.ATTR_DST = 2;
if ((uint32_t)p < 0x40000000 || TCD.NBYTES == 0) TCD.NBYTES = 4;
TCD.DLASTSGA = 0;
}

// Use a buffer (array of data) as the data destination. Typically a
// buffer for receiving data is used.
void destinationBuffer(signed char p[], unsigned int len) { destinationBuffer((uint8_t *)p, len); }
void destinationBuffer(unsigned char p[], unsigned int len) {
TCD.DADDR = p;
TCD.DOFF = size;
if (size == 1) {
TCD.ATTR_DST = 0; // 8 bits
} else if (size == 2) {
TCD.ATTR_DST = 1; // 16 bits
} else {
TCD.ATTR_DST = 2; // 32 bits
}
//TCD.NBYTES = size;
TCD.DOFF = 1;
TCD.ATTR_DST = 0;
TCD.NBYTES = 1;
TCD.DLASTSGA = -len;
TCD.BITER = len;
TCD.CITER = len;
}
void dstc(void *p, uint32_t size, uint32_t len) {
void destinationBuffer(signed short p[], unsigned int len) { destinationBuffer((uint16_t *)p, len); }
void destinationBuffer(unsigned short p[], unsigned int len) {
TCD.DADDR = p;
TCD.DOFF = size;
if (size == 1) {
TCD.ATTR_DST = 0 | ((31 - __builtin_clz(len)) << 3); // 8 bits
} else if (size == 2) {
TCD.ATTR_DST = 1 | ((31 - __builtin_clz(len)) << 3); // 16 bits
TCD.DOFF = 2;
TCD.ATTR_DST = 1;
TCD.NBYTES = 2;
TCD.DLASTSGA = -len;
TCD.BITER = len / 2;
TCD.CITER = len / 2;
}
void destinationBuffer(signed int p[], unsigned int len) { destinationBuffer((uint32_t *)p, len); }
void destinationBuffer(unsigned int p[], unsigned int len) { destinationBuffer((uint32_t *)p, len); }
void destinationBuffer(signed long p[], unsigned int len) { destinationBuffer((uint32_t *)p, len); }
void destinationBuffer(unsigned long p[], unsigned int len) {
TCD.DADDR = p;
TCD.DOFF = 4;
TCD.ATTR_DST = 1;
TCD.NBYTES = 4;
TCD.DLASTSGA = -len;
TCD.BITER = len / 4;
TCD.CITER = len / 4;
}

// Use a circular buffer as the data destination
void destinationCircular(signed char p[], unsigned int len) { destinationCircular((uint8_t *)p, len); }
void destinationCircular(unsigned char p[], unsigned int len) {
TCD.DADDR = p;
TCD.DOFF = 1;
TCD.ATTR_DST = ((31 - __builtin_clz(len)) << 3);
TCD.NBYTES = 1;
TCD.DLASTSGA = 0;
TCD.BITER = len;
TCD.CITER = len;
}
void destinationCircular(signed short p[], unsigned int len) { destinationCircular((uint16_t *)p, len); }
void destinationCircular(unsigned short p[], unsigned int len) {
TCD.DADDR = p;
TCD.DOFF = 2;
TCD.ATTR_DST = ((31 - __builtin_clz(len)) << 3) | 1;
TCD.NBYTES = 2;
TCD.DLASTSGA = 0;
TCD.BITER = len / 2;
TCD.CITER = len / 2;
}
void destinationCircular(signed int p[], unsigned int len) { destinationCircular((uint32_t *)p, len); }
void destinationCircular(unsigned int p[], unsigned int len) { destinationCircular((uint32_t *)p, len); }
void destinationCircular(signed long p[], unsigned int len) { destinationCircular((uint32_t *)p, len); }
void destinationCircular(unsigned long p[], unsigned int len) {
TCD.DADDR = p;
TCD.DOFF = 4;
TCD.ATTR_DST = ((31 - __builtin_clz(len)) << 3) | 2;
TCD.NBYTES = 4;
TCD.DLASTSGA = 0;
TCD.BITER = len / 4;
TCD.CITER = len / 4;
}

// Set the data size used for each triggered transfer
void size(unsigned int len) {
if (len == 4) {
TCD.NBYTES = 4;
if (TCD.SOFF != 0) TCD.SOFF = 4;
if (TCD.DOFF != 0) TCD.DOFF = 4;
TCD.ATTR = (TCD.ATTR & 0xF8F8) | 0x0202;
} else if (len == 2) {
TCD.NBYTES = 2;
if (TCD.SOFF != 0) TCD.SOFF = 2;
if (TCD.DOFF != 0) TCD.DOFF = 2;
TCD.ATTR = (TCD.ATTR & 0xF8F8) | 0x0101;
} else {
TCD.ATTR_DST = 2 | ((31 - __builtin_clz(len)) << 3); // 32 bits
TCD.NBYTES = 1;
if (TCD.SOFF != 0) TCD.SOFF = 1;
if (TCD.DOFF != 0) TCD.DOFF = 1;
TCD.ATTR = TCD.ATTR & 0xF8F8;
}
}

// Set the number of transfers (number of triggers until complete)
void count(unsigned int len) {
if (len > 32767) return;
if (len >= 512) {
TCD.BITER = len;
TCD.CITER = len;
} else {
TCD.BITER = (TCD.BITER & 0xFE00) | len;
TCD.CITER = (TCD.CITER & 0xFE00) | len;
}
//TCD.NBYTES = size;
TCD.DLASTSGA = 0;
}


/***************************************/
/** Status **/
/***************************************/

// TODO: "get" functions, to read important stuff, like SADDR & DADDR...
// error status, etc

/***************************************/
/** Direct Hardware Access **/
/***************************************/

// For complex and unusual configurations not possible with the above
// functions, the Transfer Control Descriptor (TCD) and channel number
// can be used directly. This leads to less portable and less readable
// code, but direct control of all parameters is possible.
TCD_t &TCD;
uint8_t channel;

/* usage cases:

************************
OctoWS2811:
************************

// enable clocks to the DMA controller and DMAMUX
SIM_SCGC7 |= SIM_SCGC7_DMA;
SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
DMA_CR = 0;
DMA_CERQ = 1;
DMA_CERQ = 2;
DMA_CERQ = 3;

// DMA channel #1 sets WS2811 high at the beginning of each cycle
DMA_TCD1_SADDR = &ones;
DMA_TCD1_SOFF = 0;
DMA_TCD1_ATTR = DMA_TCD_ATTR_SSIZE(0) | DMA_TCD_ATTR_DSIZE(0);
DMA_TCD1_NBYTES_MLNO = 1;
DMA_TCD1_SLAST = 0;
DMA_TCD1_DADDR = &GPIOD_PSOR;
DMA_TCD1_DOFF = 0;
DMA_TCD1_CITER_ELINKNO = bufsize;
DMA_TCD1_DLASTSGA = 0;
DMA_TCD1_CSR = DMA_TCD_CSR_DREQ;
DMA_TCD1_BITER_ELINKNO = bufsize;
dma1.source(ones);
dma1.destination(GPIOD_PSOR);
dma1.size(1);
dma1.count(bufsize);

// DMA channel #2 writes the pixel data at 20% of the cycle
DMA_TCD2_SADDR = frameBuffer;
DMA_TCD2_SOFF = 1;
DMA_TCD2_ATTR = DMA_TCD_ATTR_SSIZE(0) | DMA_TCD_ATTR_DSIZE(0);
DMA_TCD2_NBYTES_MLNO = 1;
DMA_TCD2_SLAST = -bufsize;
DMA_TCD2_DADDR = &GPIOD_PDOR;
DMA_TCD2_DOFF = 0;
DMA_TCD2_CITER_ELINKNO = bufsize;
DMA_TCD2_DLASTSGA = 0;
DMA_TCD2_CSR = DMA_TCD_CSR_DREQ;
DMA_TCD2_BITER_ELINKNO = bufsize;
dma2.source(frameBuffer, sizeof(frameBuffer));
dma2.destination(GPIOD_PDOR);

// DMA channel #3 clear all the pins low at 48% of the cycle
DMA_TCD3_SADDR = &ones;
DMA_TCD3_SOFF = 0;
DMA_TCD3_ATTR = DMA_TCD_ATTR_SSIZE(0) | DMA_TCD_ATTR_DSIZE(0);
DMA_TCD3_NBYTES_MLNO = 1;
DMA_TCD3_SLAST = 0;
DMA_TCD3_DADDR = &GPIOD_PCOR;
DMA_TCD3_DOFF = 0;
DMA_TCD3_CITER_ELINKNO = bufsize;
DMA_TCD3_DLASTSGA = 0;
DMA_TCD3_CSR = DMA_TCD_CSR_DREQ | DMA_TCD_CSR_INTMAJOR;
DMA_TCD3_BITER_ELINKNO = bufsize;

************************
Audio, DAC
************************

DMA_CR = 0;
DMA_TCD4_SADDR = dac_buffer;
DMA_TCD4_SOFF = 2;
DMA_TCD4_ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
DMA_TCD4_NBYTES_MLNO = 2;
DMA_TCD4_SLAST = -sizeof(dac_buffer);
DMA_TCD4_DADDR = &DAC0_DAT0L;
DMA_TCD4_DOFF = 0;
DMA_TCD4_CITER_ELINKNO = sizeof(dac_buffer) / 2;
DMA_TCD4_DLASTSGA = 0;
DMA_TCD4_BITER_ELINKNO = sizeof(dac_buffer) / 2;
DMA_TCD4_CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
DMAMUX0_CHCFG4 = DMAMUX_DISABLE;
DMAMUX0_CHCFG4 = DMAMUX_SOURCE_PDB | DMAMUX_ENABLE;

************************
Audio, I2S
************************

DMA_CR = 0;
DMA_TCD0_SADDR = i2s_tx_buffer;
DMA_TCD0_SOFF = 2;
DMA_TCD0_ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
DMA_TCD0_NBYTES_MLNO = 2;
DMA_TCD0_SLAST = -sizeof(i2s_tx_buffer);
DMA_TCD0_DADDR = &I2S0_TDR0;
DMA_TCD0_DOFF = 0;
DMA_TCD0_CITER_ELINKNO = sizeof(i2s_tx_buffer) / 2;
DMA_TCD0_DLASTSGA = 0;
DMA_TCD0_BITER_ELINKNO = sizeof(i2s_tx_buffer) / 2;
DMA_TCD0_CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;

DMAMUX0_CHCFG0 = DMAMUX_DISABLE;
DMAMUX0_CHCFG0 = DMAMUX_SOURCE_I2S0_TX | DMAMUX_ENABLE;

************************
ADC lib, Pedro Villanueva
************************

DMA_CR = 0; // normal mode of operation

*DMAMUX0_CHCFG = DMAMUX_DISABLE; // disable before changing

*DMA_TCD_ATTR = DMA_TCD_ATTR_SSIZE(DMA_TCD_ATTR_SIZE_16BIT) |
DMA_TCD_ATTR_DSIZE(DMA_TCD_ATTR_SIZE_16BIT) |
DMA_TCD_ATTR_DMOD(4); // src and dst data is 16 bit (2 bytes), buffer size 2^^4 bytes = 8 values
*DMA_TCD_NBYTES_MLNO = 2; // Minor Byte Transfer Count 2 bytes = 16 bits (we transfer 2 bytes each minor loop)

*DMA_TCD_SADDR = ADC_RA; // source address
*DMA_TCD_SOFF = 0; // don't change the address when minor loop finishes
*DMA_TCD_SLAST = 0; // don't change src address after major loop completes

*DMA_TCD_DADDR = elems; // destination address
*DMA_TCD_DOFF = 2; // increment 2 bytes each minor loop
*DMA_TCD_DLASTSGA = 0; // modulus feature takes care of going back to first element

*DMA_TCD_CITER_ELINKNO = 1; // Current Major Iteration Count with channel linking disabled
*DMA_TCD_BITER_ELINKNO = 1; // Starting Major Iteration Count with channel linking disabled

*DMA_TCD_CSR = DMA_TCD_CSR_INTMAJOR; // Control and status: interrupt when major counter is complete

DMA_CERQ = DMA_CERQ_CERQ(DMA_channel); // clear all past request
DMA_CINT = DMA_channel; // clear interrupts

uint8_t DMAMUX_SOURCE_ADC = DMAMUX_SOURCE_ADC0;
if(ADC_number==1){
DMAMUX_SOURCE_ADC = DMAMUX_SOURCE_ADC1;
}
*DMAMUX0_CHCFG = DMAMUX_SOURCE_ADC | DMAMUX_ENABLE; // enable mux and set channel DMA_channel to ADC0

DMA_SERQ = DMA_SERQ_SERQ(DMA_channel); // enable DMA request
NVIC_ENABLE_IRQ(IRQ_DMA_CH); // enable interrupts

************************
SmartMatrix
************************

// enable minor loop mapping so addresses can get reset after minor loops
DMA_CR = 1 << 7;

// DMA channel #0 - on latch rising edge, read address from fixed address temporary buffer, and output address on GPIO
// using combo of writes to set+clear registers, to only modify the address pins and not other GPIO pins
// address temporary buffer is refreshed before each DMA trigger (by DMA channel #2)
// only use single major loop, never disable channel
#define ADDRESS_ARRAY_REGISTERS_TO_UPDATE 2
DMA_TCD0_SADDR = &gpiosync.gpio_pcor;
DMA_TCD0_SOFF = (int)&gpiosync.gpio_psor - (int)&gpiosync.gpio_pcor;
DMA_TCD0_SLAST = (ADDRESS_ARRAY_REGISTERS_TO_UPDATE * ((int)&ADDX_GPIO_CLEAR_REGISTER - (int)&ADDX_GPIO_SET_REGISTER));
DMA_TCD0_ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2);
// Destination Minor Loop Offset Enabled - transfer appropriate number of bytes per minor loop, and put DADDR back to original value when minor loop is complete
// Source Minor Loop Offset Enabled - source buffer is same size and offset as destination so values reset after each minor loop
DMA_TCD0_NBYTES_MLOFFYES = DMA_TCD_NBYTES_SMLOE | DMA_TCD_NBYTES_DMLOE |
((ADDRESS_ARRAY_REGISTERS_TO_UPDATE * ((int)&ADDX_GPIO_CLEAR_REGISTER - (int)&ADDX_GPIO_SET_REGISTER)) << 10) |
(ADDRESS_ARRAY_REGISTERS_TO_UPDATE * sizeof(gpiosync.gpio_psor));
// start on higher value of two registers, and make offset decrement to avoid negative number in NBYTES_MLOFFYES (TODO: can switch order by masking negative offset)
DMA_TCD0_DADDR = &ADDX_GPIO_CLEAR_REGISTER;
// update destination address so the second update per minor loop is ADDX_GPIO_SET_REGISTER
DMA_TCD0_DOFF = (int)&ADDX_GPIO_SET_REGISTER - (int)&ADDX_GPIO_CLEAR_REGISTER;
DMA_TCD0_DLASTSGA = (ADDRESS_ARRAY_REGISTERS_TO_UPDATE * ((int)&ADDX_GPIO_CLEAR_REGISTER - (int)&ADDX_GPIO_SET_REGISTER));
// single major loop
DMA_TCD0_CITER_ELINKNO = 1;
DMA_TCD0_BITER_ELINKNO = 1;
// link channel 1, enable major channel-to-channel linking, don't clear enable on major loop complete
DMA_TCD0_CSR = (1 << 8) | (1 << 5);
DMAMUX0_CHCFG0 = DMAMUX_SOURCE_LATCH_RISING_EDGE | DMAMUX_ENABLE;

// DMA channel #1 - copy address values from current position in array to buffer to temporarily hold row values for the next timer cycle
// only use single major loop, never disable channel
DMA_TCD1_SADDR = &matrixUpdateBlocks[0][0].addressValues;
DMA_TCD1_SOFF = sizeof(uint16_t);
DMA_TCD1_SLAST = sizeof(matrixUpdateBlock) - (ADDRESS_ARRAY_REGISTERS_TO_UPDATE * sizeof(uint16_t));
DMA_TCD1_ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
// 16-bit = 2 bytes transferred
// transfer two 16-bit values, reset destination address back after each minor loop
DMA_TCD1_NBYTES_MLOFFNO = (ADDRESS_ARRAY_REGISTERS_TO_UPDATE * sizeof(uint16_t));
// start with the register that's the highest location in memory and make offset decrement to avoid negative number in NBYTES_MLOFFYES register (TODO: can switch order by masking negative offset)
DMA_TCD1_DADDR = &gpiosync.gpio_pcor;
DMA_TCD1_DOFF = (int)&gpiosync.gpio_psor - (int)&gpiosync.gpio_pcor;
DMA_TCD1_DLASTSGA = (ADDRESS_ARRAY_REGISTERS_TO_UPDATE * ((int)&gpiosync.gpio_pcor - (int)&gpiosync.gpio_psor));
// no minor loop linking, single major loop, single minor loop, don't clear enable after major loop complete
DMA_TCD1_CITER_ELINKNO = 1;
DMA_TCD1_BITER_ELINKNO = 1;
DMA_TCD1_CSR = 0;

// DMA channel #2 - on latch falling edge, load FTM1_CV1 and FTM1_MOD with with next values from current block
// only use single major loop, never disable channel
// link to channel 3 when complete
#define TIMER_REGISTERS_TO_UPDATE 2
DMA_TCD2_SADDR = &matrixUpdateBlocks[0][0].timerValues.timer_oe;
DMA_TCD2_SOFF = sizeof(uint16_t);
DMA_TCD2_SLAST = sizeof(matrixUpdateBlock) - (TIMER_REGISTERS_TO_UPDATE * sizeof(uint16_t));
DMA_TCD2_ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
// 16-bit = 2 bytes transferred
DMA_TCD2_NBYTES_MLOFFNO = TIMER_REGISTERS_TO_UPDATE * sizeof(uint16_t);
DMA_TCD2_DADDR = &FTM1_C1V;
DMA_TCD2_DOFF = (int)&FTM1_MOD - (int)&FTM1_C1V;
DMA_TCD2_DLASTSGA = TIMER_REGISTERS_TO_UPDATE * ((int)&FTM1_C1V - (int)&FTM1_MOD);
// no minor loop linking, single major loop
DMA_TCD2_CITER_ELINKNO = 1;
DMA_TCD2_BITER_ELINKNO = 1;
// link channel 3, enable major channel-to-channel linking, don't clear enable after major loop complete
DMA_TCD2_CSR = (3 << 8) | (1 << 5);
DMAMUX0_CHCFG2 = DMAMUX_SOURCE_LATCH_FALLING_EDGE | DMAMUX_ENABLE;

#define DMA_TCD_MLOFF_MASK (0x3FFFFC00)

// DMA channel #3 - repeatedly load gpio_array into GPIOD_PDOR, stop and int on major loop complete
DMA_TCD3_SADDR = matrixUpdateData[0][0];
DMA_TCD3_SOFF = sizeof(matrixUpdateData[0][0]) / 2;
// SADDR will get updated by ISR, no need to set SLAST
DMA_TCD3_SLAST = 0;
DMA_TCD3_ATTR = DMA_TCD_ATTR_SSIZE(0) | DMA_TCD_ATTR_DSIZE(0);
// after each minor loop, set source to point back to the beginning of this set of data,
// but advance by 1 byte to get the next significant bits data
DMA_TCD3_NBYTES_MLOFFYES = DMA_TCD_NBYTES_SMLOE |
(((1 - sizeof(matrixUpdateData[0])) << 10) & DMA_TCD_MLOFF_MASK) |
(MATRIX_WIDTH * DMA_UPDATES_PER_CLOCK);
DMA_TCD3_DADDR = &GPIOD_PDOR;
DMA_TCD3_DOFF = 0;
DMA_TCD3_DLASTSGA = 0;
DMA_TCD3_CITER_ELINKNO = LATCHES_PER_ROW;
DMA_TCD3_BITER_ELINKNO = LATCHES_PER_ROW;
// int after major loop is complete
DMA_TCD3_CSR = DMA_TCD_CSR_INTMAJOR;
// for debugging - enable bandwidth control (space out GPIO updates so they can be seen easier on a low-bandwidth logic analyzer)
//DMA_TCD3_CSR |= (0x02 << 14);

// enable a done interrupt when all DMA operations are complete
NVIC_ENABLE_IRQ(IRQ_DMA_CH3);

// enable additional dma interrupt used as software interrupt
NVIC_SET_PRIORITY(IRQ_DMA_CH1, 0xFF); // 0xFF = lowest priority
NVIC_ENABLE_IRQ(IRQ_DMA_CH1);

// enable channels 0, 1, 2, 3
DMA_ERQ = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3);

// at the end after everything is set up: enable timer from system clock, with appropriate prescale
FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(LATCH_TIMER_PRESCALE);


*/


};



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