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Pin 32 is default SCK1 not pin 20
Earlier I had pin 20 as the default SCK1, but card shows that pin 32 is the default pinteensy4-core
Kurt Eckhardt
8 years ago
1 changed files with 6 additions and 6 deletions
+ 6
- 6
teensy3/avr_emulation.h
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| // More options, so 2 bits | // More options, so 2 bits | ||||
| pinout &= ~0x30; | pinout &= ~0x30; | ||||
| switch (pin) { | switch (pin) { | ||||
| case 20: break; | |||||
| case 32: pinout |= 0x10; break; | |||||
| case 32: break; | |||||
| case 20: pinout |= 0x10; break; | |||||
| case 60: pinout |= 0x20; break; | case 60: pinout |= 0x20; break; | ||||
| } | } | ||||
| } | } | ||||
| } | } | ||||
| // SCK | // SCK | ||||
| switch (pinout & 0x30) { | switch (pinout & 0x30) { | ||||
| case 0x0: CORE_PIN20_CONFIG = PORT_PCR_MUX(7); break; | |||||
| case 0x10: CORE_PIN32_CONFIG = PORT_PCR_MUX(2); break; | |||||
| case 0x0: CORE_PIN32_CONFIG = PORT_PCR_MUX(2); break; | |||||
| case 0x10: CORE_PIN20_CONFIG = PORT_PCR_MUX(7); break; | |||||
| case 0x20: CORE_PIN60_CONFIG = PORT_PCR_MUX(2); break; | case 0x20: CORE_PIN60_CONFIG = PORT_PCR_MUX(2); break; | ||||
| } | } | ||||
| } | } | ||||
| case 0xc: CORE_PIN59_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | case 0xc: CORE_PIN59_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | ||||
| } | } | ||||
| switch (pinout & 0x30) { | switch (pinout & 0x30) { | ||||
| case 0x0: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | |||||
| case 0x10: CORE_PIN32_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | |||||
| case 0x0: CORE_PIN32_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | |||||
| case 0x10: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | |||||
| case 0x20: CORE_PIN60_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | case 0x20: CORE_PIN60_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; | ||||
| } | } | ||||
| } | } |
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