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@@ -113,15 +113,15 @@ extern const struct digital_pin_bitband_and_config_table_struct digital_pin_to_i |
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#define digitalPinToPort(pin) (pin) |
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#define digitalPinToBitMask(pin) (digital_pin_to_info_PGM[(pin)].mask) |
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#define portOutputRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 0)) |
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#define portSetRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 4)) |
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#define portClearRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 8)) |
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#define portToggleRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 12)) |
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#define portInputRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 16)) |
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#define portModeRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 20)) |
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#define portSetRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 33)) |
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#define portClearRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 34)) |
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#define portToggleRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 35)) |
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#define portInputRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 2)) |
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#define portModeRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 1)) |
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#define portConfigRegister(pin) ((digital_pin_to_info_PGM[(pin)].mux)) |
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#define portControlRegister(pin) ((digital_pin_to_info_PGM[(pin)].pad)) |
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#define digitalPinToPortReg(pin) (portOutputRegister(pin)) |
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#define digitalPinToBit(pin) // TODO, is this needed? |
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#define digitalPinToBit(pin) (__builtin_ctz(digitalPinToBitMask(pin))) |
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#define NOT_ON_TIMER 0 |