| @@ -1921,16 +1921,27 @@ enum IRQ_NUMBER_t { | |||
| #define FTM2_CONF (*(volatile uint32_t *)0x4003A084) // Configuration | |||
| #endif | |||
| // Chapter 36: Periodic Interrupt Timer (PIT) | |||
| // Chapter 36 (3.1)/Chapter 32 (LC): Periodic Interrupt Timer (PIT) | |||
| #define PIT_MCR (*(volatile uint32_t *)0x40037000) // PIT Module Control Register | |||
| #define PIT_MCR_MDIS (1<<1) // Module disable | |||
| #define PIT_MCR_FRZ (1<<0) // Freeze | |||
| #if defined(KINETISL) | |||
| #define PIT_LTMR64H (*(volatile uint32_t *)0x400370E0) // PIT Upper Lifetime Timer Register | |||
| #define PIT_LTMR64L (*(volatile uint32_t *)0x400370E4) // PIT Lower Lifetime Timer Register | |||
| #endif // defined(KINETISL) | |||
| #define PIT_LDVAL0 (*(volatile uint32_t *)0x40037100) // Timer Load Value Register | |||
| #define PIT_CVAL0 (*(volatile uint32_t *)0x40037104) // Current Timer Value Register | |||
| #define PIT_TCTRL0 (*(volatile uint32_t *)0x40037108) // Timer Control Register | |||
| #define PIT_TCTRL_CHN (1<<2) // Chain Mode | |||
| #define PIT_TCTRL_TIE (1<<1) // Timer Interrupt Enable | |||
| #define PIT_TCTRL_TEN (1<<0) // Timer Enable | |||
| #define PIT_TFLG0 (*(volatile uint32_t *)0x4003710C) // Timer Flag Register | |||
| #define PIT_TFLG_TIF (1<<0) // Timer Interrupt Flag (write 1 to clear) | |||
| #define PIT_LDVAL1 (*(volatile uint32_t *)0x40037110) // Timer Load Value Register | |||
| #define PIT_CVAL1 (*(volatile uint32_t *)0x40037114) // Current Timer Value Register | |||
| #define PIT_TCTRL1 (*(volatile uint32_t *)0x40037118) // Timer Control Register | |||
| #define PIT_TFLG1 (*(volatile uint32_t *)0x4003711C) // Timer Flag Register | |||
| #if defined(KINETISK) // the 3.1 has 4 PITs, LC has only 2 | |||
| #define PIT_LDVAL2 (*(volatile uint32_t *)0x40037120) // Timer Load Value Register | |||
| #define PIT_CVAL2 (*(volatile uint32_t *)0x40037124) // Current Timer Value Register | |||
| #define PIT_TCTRL2 (*(volatile uint32_t *)0x40037128) // Timer Control Register | |||
| @@ -1939,6 +1950,7 @@ enum IRQ_NUMBER_t { | |||
| #define PIT_CVAL3 (*(volatile uint32_t *)0x40037134) // Current Timer Value Register | |||
| #define PIT_TCTRL3 (*(volatile uint32_t *)0x40037138) // Timer Control Register | |||
| #define PIT_TFLG3 (*(volatile uint32_t *)0x4003713C) // Timer Flag Register | |||
| #endif // defined(KINETISK) | |||
| // Chapter 37: Low-Power Timer (LPTMR) | |||
| #define LPTMR0_CSR (*(volatile uint32_t *)0x40040000) // Low Power Timer Control Status Register | |||