@@ -114,7 +114,7 @@ void serial_format(uint32_t format); | |||
void serial_end(void); | |||
void serial_set_transmit_pin(uint8_t pin); | |||
void serial_set_rx(uint8_t pin); | |||
void serial_set_tx(uint8_t pin); | |||
void serial_set_tx(uint8_t pin, uint8_t opendrain); | |||
int serial_set_rts(uint8_t pin); | |||
int serial_set_cts(uint8_t pin); | |||
void serial_putchar(uint32_t c); | |||
@@ -135,7 +135,7 @@ void serial2_format(uint32_t format); | |||
void serial2_end(void); | |||
void serial2_set_transmit_pin(uint8_t pin); | |||
void serial2_set_rx(uint8_t pin); | |||
void serial2_set_tx(uint8_t pin); | |||
void serial2_set_tx(uint8_t pin, uint8_t opendrain); | |||
int serial2_set_rts(uint8_t pin); | |||
int serial2_set_cts(uint8_t pin); | |||
void serial2_putchar(uint32_t c); | |||
@@ -152,7 +152,7 @@ void serial3_format(uint32_t format); | |||
void serial3_end(void); | |||
void serial3_set_transmit_pin(uint8_t pin); | |||
void serial3_set_rx(uint8_t pin); | |||
void serial3_set_tx(uint8_t pin); | |||
void serial3_set_tx(uint8_t pin, uint8_t opendrain); | |||
int serial3_set_rts(uint8_t pin); | |||
int serial3_set_cts(uint8_t pin); | |||
void serial3_putchar(uint32_t c); | |||
@@ -183,7 +183,7 @@ public: | |||
virtual void end(void) { serial_end(); } | |||
virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); } | |||
virtual void setRX(uint8_t pin) { serial_set_rx(pin); } | |||
virtual void setTX(uint8_t pin) { serial_set_tx(pin); } | |||
virtual void setTX(uint8_t pin, bool opendrain=false) { serial_set_tx(pin, opendrain); } | |||
virtual bool attachRts(uint8_t pin) { return serial_set_rts(pin); } | |||
virtual bool attachCts(uint8_t pin) { return serial_set_cts(pin); } | |||
virtual int available(void) { return serial_available(); } | |||
@@ -218,7 +218,7 @@ public: | |||
virtual void end(void) { serial2_end(); } | |||
virtual void transmitterEnable(uint8_t pin) { serial2_set_transmit_pin(pin); } | |||
virtual void setRX(uint8_t pin) { serial2_set_rx(pin); } | |||
virtual void setTX(uint8_t pin) { serial2_set_tx(pin); } | |||
virtual void setTX(uint8_t pin, bool opendrain=false) { serial2_set_tx(pin, opendrain); } | |||
virtual bool attachRts(uint8_t pin) { return serial2_set_rts(pin); } | |||
virtual bool attachCts(uint8_t pin) { return serial2_set_cts(pin); } | |||
virtual int available(void) { return serial2_available(); } | |||
@@ -253,7 +253,7 @@ public: | |||
virtual void end(void) { serial3_end(); } | |||
virtual void transmitterEnable(uint8_t pin) { serial3_set_transmit_pin(pin); } | |||
virtual void setRX(uint8_t pin) { serial3_set_rx(pin); } | |||
virtual void setTX(uint8_t pin) { serial3_set_tx(pin); } | |||
virtual void setTX(uint8_t pin, bool opendrain=false) { serial3_set_tx(pin, opendrain); } | |||
virtual bool attachRts(uint8_t pin) { return serial3_set_rts(pin); } | |||
virtual bool attachCts(uint8_t pin) { return serial3_set_cts(pin); } | |||
virtual int available(void) { return serial3_available(); } |
@@ -196,22 +196,30 @@ void serial_set_transmit_pin(uint8_t pin) | |||
#endif | |||
} | |||
void serial_set_tx(uint8_t pin) | |||
void serial_set_tx(uint8_t pin, uint8_t opendrain) | |||
{ | |||
uint32_t cfg; | |||
if (opendrain) pin |= 128; | |||
if (pin == tx_pin_num) return; | |||
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |||
switch (tx_pin_num) { | |||
switch (tx_pin_num & 127) { | |||
case 1: CORE_PIN1_CONFIG = 0; break; // PTB17 | |||
case 5: CORE_PIN5_CONFIG = 0; break; // PTD7 | |||
#if defined(KINETISL) | |||
case 4: CORE_PIN4_CONFIG = 0; break; // PTA2 | |||
#endif | |||
} | |||
switch (pin) { | |||
case 1: CORE_PIN1_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |||
case 5: CORE_PIN5_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |||
if (opendrain) { | |||
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |||
} else { | |||
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |||
} | |||
switch (pin & 127) { | |||
case 1: CORE_PIN1_CONFIG = cfg | PORT_PCR_MUX(3); break; | |||
case 5: CORE_PIN5_CONFIG = cfg | PORT_PCR_MUX(3); break; | |||
#if defined(KINETISL) | |||
case 4: CORE_PIN4_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); break; | |||
case 4: CORE_PIN4_CONFIG = cfg | PORT_PCR_MUX(2); break; | |||
#endif | |||
} | |||
} |
@@ -202,18 +202,26 @@ void serial2_set_transmit_pin(uint8_t pin) | |||
#endif | |||
} | |||
void serial2_set_tx(uint8_t pin) | |||
void serial2_set_tx(uint8_t pin, uint8_t opendrain) | |||
{ | |||
#if defined(KINETISK) | |||
uint32_t cfg; | |||
if (opendrain) pin |= 128; | |||
if (pin == tx_pin_num) return; | |||
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) { | |||
switch (tx_pin_num) { | |||
switch (tx_pin_num & 127) { | |||
case 10: CORE_PIN10_CONFIG = 0; break; // PTC4 | |||
case 31: CORE_PIN31_CONFIG = 0; break; // PTE0 | |||
} | |||
switch (pin) { | |||
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |||
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |||
if (opendrain) { | |||
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |||
} else { | |||
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |||
} | |||
switch (pin & 127) { | |||
case 10: CORE_PIN10_CONFIG = cfg | PORT_PCR_MUX(3); break; | |||
case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break; | |||
} | |||
} | |||
tx_pin_num = pin; |
@@ -186,18 +186,26 @@ void serial3_set_transmit_pin(uint8_t pin) | |||
#endif | |||
} | |||
void serial3_set_tx(uint8_t pin) | |||
void serial3_set_tx(uint8_t pin, uint8_t opendrain) | |||
{ | |||
#if defined(KINETISL) | |||
uint32_t cfg; | |||
if (opendrain) pin |= 128; | |||
if (pin == tx_pin_num) return; | |||
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) { | |||
switch (tx_pin_num) { | |||
switch (tx_pin_num & 127) { | |||
case 8: CORE_PIN8_CONFIG = 0; break; // PTD3 | |||
case 20: CORE_PIN20_CONFIG = 0; break; // PTD5 | |||
} | |||
switch (pin) { | |||
case 8: CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |||
case 20: CORE_PIN20_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |||
if (opendrain) { | |||
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |||
} else { | |||
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |||
} | |||
switch (pin & 127) { | |||
case 8: CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break; | |||
case 20: CORE_PIN20_CONFIG = cfg | PORT_PCR_MUX(3); break; | |||
} | |||
} | |||
tx_pin_num = pin; |