Whitespace: Tabsize 8 (?)

teensy4/imxrt.h

 #define SRC_GPR9			(IMXRT_SRC.offset040)
 #define SRC_GPR10			(IMXRT_SRC.offset044)
 */
-#define SRC_SCR_MASK_WDOG3_RST	((uint32_t)(((n) & 0x0f) << 28))
-#define SRC_SCR_DBG_RST_MSK_PG	((uint32_t)(1 << 25))
+#define SRC_SCR_MASK_WDOG3_RST		((uint32_t)(((n) & 0x0f) << 28))
+#define SRC_SCR_DBG_RST_MSK_PG		((uint32_t)(1 << 25))
 #define SRC_SCR_CORE0_DBG_RST		((uint32_t)(1 << 17))
-#define SRC_SCR_CORE0_RST				((uint32_t)(1 << 13))
+#define SRC_SCR_CORE0_RST		((uint32_t)(1 << 13))
 #define SRC_SCR_MASK_WDOG_RST		((uint32_t)(((n) & 0x0f) << 7))
-#define SRC_SBMR1_BOOT_CFG4			((uint32_t)(((n) & 0xff) << 24))
-#define SRC_SBMR1_BOOT_CFG3			((uint32_t)(((n) & 0xff) << 16))
-#define SRC_SBMR1_BOOT_CFG2			((uint32_t)(((n) & 0xff) << 8))
-#define SRC_SBMR1_BOOT_CFG1			((uint32_t)(((n) & 0xff) << 0))
+#define SRC_SBMR1_BOOT_CFG4		((uint32_t)(((n) & 0xff) << 24))
+#define SRC_SBMR1_BOOT_CFG3		((uint32_t)(((n) & 0xff) << 16))
+#define SRC_SBMR1_BOOT_CFG2		((uint32_t)(((n) & 0xff) << 8))
+#define SRC_SBMR1_BOOT_CFG1		((uint32_t)(((n) & 0xff) << 0))
 #define SRC_SRSR_TEMPSENSE_RST_B	((uint32_t)(1 << 8))
 #define SRC_SRSR_WDOG3_RST_B		((uint32_t)(1 << 7))
 #define SRC_SRSR_JTAG_SW_RST		((uint32_t)(1 << 6))
-#define SRC_SRSR_JTAG_RST_B			((uint32_t)(1 << 5))
-#define SRC_SRSR_WDOG_RST_B			((uint32_t)(1 << 4))
+#define SRC_SRSR_JTAG_RST_B		((uint32_t)(1 << 5))
+#define SRC_SRSR_WDOG_RST_B		((uint32_t)(1 << 4))
 #define SRC_SRSR_IPP_USER_RESET_B	((uint32_t)(1 << 3))
 #define SRC_SRSR_CSU_RESET_B		((uint32_t)(1 << 2))
 #define SRC_SRSR_LOCKUP_SYSRESETREQ	((uint32_t)(1 << 1))
 #define SRC_SRSR_IPP_RESET_B		((uint32_t)(1 << 0))
-#define SRC_SBMR2_BMOD					((uint32_t)(((n) & 0x03) << 24))
+#define SRC_SBMR2_BMOD			((uint32_t)(((n) & 0x03) << 24))
 #define SRC_SBMR2_BT_FUSE_SEL		((uint32_t)(1 << 4))
 #define SRC_SBMR2_DIR_BT_DIS		((uint32_t)(1 << 3))
 #define SRC_SBMR2_SEC_CONFIG		((uint32_t)(((n) & 0x03) << 0))