| #define NVIC_ISER1 (*(volatile uint32_t *)0xE000E104) | #define NVIC_ISER1 (*(volatile uint32_t *)0xE000E104) | ||||
| #define NVIC_ISER2 (*(volatile uint32_t *)0xE000E108) | #define NVIC_ISER2 (*(volatile uint32_t *)0xE000E108) | ||||
| #define NVIC_ISER3 (*(volatile uint32_t *)0xE000E10C) | #define NVIC_ISER3 (*(volatile uint32_t *)0xE000E10C) | ||||
| #define NVIC_ISER4 (*(volatile uint32_t *)0xE000E110) | |||||
| #define NVIC_ICER0 (*(volatile uint32_t *)0xE000E180) | #define NVIC_ICER0 (*(volatile uint32_t *)0xE000E180) | ||||
| #define NVIC_ICER1 (*(volatile uint32_t *)0xE000E184) | #define NVIC_ICER1 (*(volatile uint32_t *)0xE000E184) | ||||
| #define NVIC_ICER2 (*(volatile uint32_t *)0xE000E188) | #define NVIC_ICER2 (*(volatile uint32_t *)0xE000E188) | ||||
| #define NVIC_ICER3 (*(volatile uint32_t *)0xE000E18C) | #define NVIC_ICER3 (*(volatile uint32_t *)0xE000E18C) | ||||
| #define NVIC_ICER4 (*(volatile uint32_t *)0xE000E190) | |||||
| #define NVIC_STIR (*(volatile uint32_t *)0xE000EF00) | #define NVIC_STIR (*(volatile uint32_t *)0xE000EF00) | ||||
| #define NVIC_ENABLE_IRQ(n) (*(&NVIC_ISER0 + ((n) >> 5)) = (1 << ((n) & 31))) | #define NVIC_ENABLE_IRQ(n) (*(&NVIC_ISER0 + ((n) >> 5)) = (1 << ((n) & 31))) | ||||
| #define NVIC_DISABLE_IRQ(n) (*(&NVIC_ICER0 + ((n) >> 5)) = (1 << ((n) & 31))) | #define NVIC_DISABLE_IRQ(n) (*(&NVIC_ICER0 + ((n) >> 5)) = (1 << ((n) & 31))) |