Allow SPI pin reassign while SPI is running

teensy3/avr_emulation.h

 		return ret;
 	}
 	inline void setMOSI(uint8_t pin) __attribute__((always_inline)) {
-		if (pin == 11) pinout &= ~1;
-		if (pin == 7) pinout |= 1;
+		uint8_t newpinout = pinout;
+		if (pin == 11) newpinout &= ~1;
+		if (pin == 7) newpinout |= 1;
+		if ((SIM_SCGC6 & SIM_SCGC6_SPI0) && newpinout != pinout) {
+			if ((newpinout & 1) == 0) {
+				CORE_PIN7_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN11_CONFIG = PORT_PCR_DSE | PORT_PCR_MUX(2);
+			} else {
+				CORE_PIN11_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN7_CONFIG = PORT_PCR_MUX(2);
+			}
+		}
+		pinout = newpinout;
 	}
 	inline void setMISO(uint8_t pin) __attribute__((always_inline)) {
-		if (pin == 12) pinout &= ~2;
-		if (pin == 8) pinout |= 2;
+		uint8_t newpinout = pinout;
+		if (pin == 12) newpinout &= ~2;
+		if (pin == 8) newpinout |= 2;
+		if ((SIM_SCGC6 & SIM_SCGC6_SPI0) && newpinout != pinout) {
+			if ((newpinout & 2) == 0) {
+				CORE_PIN8_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN12_CONFIG = PORT_PCR_MUX(2);
+			} else {
+				CORE_PIN12_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN8_CONFIG = PORT_PCR_MUX(2);
+			}
+		}
+		pinout = newpinout;
 	}
 	inline void setSCK(uint8_t pin) __attribute__((always_inline)) {
-		if (pin == 13) pinout &= ~4;
-		if (pin == 14) pinout |= 4;
+		uint8_t newpinout = pinout;
+		if (pin == 13) newpinout &= ~4;
+		if (pin == 14) newpinout |= 4;
+		if ((SIM_SCGC6 & SIM_SCGC6_SPI0) && newpinout != pinout) {
+			if ((newpinout & 4) == 0) {
+				CORE_PIN14_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN13_CONFIG = PORT_PCR_DSE | PORT_PCR_MUX(2);
+			} else {
+				CORE_PIN13_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN14_CONFIG = PORT_PCR_MUX(2);
+			}
+		}
+		pinout = newpinout;
 	}
 	friend class SPSRemulation;
 	friend class SPIFIFOclass;
 		return ret;
 	}
 	inline void setMOSI(uint8_t pin) __attribute__((always_inline)) {
-		if (pin == 11) pinout &= ~1;
-		if (pin == 7) pinout |= 1;
+		uint8_t newpinout = pinout;
+		if (pin == 11) newpinout &= ~1;
+		if (pin == 7) newpinout |= 1;
+		if ((SIM_SCGC4 & SIM_SCGC4_SPI0) && newpinout != pinout) {
+			if ((newpinout & 1) == 0) {
+				CORE_PIN7_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN11_CONFIG = PORT_PCR_DSE | PORT_PCR_MUX(2);
+			} else {
+				CORE_PIN11_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN7_CONFIG = PORT_PCR_MUX(2);
+			}
+		}
+		pinout = newpinout;
 	}
 	inline void setMISO(uint8_t pin) __attribute__((always_inline)) {
-		if (pin == 12) pinout &= ~2;
-		if (pin == 8) pinout |= 2;
+		uint8_t newpinout = pinout;
+		if (pin == 12) newpinout &= ~2;
+		if (pin == 8) newpinout |= 2;
+		if ((SIM_SCGC4 & SIM_SCGC4_SPI0) && newpinout != pinout) {
+			if ((newpinout & 2) == 0) {
+				CORE_PIN8_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN12_CONFIG = PORT_PCR_MUX(2);
+			} else {
+				CORE_PIN12_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN8_CONFIG = PORT_PCR_MUX(2);
+			}
+		}
+		pinout = newpinout;
 	}
 	inline void setSCK(uint8_t pin) __attribute__((always_inline)) {
-		if (pin == 13) pinout &= ~4;
-		if (pin == 14) pinout |= 4;
+		uint8_t newpinout = pinout;
+		if (pin == 13) newpinout &= ~4;
+		if (pin == 14) newpinout |= 4;
+		if ((SIM_SCGC4 & SIM_SCGC4_SPI0) && newpinout != pinout) {
+			if ((newpinout & 4) == 0) {
+				CORE_PIN14_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN13_CONFIG = PORT_PCR_DSE | PORT_PCR_MUX(2);
+			} else {
+				CORE_PIN13_CONFIG = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
+				CORE_PIN14_CONFIG = PORT_PCR_MUX(2);
+			}
+		}
+		pinout = newpinout;
 	}
 	friend class SPSRemulation;
 	friend class SPIFIFOclass;