The T-LC and the new beta boards T3.6 and soon T3.5 hardware uarts have ability to turn on 2 stop bits. So enabled on these boards.teensy4-core
#define SERIAL_9E1_RXINV_TXINV 0xBE | #define SERIAL_9E1_RXINV_TXINV 0xBE | ||||
#define SERIAL_9O1_RXINV_TXINV 0xBF | #define SERIAL_9O1_RXINV_TXINV 0xBF | ||||
#endif | #endif | ||||
// Teensy LC and 3.5 and 3.6 Uarts have 1/2 bit stop setting | |||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(KINETISL) | |||||
#define SERIAL_2STOP_BITS 0x100 | |||||
#define SERIAL_8E2 (SERIAL_8E1 | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8O2 (SERIAL_8O1 | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8E2_RXINV (SERIAL_8E1_RXINV | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8O2_RXINV (SERIAL_8O1_RXINV | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8E2_TXINV (SERIAL_8E1_TXINV | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8O2_TXINV (SERIAL_8O1_TXINV | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8E2_RXINV_TXINV (SERIAL_8E1_RXINV_TXINV | SERIAL_2STOP_BITS) | |||||
#define SERIAL_8O2_RXINV_TXINV (SERIAL_8O1_RXINV_TXINV | SERIAL_2STOP_BITS) | |||||
#endif | |||||
// bit0: parity, 0=even, 1=odd | // bit0: parity, 0=even, 1=odd | ||||
// bit1: parity, 0=disable, 1=enable | // bit1: parity, 0=disable, 1=enable | ||||
// bit2: mode, 1=9bit, 0=8bit | // bit2: mode, 1=9bit, 0=8bit |
} KINETISK_UART_t; | } KINETISK_UART_t; | ||||
#define KINETISK_UART0 (*(KINETISK_UART_t *)0x4006A000) | #define KINETISK_UART0 (*(KINETISK_UART_t *)0x4006A000) | ||||
#define UART0_BDH (KINETISK_UART0.BDH) // UART Baud Rate Registers: High | #define UART0_BDH (KINETISK_UART0.BDH) // UART Baud Rate Registers: High | ||||
#define UART_BDH_SBNS 0x20 // UART Stop Bit Number Select (TLC T3.5 T3.6) | |||||
#define UART0_BDL (KINETISK_UART0.BDL) // UART Baud Rate Registers: Low | #define UART0_BDL (KINETISK_UART0.BDL) // UART Baud Rate Registers: Low | ||||
#define UART0_C1 (KINETISK_UART0.C1) // UART Control Register 1 | #define UART0_C1 (KINETISK_UART0.C1) // UART Control Register 1 | ||||
#define UART_C1_LOOPS 0x80 // When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally connected to the receiver input | #define UART_C1_LOOPS 0x80 // When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally connected to the receiver input | ||||
#define UART_C1_UARTSWAI 0x40 // UART Stops in Wait Mode | #define UART_C1_UARTSWAI 0x40 // UART Stops in Wait Mode | ||||
#define UART_C1_RSRC 0x20 // When LOOPS is set, the RSRC field determines the source for the receiver shift register input | #define UART_C1_RSRC 0x20 // When LOOPS is set, the RSRC field determines the source for the receiver shift register input | ||||
#define UART_C1_M 0x10 // 9-bit or 8-bit Mode Select | |||||
#define UART_C1_M 0x10 // 9-bit or 8-bit Mode Select | |||||
#define UART_C1_WAKE 0x08 // Determines which condition wakes the UART | #define UART_C1_WAKE 0x08 // Determines which condition wakes the UART | ||||
#define UART_C1_ILT 0x04 // Idle Line Type Select | #define UART_C1_ILT 0x04 // Idle Line Type Select | ||||
#define UART_C1_PE 0x02 // Parity Enable | #define UART_C1_PE 0x02 // Parity Enable | ||||
#define LPUART_BAUD_TDMAE ((uint32_t)0x00800000) // Transmitter Dma Enable | #define LPUART_BAUD_TDMAE ((uint32_t)0x00800000) // Transmitter Dma Enable | ||||
#define LPUART_BAUD_RDMAE ((uint32_t)0x00400000) // Receiver Dma Enable | #define LPUART_BAUD_RDMAE ((uint32_t)0x00400000) // Receiver Dma Enable | ||||
#define LPUART_BAUD_BOTHEDGE ((uint32_t)0x00020000) // Both edge sampling needed OSR 4-7 | #define LPUART_BAUD_BOTHEDGE ((uint32_t)0x00020000) // Both edge sampling needed OSR 4-7 | ||||
#define LPUART_BAUD_SBNS ((uint32_t)0x00002000) // UART Stop Bit Number Select | |||||
#define LPUART_BAUD_SBR(n) ((uint32_t)((n) & 0x1fff) << 0) // set baud rate divisor | #define LPUART_BAUD_SBR(n) ((uint32_t)((n) & 0x1fff) << 0) // set baud rate divisor | ||||
#define LPUART0_STAT (KINETISK_LPUART0.STAT) // LPUART Status register | #define LPUART0_STAT (KINETISK_LPUART0.STAT) // LPUART Status register |
UART0_C4 = c; | UART0_C4 = c; | ||||
use9Bits = format & 0x80; | use9Bits = format & 0x80; | ||||
#endif | #endif | ||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(KINETISL) | |||||
// For T3.5/T3.6/TLC See about turning on 2 stop bit mode | |||||
if ( format & 0x100) { | |||||
uint8_t bdl = UART0_BDL; | |||||
UART0_BDH |= UART_BDH_SBNS; // Turn on 2 stop bits - was turned off by set baud | |||||
UART0_BDL = bdl; // Says BDH not acted on until BDL is written | |||||
} | |||||
#endif | |||||
} | } | ||||
void serial_end(void) | void serial_end(void) |
UART1_C4 = c; | UART1_C4 = c; | ||||
use9Bits = format & 0x80; | use9Bits = format & 0x80; | ||||
#endif | #endif | ||||
// UART1_C1.0 = parity, 0=even, 1=odd | |||||
// UART1_C1.1 = parity, 0=disable, 1=enable | |||||
// UART1_C1.4 = mode, 1=9bit, 0=8bit | |||||
// UART1_C4.5 = mode, 1=10bit, 0=8bit | |||||
// UART1_C3.4 = txinv, 0=normal, 1=inverted | |||||
// UART1_S2.4 = rxinv, 0=normal, 1=inverted | |||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(KINETISL) | |||||
// For T3.5/T3.6/TLC See about turning on 2 stop bit mode | |||||
if ( format & 0x100) { | |||||
uint8_t bdl = UART1_BDL; | |||||
UART1_BDH |= UART_BDH_SBNS; // Turn on 2 stop bits - was turned off by set baud | |||||
UART1_BDL = bdl; // Says BDH not acted on until BDL is written | |||||
} | |||||
#endif | |||||
} | } | ||||
void serial2_end(void) | void serial2_end(void) |
UART2_C4 = c; | UART2_C4 = c; | ||||
use9Bits = format & 0x80; | use9Bits = format & 0x80; | ||||
#endif | #endif | ||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(KINETISL) | |||||
// For T3.5/T3.6/TLC See about turning on 2 stop bit mode | |||||
if ( format & 0x100) { | |||||
uint8_t bdl = UART2_BDL; | |||||
UART2_BDH |= UART_BDH_SBNS; // Turn on 2 stop bits - was turned off by set baud | |||||
UART2_BDL = bdl; // Says BDH not acted on until BDL is written | |||||
} | |||||
#endif | |||||
} | } | ||||
void serial3_end(void) | void serial3_end(void) |
UART3_C4 = c; | UART3_C4 = c; | ||||
use9Bits = format & 0x80; | use9Bits = format & 0x80; | ||||
#endif | #endif | ||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(KINETISL) | |||||
// For T3.5/T3.6/TLC See about turning on 2 stop bit mode | |||||
if ( format & 0x100) { | |||||
uint8_t bdl = UART3_BDL; | |||||
UART3_BDH |= UART_BDH_SBNS; // Turn on 2 stop bits - was turned off by set baud | |||||
UART3_BDL = bdl; // Says BDH not acted on until BDL is written | |||||
} | |||||
#endif | |||||
} | } | ||||
void serial4_end(void) | void serial4_end(void) |
UART4_C4 = c; | UART4_C4 = c; | ||||
use9Bits = format & 0x80; | use9Bits = format & 0x80; | ||||
#endif | #endif | ||||
// For T3.5/T3.6 See about turning on 2 stop bit mode | |||||
if ( format & 0x100) { | |||||
uint8_t bdl = UART4_BDL; | |||||
UART4_BDH |= UART_BDH_SBNS; // Turn on 2 stop bits - was turned off by set baud | |||||
UART4_BDL = bdl; // Says BDH not acted on until BDL is written | |||||
} | |||||
} | } | ||||
void serial5_end(void) | void serial5_end(void) |
UART5_C4 = c; | UART5_C4 = c; | ||||
use9Bits = format & 0x80; | use9Bits = format & 0x80; | ||||
#endif | #endif | ||||
// For T3.5 See about turning on 2 stop bit mode | |||||
if ( format & 0x100) { | |||||
uint8_t bdl = UART5_BDL; | |||||
UART5_BDH |= UART_BDH_SBNS; // Turn on 2 stop bits - was turned off by set baud | |||||
UART5_BDL = bdl; // Says BDH not acted on until BDL is written | |||||
} | |||||
} | } | ||||
void serial6_end(void) | void serial6_end(void) |
if (format & 0x20) c |= LPUART_CTRL_TXINV; // tx invert | if (format & 0x20) c |= LPUART_CTRL_TXINV; // tx invert | ||||
LPUART0_CTRL = c; | LPUART0_CTRL = c; | ||||
// For T3.6 See about turning on 2 stop bit mode | |||||
if ( format & 0x100) LPUART0_BAUD |= LPUART_BAUD_SBNS; | |||||
} | } | ||||
void serial6_end(void) | void serial6_end(void) |