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Merge pull request #406 from KurtE/T4_ADC_XBAR_DEFINES 

Add ADC Structure and redefine using, plus XBAR defines.
teensy4-core
Paul Stoffregen 5 years ago
parent
b98907f076 c75375d874
commit
8fd0d71fb4
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1 changed files with 502 additions and 49 deletions
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  1. +502
    -49
      teensy4/imxrt.h

+ 502
- 49
teensy4/imxrt.h View File

@@ -897,55 +897,85 @@ typedef struct {
#define CMP4_DACCR (IMXRT_CMP4.offset04)
#define CMP4_MUXCR (IMXRT_CMP4.offset05)

// 14.6: page 505
#define IMXRT_ADC1 (*(IMXRT_REGISTER32_t *)0x400C4000)
#define ADC1_HC0 (IMXRT_ADC1.offset000)
#define ADC1_HC1 (IMXRT_ADC1.offset004)
#define ADC1_HC2 (IMXRT_ADC1.offset008)
#define ADC1_HC3 (IMXRT_ADC1.offset00C)
#define ADC1_HC4 (IMXRT_ADC1.offset010)
#define ADC1_HC5 (IMXRT_ADC1.offset014)
#define ADC1_HC6 (IMXRT_ADC1.offset018)
#define ADC1_HC7 (IMXRT_ADC1.offset01C)
#define ADC1_HS (IMXRT_ADC1.offset020)
#define ADC1_R0 (IMXRT_ADC1.offset024)
#define ADC1_R1 (IMXRT_ADC1.offset028)
#define ADC1_R2 (IMXRT_ADC1.offset02C)
#define ADC1_R3 (IMXRT_ADC1.offset030)
#define ADC1_R4 (IMXRT_ADC1.offset034)
#define ADC1_R5 (IMXRT_ADC1.offset038)
#define ADC1_R6 (IMXRT_ADC1.offset03C)
#define ADC1_R7 (IMXRT_ADC1.offset040)
#define ADC1_CFG (IMXRT_ADC1.offset044)
#define ADC1_GC (IMXRT_ADC1.offset048)
#define ADC1_GS (IMXRT_ADC1.offset04C)
#define ADC1_CV (IMXRT_ADC1.offset050)
#define ADC1_OFS (IMXRT_ADC1.offset054)
#define ADC1_CAL (IMXRT_ADC1.offset058)
#define IMXRT_ADC2 (*(IMXRT_REGISTER32_t *)0x400C8000)
#define ADC2_HC0 (IMXRT_ADC2.offset000)
#define ADC2_HC1 (IMXRT_ADC2.offset004)
#define ADC2_HC2 (IMXRT_ADC2.offset008)
#define ADC2_HC3 (IMXRT_ADC2.offset00C)
#define ADC2_HC4 (IMXRT_ADC2.offset010)
#define ADC2_HC5 (IMXRT_ADC2.offset014)
#define ADC2_HC6 (IMXRT_ADC2.offset018)
#define ADC2_HC7 (IMXRT_ADC2.offset01C)
#define ADC2_HS (IMXRT_ADC2.offset020)
#define ADC2_R0 (IMXRT_ADC2.offset024)
#define ADC2_R1 (IMXRT_ADC2.offset028)
#define ADC2_R2 (IMXRT_ADC2.offset02C)
#define ADC2_R3 (IMXRT_ADC2.offset030)
#define ADC2_R4 (IMXRT_ADC2.offset034)
#define ADC2_R5 (IMXRT_ADC2.offset038)
#define ADC2_R6 (IMXRT_ADC2.offset03C)
#define ADC2_R7 (IMXRT_ADC2.offset040)
#define ADC2_CFG (IMXRT_ADC2.offset044)
#define ADC2_GC (IMXRT_ADC2.offset048)
#define ADC2_GS (IMXRT_ADC2.offset04C)
#define ADC2_CV (IMXRT_ADC2.offset050)
#define ADC2_OFS (IMXRT_ADC2.offset054)
#define ADC2_CAL (IMXRT_ADC2.offset058)
// 65.8 page 3480 (new 1062RM)
typedef struct {
volatile uint32_t HC0;
volatile uint32_t HC1;
volatile uint32_t HC2;
volatile uint32_t HC3;
volatile uint32_t HC4;
volatile uint32_t HC5;
volatile uint32_t HC6;
volatile uint32_t HC7;
volatile uint32_t HS;
volatile uint32_t R0;
volatile uint32_t R1;
volatile uint32_t R2;
volatile uint32_t R3;
volatile uint32_t R4;
volatile uint32_t R5;
volatile uint32_t R6;
volatile uint32_t R7;
volatile uint32_t CFG;
volatile uint32_t GC;
volatile uint32_t GS;
volatile uint32_t CV;
volatile uint32_t OFS;
volatile uint32_t CAL;
} IMXRT_ADCS_t;



#define IMXRT_ADC1 (*(IMXRT_ADCS_t *)0x400C4000)
#define IMXRT_ADC1S (*(IMXRT_ADCS_t *)0x400C4000)
#define ADC1_HC0 (IMXRT_ADC1.HC0)
#define ADC1_HC1 (IMXRT_ADC1.HC1)
#define ADC1_HC2 (IMXRT_ADC1.HC2)
#define ADC1_HC3 (IMXRT_ADC1.HC3)
#define ADC1_HC4 (IMXRT_ADC1.HC4)
#define ADC1_HC5 (IMXRT_ADC1.HC5)
#define ADC1_HC6 (IMXRT_ADC1.HC6)
#define ADC1_HC7 (IMXRT_ADC1.HC7)
#define ADC1_HS (IMXRT_ADC1.HS)
#define ADC1_R0 (IMXRT_ADC1.R0)
#define ADC1_R1 (IMXRT_ADC1.R1)
#define ADC1_R2 (IMXRT_ADC1.R2)
#define ADC1_R3 (IMXRT_ADC1.R3)
#define ADC1_R4 (IMXRT_ADC1.R4)
#define ADC1_R5 (IMXRT_ADC1.R5)
#define ADC1_R6 (IMXRT_ADC1.R6)
#define ADC1_R7 (IMXRT_ADC1.R7)
#define ADC1_CFG (IMXRT_ADC1.CFG)
#define ADC1_GC (IMXRT_ADC1.GC)
#define ADC1_GS (IMXRT_ADC1.GS)
#define ADC1_CV (IMXRT_ADC1.CV)
#define ADC1_OFS (IMXRT_ADC1.OFS)
#define ADC1_CAL (IMXRT_ADC1.CAL)
#define IMXRT_ADC2 (*(IMXRT_ADCS_t *)0x400C8000)
#define IMXRT_ADC2S (*(IMXRT_ADCS_t *)0x400C8000)
#define ADC2_HC0 (IMXRT_ADC2.HC0)
#define ADC2_HC1 (IMXRT_ADC2.HC1)
#define ADC2_HC2 (IMXRT_ADC2.HC2)
#define ADC2_HC3 (IMXRT_ADC2.HC3)
#define ADC2_HC4 (IMXRT_ADC2.HC4)
#define ADC2_HC5 (IMXRT_ADC2.HC5)
#define ADC2_HC6 (IMXRT_ADC2.HC6)
#define ADC2_HC7 (IMXRT_ADC2.HC7)
#define ADC2_HS (IMXRT_ADC2.HS)
#define ADC2_R0 (IMXRT_ADC2.R0)
#define ADC2_R1 (IMXRT_ADC2.R1)
#define ADC2_R2 (IMXRT_ADC2.R2)
#define ADC2_R3 (IMXRT_ADC2.R3)
#define ADC2_R4 (IMXRT_ADC2.R4)
#define ADC2_R5 (IMXRT_ADC2.R5)
#define ADC2_R6 (IMXRT_ADC2.R6)
#define ADC2_R7 (IMXRT_ADC2.R7)
#define ADC2_CFG (IMXRT_ADC2.CFG)
#define ADC2_GC (IMXRT_ADC2.GC)
#define ADC2_GS (IMXRT_ADC2.GS)
#define ADC2_CV (IMXRT_ADC2.CV)
#define ADC2_OFS (IMXRT_ADC2.OFS)
#define ADC2_CAL (IMXRT_ADC2.CAL)
#define ADC_HC_AIEN ((uint32_t)(1<<7))
#define ADC_HC_ADCH(n) ((uint32_t)(((n) & 0x1F) << 0))
#define ADC_HS_COCO0 ((uint32_t)(1<<0))
@@ -8203,6 +8233,429 @@ These register are used by the ROM code and should not be used by application so
#define XBARB3_SEL6 (IMXRT_XBARB3.offset00C)
#define XBARB3_SEL7 (IMXRT_XBARB3.offset00E)

// XBAR1 Inputs and Outputs Table 3-4 Starting Page 62
#define XBARA1_IN_LOGIC_LOW 0
#define XBARA1_IN_LOGIC_HIGH 1
#define XBARA1_IN_IOMUX_XBAR_IN02 2
#define XBARA1_IN_IOMUX_XBAR_IN03 3
#define XBARA1_IN_IOMUX_XBAR_INOUT04 4
#define XBARA1_IN_IOMUX_XBAR_INOUT05 5
#define XBARA1_IN_IOMUX_XBAR_INOUT06 6
#define XBARA1_IN_IOMUX_XBAR_INOUT07 7
#define XBARA1_IN_IOMUX_XBAR_INOUT08 8
#define XBARA1_IN_IOMUX_XBAR_INOUT09 9
#define XBARA1_IN_IOMUX_XBAR_INOUT10 10
#define XBARA1_IN_IOMUX_XBAR_INOUT11 11
#define XBARA1_IN_IOMUX_XBAR_INOUT12 12
#define XBARA1_IN_IOMUX_XBAR_INOUT13 13
#define XBARA1_IN_IOMUX_XBAR_INOUT14 14
#define XBARA1_IN_IOMUX_XBAR_INOUT15 15
#define XBARA1_IN_IOMUX_XBAR_INOUT16 16
#define XBARA1_IN_IOMUX_XBAR_INOUT17 17
#define XBARA1_IN_IOMUX_XBAR_INOUT18 18
#define XBARA1_IN_IOMUX_XBAR_INOUT19 19
#define XBARA1_IN_IOMUX_XBAR_IN20 20
#define XBARA1_IN_IOMUX_XBAR_IN21 21
#define XBARA1_IN_IOMUX_XBAR_IN22 22
#define XBARA1_IN_IOMUX_XBAR_IN23 23
#define XBARA1_IN_IOMUX_XBAR_IN24 24
#define XBARA1_IN_IOMUX_XBAR_IN25 25
#define XBARA1_IN_ACMP1_OUT 26
#define XBARA1_IN_ACMP2_OUT 27
#define XBARA1_IN_ACMP3_OUT 28
#define XBARA1_IN_ACMP4_OUT 29
//#define XBARA1_IN_Reserved 30
//#define XBARA1_IN_Reserved 31
#define XBARA1_IN_QTIMER3_TIMER0 32
#define XBARA1_IN_QTIMER3_TIMER1 33
#define XBARA1_IN_QTIMER3_TIMER2 34
#define XBARA1_IN_QTIMER3_TIMER3 35
#define XBARA1_IN_QTIMER4_TIMER0 36
#define XBARA1_IN_QTIMER4_TIMER1 37
#define XBARA1_IN_QTIMER4_TIMER2 38
#define XBARA1_IN_QTIMER4_TIMER3 39
#define XBARA1_IN_FLEXPWM1_PWM1_OUT_TRIG0 40
#define XBARA1_IN_FLEXPWM1_PWM1_OUT_TRIG1 40
#define XBARA1_IN_FLEXPWM1_PWM2_OUT_TRIG0 41
#define XBARA1_IN_FLEXPWM1_PWM2_OUT_TRIG1 41
#define XBARA1_IN_FLEXPWM1_PWM3_OUT_TRIG0 42
#define XBARA1_IN_FLEXPWM1_PWM3_OUT_TRIG1 42
#define XBARA1_IN_FLEXPWM1_PWM4_OUT_TRIG0 43
#define XBARA1_IN_FLEXPWM1_PWM4_OUT_TRIG1 43
#define XBARA1_IN_FLEXPWM2_PWM1_OUT_TRIG0 44
#define XBARA1_IN_FLEXPWM2_PWM1_OUT_TRIG1 44
#define XBARA1_IN_FLEXPWM2_PWM2_OUT_TRIG0 45
#define XBARA1_IN_FLEXPWM2_PWM2_OUT_TRIG1 45
#define XBARA1_IN_FLEXPWM2_PWM3_OUT_TRIG0 46
#define XBARA1_IN_FLEXPWM2_PWM3_OUT_TRIG1 46
#define XBARA1_IN_FLEXPWM2_PWM4_OUT_TRIG0 47
#define XBARA1_IN_FLEXPWM2_PWM4_OUT_TRIG1 47
#define XBARA1_IN_FLEXPWM3_PWM1_OUT_TRIG0 48
#define XBARA1_IN_FLEXPWM3_PWM1_OUT_TRIG1 48
#define XBARA1_IN_FLEXPWM3_PWM2_OUT_TRIG0 49
#define XBARA1_IN_FLEXPWM3_PWM2_OUT_TRIG1 49
#define XBARA1_IN_FLEXPWM3_PWM3_OUT_TRIG0 50
#define XBARA1_IN_FLEXPWM3_PWM3_OUT_TRIG1 50
#define XBARA1_IN_FLEXPWM3_PWM4_OUT_TRIG0 51
#define XBARA1_IN_FLEXPWM3_PWM4_OUT_TRIG1 51
#define XBARA1_IN_FLEXPWM4_PWM1_OUT_TRIG0 52
#define XBARA1_IN_FLEXPWM4_PWM1_OUT_TRIG1 52
#define XBARA1_IN_FLEXPWM4_PWM2_OUT_TRIG0 53
#define XBARA1_IN_FLEXPWM4_PWM2_OUT_TRIG1 53
#define XBARA1_IN_FLEXPWM4_PWM3_OUT_TRIG0 54
#define XBARA1_IN_FLEXPWM4_PWM3_OUT_TRIG1 54
#define XBARA1_IN_FLEXPWM4_PWM4_OUT_TRIG0 55
#define XBARA1_IN_FLEXPWM4_PWM4_OUT_TRIG1 55
#define XBARA1_IN_PIT_TRIGGER0 56
#define XBARA1_IN_PIT_TRIGGER1 57
#define XBARA1_IN_PIT_TRIGGER2 58
#define XBARA1_IN_PIT_TRIGGER3 59
#define XBARA1_IN_ENC1_POS_MATCH 60
#define XBARA1_IN_ENC2_POS_MATCH 61
#define XBARA1_IN_ENC3_POS_MATCH 62
#define XBARA1_IN_ENC4_POS_MATCH 63
#define XBARA1_IN_DMA_DONE0 64
#define XBARA1_IN_DMA_DONE1 65
#define XBARA1_IN_DMA_DONE2 66
#define XBARA1_IN_DMA_DONE3 67
#define XBARA1_IN_DMA_DONE4 68
#define XBARA1_IN_DMA_DONE5 69
#define XBARA1_IN_DMA_DONE6 70
#define XBARA1_IN_DMA_DONE7 71
#define XBARA1_IN_AOI1_OUT0 72
#define XBARA1_IN_AOI1_OUT1 73
#define XBARA1_IN_AOI1_OUT2 74
#define XBARA1_IN_AOI1_OUT3 75
#define XBARA1_IN_AOI2_OUT0 76
#define XBARA1_IN_AOI2_OUT1 77
#define XBARA1_IN_AOI2_OUT2 78
#define XBARA1_IN_AOI2_OUT3 79
#define XBARA1_IN_ADC_ETC0_COCO0 80
#define XBARA1_IN_ADC_ETC0_COCO1 81
#define XBARA1_IN_ADC_ETC0_COCO2 82
#define XBARA1_IN_ADC_ETC0_COCO3 83
#define XBARA1_IN_ADC_ETC1_COCO0 84
#define XBARA1_IN_ADC_ETC1_COCO1 85
#define XBARA1_IN_ADC_ETC1_COCO2 86
#define XBARA1_IN_ADC_ETC1_COCO3 87

#define XBARA1_OUT_DMA_CH_MUX_REQ30 0
#define XBARA1_OUT_DMA_CH_MUX_REQ31 1
#define XBARA1_OUT_DMA_CH_MUX_REQ94 2
#define XBARA1_OUT_DMA_CH_MUX_REQ95 3
#define XBARA1_OUT_IOMUX_XBAR_INOUT04 4
#define XBARA1_OUT_IOMUX_XBAR_INOUT05 5
#define XBARA1_OUT_IOMUX_XBAR_INOUT06 6
#define XBARA1_OUT_IOMUX_XBAR_INOUT07 7
#define XBARA1_OUT_IOMUX_XBAR_INOUT08 8
#define XBARA1_OUT_IOMUX_XBAR_INOUT09 9
#define XBARA1_OUT_IOMUX_XBAR_INOUT10 10
#define XBARA1_OUT_IOMUX_XBAR_INOUT11 11
#define XBARA1_OUT_IOMUX_XBAR_INOUT12 12
#define XBARA1_OUT_IOMUX_XBAR_INOUT13 13
#define XBARA1_OUT_IOMUX_XBAR_INOUT14 14
#define XBARA1_OUT_IOMUX_XBAR_INOUT15 15
#define XBARA1_OUT_IOMUX_XBAR_INOUT16 16
#define XBARA1_OUT_IOMUX_XBAR_INOUT17 17
#define XBARA1_OUT_IOMUX_XBAR_INOUT18 18
#define XBARA1_OUT_IOMUX_XBAR_INOUT19 19
#define XBARA1_OUT_ACMP1_SAMPLE 20
#define XBARA1_OUT_ACMP2_SAMPLE 21
#define XBARA1_OUT_ACMP3_SAMPLE 22
#define XBARA1_OUT_ACMP4_SAMPLE 23
//#define XBARA1_OUT_Reserved 24
//#define XBARA1_OUT_Reserved 25
#define XBARA1_OUT_FLEXPWM1_PWM0_EXTA 26
#define XBARA1_OUT_FLEXPWM1_PWM1_EXTA 27
#define XBARA1_OUT_FLEXPWM1_PWM2_EXTA 28
#define XBARA1_OUT_FLEXPWM1_PWM3_EXTA 29
#define XBARA1_OUT_FLEXPWM1_PWM0_EXT_SYNC 30
#define XBARA1_OUT_FLEXPWM1_PWM1_EXT_SYNC 31
#define XBARA1_OUT_FLEXPWM1_PWM2_EXT_SYNC 32
#define XBARA1_OUT_FLEXPWM1_PWM3_EXT_SYNC 33
#define XBARA1_OUT_FLEXPWM1_EXT_CLK 34
#define XBARA1_OUT_FLEXPWM1_FAULT0 35
#define XBARA1_OUT_FLEXPWM1_FAULT1 36
#define XBARA1_OUT_FLEXPWM1_FAULT2 37
#define XBARA1_OUT_FLEXPWM2_FAULT2 37
#define XBARA1_OUT_FLEXPWM3_FAULT2 37
#define XBARA1_OUT_FLEXPWM4_FAULT2 37
#define XBARA1_OUT_FLEXPWM1_FAULT3 38
#define XBARA1_OUT_FLEXPWM2_FAULT3 38
#define XBARA1_OUT_FLEXPWM3_FAULT3 38
#define XBARA1_OUT_FLEXPWM4_FAULT3 38
#define XBARA1_OUT_FLEXPWM1_EXT_FORCE 39
#define XBARA1_OUT_FLEXPWM2_PWM0_EXTA 40
#define XBARA1_OUT_FLEXPWM3_PWM0_EXTA 40
#define XBARA1_OUT_FLEXPWM4_PWM0_EXTA 40
#define XBARA1_OUT_FLEXPWM2_PWM1_EXTA 41
#define XBARA1_OUT_FLEXPWM3_PWM1_EXTA 41
#define XBARA1_OUT_FLEXPWM4_PWM1_EXTA 41
#define XBARA1_OUT_FLEXPWM2_PWM2_EXTA 42
#define XBARA1_OUT_FLEXPWM3_PWM2_EXTA 42
#define XBARA1_OUT_FLEXPWM4_PWM2_EXTA 42
#define XBARA1_OUT_FLEXPWM2_PWM3_EXTA 43
#define XBARA1_OUT_FLEXPWM3_PWM3_EXTA 43
#define XBARA1_OUT_FLEXPWM4_PWM3_EXTA 43
#define XBARA1_OUT_FLEXPWM2_PWM0_EXT_SYNC 44
#define XBARA1_OUT_FLEXPWM2_PWM1_EXT_SYNC 45
#define XBARA1_OUT_FLEXPWM2_PWM2_EXT_SYNC 46
#define XBARA1_OUT_FLEXPWM2_PWM3_EXT_SYNC 47
#define XBARA1_OUT_FLEXPWM2_EXT_CLK 48
#define XBARA1_OUT_FLEXPWM3_EXT_CLK 48
#define XBARA1_OUT_FLEXPWM4_EXT_CLK 48
#define XBARA1_OUT_FLEXPWM2_FAULT0 49
#define XBARA1_OUT_FLEXPWM2_FAULT1 50
#define XBARA1_OUT_FLEXPWM2_EXT_FORCE 51
#define XBARA1_OUT_FLEXPWM3_EXT_SYNC0 52
#define XBARA1_OUT_FLEXPWM3_EXT_SYNC1 53
#define XBARA1_OUT_FLEXPWM3_EXT_SYNC2 54
#define XBARA1_OUT_FLEXPWM3_EXT_SYNC3 55
#define XBARA1_OUT_FLEXPWM3_FAULT0 56
#define XBARA1_OUT_FLEXPWM3_FAULT1 57
#define XBARA1_OUT_FLEXPWM3_EXT_FORCE 58
#define XBARA1_OUT_FLEXPWM4_EXT_SYNC0 59
#define XBARA1_OUT_FLEXPWM4_EXT_SYNC1 60
#define XBARA1_OUT_FLEXPWM4_EXT_SYNC2 61
#define XBARA1_OUT_FLEXPWM4_EXT_SYNC3 62
#define XBARA1_OUT_FLEXPWM4_FAULT0 63
#define XBARA1_OUT_FLEXPWM4_FAULT1 64
#define XBARA1_OUT_FLEXPWM4_EXT_FORCE 65
#define XBARA1_OUT_ENC1_PHASEA_INPUT 66
#define XBARA1_OUT_ENC1_PHASEB_INPUT 67
#define XBARA1_OUT_ENC1_INDEX 68
#define XBARA1_OUT_ENC1_HOME 69
#define XBARA1_OUT_ENC1_TRIGGER 70
#define XBARA1_OUT_ENC2_PHASEA_INPUT 71
#define XBARA1_OUT_ENC2_PHASEB_INPUT 72
#define XBARA1_OUT_ENC2_INDEX 73
#define XBARA1_OUT_ENC2_HOME 74
#define XBARA1_OUT_ENC2_TRIGGER 75
#define XBARA1_OUT_ENC3_PHASEA_INPUT 76
#define XBARA1_OUT_ENC3_PHASEB_INPUT 77
#define XBARA1_OUT_ENC3_INDEX 78
#define XBARA1_OUT_ENC3_HOME 79
#define XBARA1_OUT_ENC3_TRIGGER 80
#define XBARA1_OUT_ENC4_PHASEA_INPUT 81
#define XBARA1_OUT_ENC4_PHASEB_INPUT 82
#define XBARA1_OUT_ENC4_INDEX 83
#define XBARA1_OUT_ENC4_HOME 84
#define XBARA1_OUT_ENC4_TRIGGER 85
#define XBARA1_OUT_QTIMER1_TIMER0 86
#define XBARA1_OUT_QTIMER1_TIMER1 87
#define XBARA1_OUT_QTIMER1_TIMER2 88
#define XBARA1_OUT_QTIMER1_TIMER3 89
#define XBARA1_OUT_QTIMER2_TIMER0 90
#define XBARA1_OUT_QTIMER2_TIMER1 91
#define XBARA1_OUT_QTIMER2_TIMER2 92
#define XBARA1_OUT_QTIMER2_TIMER3 93
#define XBARA1_OUT_QTIMER3_TIMER0 94
#define XBARA1_OUT_QTIMER3_TIMER1 95
#define XBARA1_OUT_QTIMER3_TIMER2 96
#define XBARA1_OUT_QTIMER3_TIMER3 97
#define XBARA1_OUT_QTIMER4_TIMER0 98
#define XBARA1_OUT_QTIMER4_TIMER1 99
#define XBARA1_OUT_QTIMER4_TIMER2 100
#define XBARA1_OUT_QTIMER4_TIMER3 101
#define XBARA1_OUT_EWM_EWM_IN 102
#define XBARA1_OUT_ADC_ETC_TRIG00 103
#define XBARA1_OUT_ADC_ETC_TRIG01 104
#define XBARA1_OUT_ADC_ETC_TRIG02 105
#define XBARA1_OUT_ADC_ETC_TRIG03 106
#define XBARA1_OUT_ADC_ETC_TRIG10 107
#define XBARA1_OUT_ADC_ETC_TRIG11 108
#define XBARA1_OUT_ADC_ETC_TRIG12 109
#define XBARA1_OUT_ADC_ETC_TRIG13 110
#define XBARA1_OUT_LPI2C1_TRG_INPUT 111
#define XBARA1_OUT_LPI2C2_TRG_INPUT 112
#define XBARA1_OUT_LPI2C3_TRG_INPUT 113
#define XBARA1_OUT_LPI2C4_TRG_INPUT 114
#define XBARA1_OUT_LPSPI1_TRG_INPUT 115
#define XBARA1_OUT_LPSPI2_TRG_INPUT 116
#define XBARA1_OUT_LPSPI3_TRG_INPUT 117
#define XBARA1_OUT_LPSPI4_TRG_INPUT 118
#define XBARA1_OUT_LPUART1_TRG_INPUT 119
#define XBARA1_OUT_LPUART2_TRG_INPUT 120
#define XBARA1_OUT_LPUART3_TRG_INPUT 121
#define XBARA1_OUT_LPUART4_TRG_INPUT 122
#define XBARA1_OUT_LPUART5_TRG_INPUT 123
#define XBARA1_OUT_LPUART6_TRG_INPUT 124
#define XBARA1_OUT_LPUART7_TRG_INPUT 125
#define XBARA1_OUT_LPUART8_TRG_INPUT 126
#define XBARA1_OUT_FLEXIO1_TRIGGER_IN0 127
#define XBARA1_OUT_FLEXIO1_TRIGGER_IN1 128
#define XBARA1_OUT_FLEXIO2_TRIGGER_IN0 129
#define XBARA1_OUT_FLEXIO2_TRIGGER_IN1 130
//#define XBARA1_OUT_Reserved 131

// XBAR2 Inputs and Outputs Table 3-5 P63
#define XBARB2_IN_LOGIC_LOW 0
#define XBARB2_IN_LOGIC_HIGH 1
//#define XBARB2_IN_Reserved 2
//#define XBARB2_IN_Reserved 3
//#define XBARB2_IN_Reserved 4
//#define XBARB2_IN_Reserved 5
#define XBARB2_IN_ACMP1_OUT 6
#define XBARB2_IN_ACMP2_OUT 7
#define XBARB2_IN_ACMP3_OUT 8
#define XBARB2_IN_ACMP4_OUT 9
//#define XBARB2_IN_Reserved 10
//#define XBARB2_IN_Reserved 11
#define XBARB2_IN_QTIMER3_TIMER0 12
#define XBARB2_IN_QTIMER3_TIMER1 13
#define XBARB2_IN_QTIMER3_TIMER2 14
#define XBARB2_IN_QTIMER3_TIMER3 15
#define XBARB2_IN_QTIMER4_TIMER0 16
#define XBARB2_IN_QTIMER4_TIMER1 17
#define XBARB2_IN_QTIMER4_TIMER2 18
#define XBARB2_IN_QTIMER4_TIMER3 19
#define XBARB2_IN_FLEXPWM1_PWM1_OUT_TRIG0 20
#define XBARB2_IN_FLEXPWM1_PWM1_OUT_TRIG1 20
#define XBARB2_IN_FLEXPWM1_PWM2_OUT_TRIG0 21
#define XBARB2_IN_FLEXPWM1_PWM2_OUT_TRIG1 21
#define XBARB2_IN_FLEXPWM1_PWM3_OUT_TRIG0 22
#define XBARB2_IN_FLEXPWM1_PWM3_OUT_TRIG1 22
#define XBARB2_IN_FLEXPWM1_PWM4_OUT_TRIG0 23
#define XBARB2_IN_FLEXPWM1_PWM4_OUT_TRIG1 23
#define XBARB2_IN_FLEXPWM2_PWM1_OUT_TRIG0 24
#define XBARB2_IN_FLEXPWM2_PWM1_OUT_TRIG1 24
#define XBARB2_IN_FLEXPWM2_PWM2_OUT_TRIG0 25
#define XBARB2_IN_FLEXPWM2_PWM2_OUT_TRIG1 25
#define XBARB2_IN_FLEXPWM2_PWM3_OUT_TRIG0 26
#define XBARB2_IN_FLEXPWM2_PWM3_OUT_TRIG1 26
#define XBARB2_IN_FLEXPWM2_PWM4_OUT_TRIG0 27
#define XBARB2_IN_FLEXPWM2_PWM4_OUT_TRIG1 27
#define XBARB2_IN_FLEXPWM3_PWM1_OUT_TRIG0 28
#define XBARB2_IN_FLEXPWM3_PWM1_OUT_TRIG1 28
#define XBARB2_IN_FLEXPWM3_PWM2_OUT_TRIG0 29
#define XBARB2_IN_FLEXPWM3_PWM2_OUT_TRIG1 29
#define XBARB2_IN_FLEXPWM3_PWM3_OUT_TRIG0 30
#define XBARB2_IN_FLEXPWM3_PWM3_OUT_TRIG1 30
#define XBARB2_IN_FLEXPWM3_PWM4_OUT_TRIG0 31
#define XBARB2_IN_FLEXPWM3_PWM4_OUT_TRIG1 31
#define XBARB2_IN_FLEXPWM4_PWM1_OUT_TRIG0 32
#define XBARB2_IN_FLEXPWM4_PWM1_OUT_TRIG1 32
#define XBARB2_IN_FLEXPWM4_PWM2_OUT_TRIG0 33
#define XBARB2_IN_FLEXPWM4_PWM2_OUT_TRIG1 33
#define XBARB2_IN_FLEXPWM4_PWM3_OUT_TRIG0 34
#define XBARB2_IN_FLEXPWM4_PWM3_OUT_TRIG1 34
#define XBARB2_IN_FLEXPWM4_PWM4_OUT_TRIG0 35
#define XBARB2_IN_FLEXPWM4_PWM4_OUT_TRIG1 35
#define XBARB2_IN_PIT_TRIGGER0 36
#define XBARB2_IN_PIT_TRIGGER1 37
#define XBARB2_IN_ADC_ETC0_COCO0 38
#define XBARB2_IN_ADC_ETC0_COCO1 39
#define XBARB2_IN_ADC_ETC0_COCO2 40
#define XBARB2_IN_ADC_ETC0_COCO3 41
#define XBARB2_IN_ADC_ETC1_COCO0 42
#define XBARB2_IN_ADC_ETC1_COCO1 43
#define XBARB2_IN_ADC_ETC1_COCO2 44
#define XBARB2_IN_ADC_ETC1_COCO3 45
#define XBARB2_IN_ENC1_POS_MATCH 46
#define XBARB2_IN_ENC2_POS_MATCH 47
#define XBARB2_IN_ENC3_POS_MATCH 48
#define XBARB2_IN_ENC4_POS_MATCH 49
#define XBARB2_IN_DMA_DONE0 50
#define XBARB2_IN_DMA_DONE1 51
#define XBARB2_IN_DMA_DONE2 52
#define XBARB2_IN_DMA_DONE3 53
#define XBARB2_IN_DMA_DONE4 54
#define XBARB2_IN_DMA_DONE5 55
#define XBARB2_IN_DMA_DONE6 56
#define XBARB2_IN_DMA_DONE7 57

#define XBARB2_OUT_AOI1_IN00 0
#define XBARB2_OUT_AOI1_IN01 1
#define XBARB2_OUT_AOI1_IN02 2
#define XBARB2_OUT_AOI1_IN03 3
#define XBARB2_OUT_AOI1_IN04 4
#define XBARB2_OUT_AOI1_IN05 5
#define XBARB2_OUT_AOI1_IN06 6
#define XBARB2_OUT_AOI1_IN07 7
#define XBARB2_OUT_AOI1_IN08 8
#define XBARB2_OUT_AOI1_IN09 9
#define XBARB2_OUT_AOI1_IN10 10
#define XBARB2_OUT_AOI1_IN11 11
#define XBARB2_OUT_AOI1_IN12 12
#define XBARB2_OUT_AOI1_IN13 13
#define XBARB2_OUT_AOI1_IN14 14

// XBAR3 Inputs and Outputs Table 3-6 Page 63
#define XBARB3_IN_LOGIC_LOW 0
#define XBARB3_IN_LOGIC_HIGH 1
//#define XBARB3_IN_Reserved 2
//#define XBARB3_IN_Reserved 3
//#define XBARB3_IN_Reserved 4
//#define XBARB3_IN_Reserved 5
#define XBARB3_IN_ACMP1_OUT 6
#define XBARB3_IN_ACMP2_OUT 7
#define XBARB3_IN_ACMP3_OUT 8
#define XBARB3_IN_ACMP4_OUT 9
//#define XBARB3_IN_Reserved 10
//#define XBARB3_IN_Reserved 11
#define XBARB3_IN_QTIMER3_TIMER0 12
#define XBARB3_IN_QTIMER3_TIMER1 13
#define XBARB3_IN_QTIMER3_TIMER2 14
#define XBARB3_IN_QTIMER3_TIMER3 15
#define XBARB3_IN_QTIMER4_TIMER0 16
#define XBARB3_IN_QTIMER4_TIMER1 17
#define XBARB3_IN_QTIMER4_TIMER2 18
#define XBARB3_IN_QTIMER4_TIMER3 19
#define XBARB3_IN_FLEXPWM1_PWM1_OUT_TRIG0 20
#define XBARB3_IN_FLEXPWM1_PWM2_OUT_TRIG0 21
#define XBARB3_IN_FLEXPWM1_PWM3_OUT_TRIG0 22
#define XBARB3_IN_FLEXPWM1_PWM4_OUT_TRIG0 23
#define XBARB3_IN_FLEXPWM2_PWM1_OUT_TRIG0 24
#define XBARB3_IN_FLEXPWM2_PWM2_OUT_TRIG0 25
#define XBARB3_IN_FLEXPWM2_PWM3_OUT_TRIG0 26
#define XBARB3_IN_FLEXPWM2_PWM4_OUT_TRIG0 27
#define XBARB3_IN_FLEXPWM3_PWM1_OUT_TRIG0 28
#define XBARB3_IN_FLEXPWM3_PWM2_OUT_TRIG0 29
#define XBARB3_IN_FLEXPWM3_PWM3_OUT_TRIG0 30
#define XBARB3_IN_FLEXPWM3_PWM4_OUT_TRIG0 31
#define XBARB3_IN_FLEXPWM4_PWM1_OUT_TRIG0 32
#define XBARB3_IN_FLEXPWM4_PWM2_OUT_TRIG0 33
#define XBARB3_IN_FLEXPWM4_PWM3_OUT_TRIG0 34
#define XBARB3_IN_FLEXPWM4_PWM4_OUT_TRIG0 35
#define XBARB3_IN_PIT_TRIGGER0 36
#define XBARB3_IN_PIT_TRIGGER1 37
#define XBARB3_IN_ADC_ETC0_COCO0 38
#define XBARB3_IN_ADC_ETC0_COCO1 39
#define XBARB3_IN_ADC_ETC0_COCO2 40
#define XBARB3_IN_ADC_ETC0_COCO3 41
#define XBARB3_IN_ADC_ETC1_COCO0 42
#define XBARB3_IN_ADC_ETC1_COCO1 43
#define XBARB3_IN_ADC_ETC1_COCO2 44
#define XBARB3_IN_ADC_ETC1_COCO3 45
#define XBARB3_IN_ENC1_POS_MATCH 46
#define XBARB3_IN_ENC2_POS_MATCH 47
#define XBARB3_IN_ENC3_POS_MATCH 48
#define XBARB3_IN_ENC4_POS_MATCH 49
#define XBARB3_IN_DMA_DONE0 50
#define XBARB3_IN_DMA_DONE1 51
#define XBARB3_IN_DMA_DONE2 52
#define XBARB3_IN_DMA_DONE3 53
#define XBARB3_IN_DMA_DONE4 54
#define XBARB3_IN_DMA_DONE5 55
#define XBARB3_IN_DMA_DONE6 56
#define XBARB3_IN_DMA_DONE7 57

#define XBARB3_OUT_AOI2_IN00 0
#define XBARB3_OUT_AOI2_IN01 1
#define XBARB3_OUT_AOI2_IN02 2
#define XBARB3_OUT_AOI2_IN03 3
#define XBARB3_OUT_AOI2_IN04 4
#define XBARB3_OUT_AOI2_IN05 5
#define XBARB3_OUT_AOI2_IN06 6
#define XBARB3_OUT_AOI2_IN07 7
#define XBARB3_OUT_AOI2_IN08 8
#define XBARB3_OUT_AOI2_IN09 9
#define XBARB3_OUT_AOI2_IN10 10
#define XBARB3_OUT_AOI2_IN11 11
#define XBARB3_OUT_AOI2_IN12 12
#define XBARB3_OUT_AOI2_IN13 13
#define XBARB3_OUT_AOI2_IN14 14
#define XBARB3_OUT_AOI2_IN15 15
// 62.5: page 3548
#define IMXRT_XTALOSC24M (*(IMXRT_REGISTER32_t *)0x400D8000)
#define XTALOSC24M_MISC0 (IMXRT_XTALOSC24M.offset150)

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