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#define HW_OCOTP_CFG5 (IMXRT_OCOTP_VALUE.offset060) |
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#define HW_OCOTP_CFG5 (IMXRT_OCOTP_VALUE.offset060) |
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#define HW_OCOTP_CFG6 (IMXRT_OCOTP_VALUE.offset070) |
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#define HW_OCOTP_CFG6 (IMXRT_OCOTP_VALUE.offset070) |
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#define HW_OCOTP_MEM0 (IMXRT_OCOTP_VALUE.offset080) |
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#define HW_OCOTP_MEM0 (IMXRT_OCOTP_VALUE.offset080) |
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#define HW_OCOTP MEM1 (IMXRT_OCOTP_VALUE.offset090) |
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#define HW_OCOTP_MEM1 (IMXRT_OCOTP_VALUE.offset090) |
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#define HW_OCOTP_MEM2 (IMXRT_OCOTP_VALUE.offset0A0) |
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#define HW_OCOTP_MEM2 (IMXRT_OCOTP_VALUE.offset0A0) |
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#define HW_OCOTP_MEM3 (IMXRT_OCOTP_VALUE.offset0B0) |
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#define HW_OCOTP_MEM3 (IMXRT_OCOTP_VALUE.offset0B0) |
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#define HW_OCOTP_MEM4 (IMXRT_OCOTP_VALUE.offset0C0) |
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#define HW_OCOTP_MEM4 (IMXRT_OCOTP_VALUE.offset0C0) |