Add delay_us for safety - since eeprom_init can drop int's move hsrun_off as init is hsrun safe

Has to add core_pins.h to get delayMicroseconds()
made empty while()'s on HSRUN state change have a measurable 2us wait
each iteration
added explicit 100us delay leaving HSRUN to allow internal V to
satbilize, seems CPU does this already as 10-50 us made no change, and
100 is not measurable on larger writes.
since eeprom_initialize() blindly restores interrupts amd can run under
HSRUN, moved hsrun_off()

teensy3/eeprom.c

 #include "kinetis.h"
 #include <avr/eeprom.h>
 //#include "HardwareSerial.h"
+#if F_CPU > 120000000 && defined(__MK66FX1M0__)
+#include "core_pins.h"	// delayMicroseconds()
+#endif
 
 
 #if defined(__MK20DX128__) || defined(__MK20DX256__)
 
 #if F_CPU > 120000000 && defined(__MK66FX1M0__)
 static volatile uint16_t c_intrestore = 0;
+
 void c_enable_irq( void );
 void c_disable_irq( void );
 static __inline__ uint32_t __get_primask(void) \
 	if (SMC_PMSTAT == SMC_PMSTAT_HSRUN) {
 		c_disable_irq( ); // Turn off interrupts for the DURATION !!!!
 		SMC_PMCTRL = SMC_PMCTRL_RUNM(0); // exit HSRUN mode
-		while (SMC_PMSTAT == SMC_PMSTAT_HSRUN) ; // wait for !HSRUN
+		while (SMC_PMSTAT == SMC_PMSTAT_HSRUN) delayMicroseconds(2); // wait for !HSRUN
+		delayMicroseconds(100);
 		restore_hsrun = 1;
 	}
 }
 {
 	if (restore_hsrun) {
 	    SMC_PMCTRL = SMC_PMCTRL_RUNM(3); // enter HSRUN mode
-	    while (SMC_PMSTAT != SMC_PMSTAT_HSRUN); // wait for HSRUN
+	    while (SMC_PMSTAT != SMC_PMSTAT_HSRUN) delayMicroseconds(2);; // wait for HSRUN
 		restore_hsrun = 0;
 	    c_enable_irq( ); // Restore interrupts only when HSRUN restored	}
 	}
 	uint32_t offset = (uint32_t)addr;
 
 	if (offset >= EEPROM_SIZE) return;
-	hsrun_off();
 	if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	hsrun_off();
 	if (FlexRAM[offset] != value) {
 		uint8_t stat = FTFL_FSTAT & 0x70;
 		if (stat) FTFL_FSTAT = stat;
 	uint32_t offset = (uint32_t)addr;
 
 	if (offset >= EEPROM_SIZE-1) return;
-	hsrun_off();
 	if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	hsrun_off();
 #ifdef HANDLE_UNALIGNED_WRITES
 	if ((offset & 1) == 0) {
 #endif
 	uint32_t offset = (uint32_t)addr;
 
 	if (offset >= EEPROM_SIZE-3) return;
-	hsrun_off();
 	if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	hsrun_off();
 #ifdef HANDLE_UNALIGNED_WRITES
 	switch (offset & 3) {
 	case 0:
 	const uint8_t *src = (const uint8_t *)buf;
 
 	if (offset >= EEPROM_SIZE) return;
-	hsrun_off();
 	if (!(FTFL_FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	hsrun_off();
 	if (len >= EEPROM_SIZE) len = EEPROM_SIZE;
 	if (offset + len >= EEPROM_SIZE) len = EEPROM_SIZE - offset;
 	while (len > 0) {