Update to 168MHz, 42 MHZ Bus, 28MHz Flash

boards.txt

 teensy31.build.option6=-O2
 teensy31.build.option7=-finline-functions
 teensy31.build.option8=-funswitch-loops
-#teensy31.build.option9=-mlong-calls
+teensy31.build.option9=-mlong-calls
 #teensy31.build.option10=-ffast-math
 #teensy31.build.option11=-mslow-flash-data
 
 teensy31.menu.usb.flightsim.name=Flight Sim Controls
 teensy31.menu.usb.flightsim.build.define0=-DUSB_FLIGHTSIM
 teensy31.menu.usb.flightsim.fake_serial=teensy_gateway
+teensy31.menu.speed.168.name=168 MHz (overclock WARP1)
+teensy31.menu.speed.144.name=144 MHz (overclock LIGHTSPEED)
 teensy31.menu.speed.120.name=120 MHz (overclock TURBO)
 teensy31.menu.speed.96.name=96 MHz (overclock)
 teensy31.menu.speed.48.name=48 MHz
 teensy31.menu.speed.24.name=24 MHz
+teensy31.menu.speed.168.build.f_cpu=168000000
+teensy31.menu.speed.144.build.f_cpu=144000000
 teensy31.menu.speed.120.build.f_cpu=120000000
 teensy31.menu.speed.96.build.f_cpu=96000000
 teensy31.menu.speed.48.build.f_cpu=48000000

teensy3/analog.c

 // datasheet says ADC clock should be 2 to 12 MHz for 16 bit mode
 // datasheet says ADC clock should be 1 to 18 MHz for 8-12 bit mode
 
-#if F_BUS == 48000000 | F_BUS == 40000000
+#if F_BUS == 48000000 | F_BUS == 42000000 | F_BUS == 40000000 
   #define ADC_CFG1_6MHZ   ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)
   #define ADC_CFG1_12MHZ  ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)
   #define ADC_CFG1_24MHZ  ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)

teensy3/core_pins.h

 static inline void delayMicroseconds(uint32_t) __attribute__((always_inline, unused));
 static inline void delayMicroseconds(uint32_t usec)
 {
-#if F_CPU == 120000000
+#if F_CPU == 168000000
+	uint32_t n = usec << 7; 
+#elif F_CPU == 144000000
+	uint32_t n = usec << 6; 
+#elif F_CPU == 120000000
 	uint32_t n = usec * 40; 
 #elif F_CPU == 96000000
 	uint32_t n = usec << 5;
 	uint32_t n = usec << 4;
 #elif F_CPU == 24000000
 	uint32_t n = usec << 3;
+#else
+ #error F_CPU
 #endif
 	if (usec == 0) return;
 	asm volatile(

teensy3/mk20dx128.c

 	// config PLL input for 16 MHz Crystal / 4 = 4 MHz
 	MCG_C5 = MCG_C5_PRDIV0(3);
 	
-#if F_CPU == 120000000	
+#if F_CPU == 168000000	
+	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(18); // config PLL for 168 MHz output
+#elif F_CPU == 144000000	
+	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(12); // config PLL for 144 MHz output
+#elif F_CPU == 120000000	
 	MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(6); // config PLL for 120 MHz output
 #else
     MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0); // config PLL for 96 MHz output
 	while (!(MCG_S & MCG_S_LOCK0)) ;
 	// now we're in PBE mode
 
-#if F_CPU == 120000000
+#if F_CPU == 168000000
+	// config divisors: 168 MHz core, 42 MHz bus, 28 MHz flash
+	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(3) |	 SIM_CLKDIV1_OUTDIV4(5);
+#elif F_CPU == 144000000
+	// config divisors: 144 MHz core, 48 MHz bus, 24 MHz flash
+	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) |	 SIM_CLKDIV1_OUTDIV4(5); 
+#elif F_CPU == 120000000
 	// config divisors: 120 MHz core, 40 MHz bus, 30 MHz flash
-	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(3) |	 SIM_CLKDIV1_OUTDIV4(4);
+	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) |	 SIM_CLKDIV1_OUTDIV4(3);
 #elif F_CPU == 96000000
 	// config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash
 	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |	 SIM_CLKDIV1_OUTDIV4(3);
 	// config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash
 	SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) |	 SIM_CLKDIV1_OUTDIV4(3);
 #else
-#error "Error, F_CPU must be 120000000, 96000000, 48000000, or 24000000"
+#error "Error, F_CPU must be  168000000, 144000000, 120000000, 96000000, 48000000, or 24000000"
 #endif
 	// switch to PLL as clock source, FLL input = 16 MHz / 512
 	MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
 	while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
 	// now we're in PEE mode
 	// configure USB for 48 MHz clock
-#if F_CPU == 120000000
+#if F_CPU == 168000000
+	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(6) | SIM_CLKDIV2_USBFRAC; // USB = 168 MHz PLL / 3.5
+#elif F_CPU == 144000000
+	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2); // USB = 144 MHz PLL / 3
+#elif F_CPU == 120000000
 	SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC; // USB = 120 MHz PLL / 2.5
 #else
     SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); // USB = 96 MHz PLL / 2

teensy3/mk20dx128.h

 //#define F_BUS 48000000
 //#define F_BUS 24000000
 //#define F_MEM 24000000
-
-#if (F_CPU == 120000000)
+#if (F_CPU == 168000000)
+ #define F_BUS 42000000
+ #define F_MEM 28000000
+#elif (F_CPU == 144000000)
+ #define F_BUS 48000000
+ #define F_MEM 24000000
+#elif (F_CPU == 120000000)
  #define F_BUS 40000000
- #define F_MEM 20000000
+ #define F_MEM 30000000
 #elif (F_CPU == 96000000)
  #define F_BUS 48000000
  #define F_MEM 24000000

teensy3/pins_teensy.c

 		}
 	}
 }
-#if F_CPU == 120000000
+#if F_CPU == 216000000
+#define PULSEIN_LOOPS_PER_USEC 31  //Is this correct ?
+#elif F_CPU == 192000000
+#define PULSEIN_LOOPS_PER_USEC 28  //Is this correct ?
+#elif F_CPU == 168000000
+#define PULSEIN_LOOPS_PER_USEC 24  //Is this correct ?
+#elif F_CPU == 144000000
+#define PULSEIN_LOOPS_PER_USEC 21  //Is this correct ?
+#elif F_CPU == 120000000
 #define PULSEIN_LOOPS_PER_USEC 19  //Is this correct ?
 #elif F_CPU == 96000000
 #define PULSEIN_LOOPS_PER_USEC 14

teensy3/usb_seremu.c

 // software.  If it's too long, we stall the user's program when no software is running.
 #define TX_TIMEOUT_MSEC 30
 //Why is this timout dependend on F_CPU ?
-#if F_CPU == 120000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 763) 
+#if F_CPU == 168000000
+  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 1100) 
+#elif F_CPU == 144000000
+  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 932) 
+#elif F_CPU == 120000000
+  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 764) 
 #elif F_CPU == 96000000
   #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 596)
 #elif F_CPU == 48000000
   #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 428)
 #elif F_CPU == 24000000
   #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 262)
+#else 
+ #error #F_CPU  
 #endif
 
 // When we've suffered the transmit timeout, don't wait again until the computer

teensy3/usb_serial.c

 #define TX_TIMEOUT_MSEC 70
 
 //Why is this timout dependend on F_CPU ?
-#if F_CPU == 120000000
-  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 763) 
+#if F_CPU == 168000000
+  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 1100) 
+#elif F_CPU == 144000000
+  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 932) 
+#elif F_CPU == 120000000
+  #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 764) 
 #elif F_CPU == 96000000
   #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 596)
 #elif F_CPU == 48000000
   #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 428)
 #elif F_CPU == 24000000
   #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 262)
+#else 
+ #error #F_CPU
 #endif
 
 // When we've suffered the transmit timeout, don't wait again until the computer