fix for flash & bus clocks at F_CPU <= 16MHz

teensy3/mk20dx128.c

@@ -679,6 +679,7 @@ void ResetHandler(void)
 #if defined(KINETISK)
     SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) |	 SIM_CLKDIV1_OUTDIV4(1);
 #elif defined(KINETISL)
+    // config divisors: 2 MHz core, 1 MHz bus, 1 MHz flash
     SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV4(1);
 #endif
 #else