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#define CMP0_CR1 (*(volatile uint8_t *)0x40073001) // CMP Control Register |
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#define CMP0_CR1 (*(volatile uint8_t *)0x40073001) // CMP Control Register |
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#define CMP_CR1_SE (uint8_t)0x80 // Sample Enable |
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#define CMP_CR1_SE (uint8_t)0x80 // Sample Enable |
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#define CMP_CR1_WE (uint8_t)0x40 // Windowing Enable |
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#define CMP_CR1_WE (uint8_t)0x40 // Windowing Enable |
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#define CMP_CR1_TRIGM (uint8_t)0x20 // Trigger Mode Enable |
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#define CMP_CR1_PMODE (uint8_t)0x10 // Power Mode Select |
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#define CMP_CR1_PMODE (uint8_t)0x10 // Power Mode Select |
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#define CMP_CR1_INV (uint8_t)0x08 // Comparator INVERT |
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#define CMP_CR1_INV (uint8_t)0x08 // Comparator INVERT |
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#define CMP_CR1_COS (uint8_t)0x04 // Comparator Output Select |
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#define CMP_CR1_COS (uint8_t)0x04 // Comparator Output Select |