| #endif | #endif | ||||
| } | } | ||||
| #if defined(HAS_KINETISK_UART0) | #if defined(HAS_KINETISK_UART0) | ||||
| if (divisor < 32) divisor = 32; | |||||
| UART0_BDH = (divisor >> 13) & 0x1F; | UART0_BDH = (divisor >> 13) & 0x1F; | ||||
| UART0_BDL = (divisor >> 5) & 0xFF; | UART0_BDL = (divisor >> 5) & 0xFF; | ||||
| UART0_C4 = divisor & 0x1F; | UART0_C4 = divisor & 0x1F; | ||||
| UART0_PFIFO = 0; | UART0_PFIFO = 0; | ||||
| #endif | #endif | ||||
| #elif defined(HAS_KINETISL_UART0) | #elif defined(HAS_KINETISL_UART0) | ||||
| if (divisor < 1) divisor = 1; | |||||
| UART0_BDH = (divisor >> 8) & 0x1F; | UART0_BDH = (divisor >> 8) & 0x1F; | ||||
| UART0_BDL = divisor & 0xFF; | UART0_BDL = divisor & 0xFF; | ||||
| UART0_C1 = 0; | UART0_C1 = 0; |
| CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | ||||
| #endif | #endif | ||||
| #if defined(HAS_KINETISK_UART1) | #if defined(HAS_KINETISK_UART1) | ||||
| if (divisor < 32) divisor = 32; | |||||
| UART1_BDH = (divisor >> 13) & 0x1F; | UART1_BDH = (divisor >> 13) & 0x1F; | ||||
| UART1_BDL = (divisor >> 5) & 0xFF; | UART1_BDL = (divisor >> 5) & 0xFF; | ||||
| UART1_C4 = divisor & 0x1F; | UART1_C4 = divisor & 0x1F; | ||||
| UART1_PFIFO = 0; | UART1_PFIFO = 0; | ||||
| #endif | #endif | ||||
| #elif defined(HAS_KINETISL_UART1) | #elif defined(HAS_KINETISL_UART1) | ||||
| if (divisor < 1) divisor = 1; | |||||
| UART1_BDH = (divisor >> 8) & 0x1F; | UART1_BDH = (divisor >> 8) & 0x1F; | ||||
| UART1_BDL = divisor & 0xFF; | UART1_BDL = divisor & 0xFF; | ||||
| UART1_C1 = 0; | UART1_C1 = 0; |
| } | } | ||||
| #endif | #endif | ||||
| #if defined(HAS_KINETISK_UART2) | #if defined(HAS_KINETISK_UART2) | ||||
| if (divisor < 32) divisor = 32; | |||||
| UART2_BDH = (divisor >> 13) & 0x1F; | UART2_BDH = (divisor >> 13) & 0x1F; | ||||
| UART2_BDL = (divisor >> 5) & 0xFF; | UART2_BDL = (divisor >> 5) & 0xFF; | ||||
| UART2_C4 = divisor & 0x1F; | UART2_C4 = divisor & 0x1F; | ||||
| UART2_C1 = 0; | UART2_C1 = 0; | ||||
| UART2_PFIFO = 0; | UART2_PFIFO = 0; | ||||
| #elif defined(HAS_KINETISL_UART2) | #elif defined(HAS_KINETISL_UART2) | ||||
| if (divisor < 1) divisor = 1; | |||||
| UART2_BDH = (divisor >> 8) & 0x1F; | UART2_BDH = (divisor >> 8) & 0x1F; | ||||
| UART2_BDL = divisor & 0xFF; | UART2_BDL = divisor & 0xFF; | ||||
| UART2_C1 = 0; | UART2_C1 = 0; |
| case 32: CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | case 32: CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | ||||
| case 62: CORE_PIN62_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | case 62: CORE_PIN62_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | ||||
| } | } | ||||
| if (divisor < 32) divisor = 32; | |||||
| UART3_BDH = (divisor >> 13) & 0x1F; | UART3_BDH = (divisor >> 13) & 0x1F; | ||||
| UART3_BDL = (divisor >> 5) & 0xFF; | UART3_BDL = (divisor >> 5) & 0xFF; | ||||
| UART3_C4 = divisor & 0x1F; | UART3_C4 = divisor & 0x1F; |
| transmitting = 0; | transmitting = 0; | ||||
| CORE_PIN34_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | CORE_PIN34_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | ||||
| CORE_PIN33_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | CORE_PIN33_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | ||||
| if (divisor < 32) divisor = 32; | |||||
| UART4_BDH = (divisor >> 13) & 0x1F; | UART4_BDH = (divisor >> 13) & 0x1F; | ||||
| UART4_BDL = (divisor >> 5) & 0xFF; | UART4_BDL = (divisor >> 5) & 0xFF; | ||||
| UART4_C4 = divisor & 0x1F; | UART4_C4 = divisor & 0x1F; |
| transmitting = 0; | transmitting = 0; | ||||
| CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | ||||
| CORE_PIN48_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | CORE_PIN48_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | ||||
| if (divisor < 32) divisor = 32; | |||||
| UART5_BDH = (divisor >> 13) & 0x1F; | UART5_BDH = (divisor >> 13) & 0x1F; | ||||
| UART5_BDL = (divisor >> 5) & 0xFF; | UART5_BDL = (divisor >> 5) & 0xFF; | ||||
| UART5_C4 = divisor & 0x1F; | UART5_C4 = divisor & 0x1F; |