duff2013
10 years ago
1 changed files with 7 additions and 2 deletions
+ 7
- 2
teensy3/mk20dx128.c
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| // C6[PLLS] bit is written to 0 | // C6[PLLS] bit is written to 0 | ||||
| // C2[LP] bit is written to 1 | // C2[LP] bit is written to 1 | ||||
| #else | #else | ||||
| // enable capacitors for crystal | |||||
| OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN; | |||||
| #if defined(KINETISK) | |||||
| // enable capacitors for crystal | |||||
| OSC0_CR = OSC_SC8P | OSC_SC2P; | |||||
| #elif defined(KINETISL) | |||||
| // enable capacitors for crystal | |||||
| OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN; | |||||
| #endif | |||||
| // enable osc, 8-32 MHz range, low power mode | // enable osc, 8-32 MHz range, low power mode | ||||
| MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS; | MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS; | ||||
| // switch to crystal as clock source, FLL input = 16 MHz / 512 | // switch to crystal as clock source, FLL input = 16 MHz / 512 |
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