|  |  | @@ -184,8 +184,18 @@ void serial2_end(void) | 
		
	
		
			
			|  |  |  | while (transmitting) yield();  // wait for buffered data to send | 
		
	
		
			
			|  |  |  | NVIC_DISABLE_IRQ(IRQ_UART1_STATUS); | 
		
	
		
			
			|  |  |  | UART1_C2 = 0; | 
		
	
		
			
			|  |  |  | CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | 
		
	
		
			
			|  |  |  | CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | 
		
	
		
			
			|  |  |  | switch (rx_pin_num) { | 
		
	
		
			
			|  |  |  | case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3 | 
		
	
		
			
			|  |  |  | #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__))  // not on T3.4 or T3.5 | 
		
	
		
			
			|  |  |  | case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE1 | 
		
	
		
			
			|  |  |  | #endif | 
		
	
		
			
			|  |  |  | } | 
		
	
		
			
			|  |  |  | switch (tx_pin_num & 127) { | 
		
	
		
			
			|  |  |  | case 10: CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4 | 
		
	
		
			
			|  |  |  | #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__))  // not on T3.4 or T3.5 | 
		
	
		
			
			|  |  |  | case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE0 | 
		
	
		
			
			|  |  |  | #endif | 
		
	
		
			
			|  |  |  | } | 
		
	
		
			
			|  |  |  | rx_buffer_head = 0; | 
		
	
		
			
			|  |  |  | rx_buffer_tail = 0; | 
		
	
		
			
			|  |  |  | if (rts_pin) rts_deassert(); |