extern unsigned long _estack; | extern unsigned long _estack; | ||||
extern unsigned long _flashimagelen; | extern unsigned long _flashimagelen; | ||||
__attribute__ ((section(".vectors"), used)) | |||||
const uint32_t vector_table[2] = { | |||||
#if defined(__IMXRT1062__) | |||||
0x20010000, // 64K DTCM for boot, ResetHandler configures stack after ITCM/DTCM setup | |||||
#endif | |||||
(uint32_t)&ResetHandler | |||||
}; | |||||
__attribute__ ((section(".bootdata"), used)) | __attribute__ ((section(".bootdata"), used)) | ||||
}; | }; | ||||
__attribute__ ((section(".bootdata"), used)) | |||||
const uint32_t DCDData[1] = { | |||||
0x410400D2 // header | |||||
}; | |||||
__attribute__ ((section(".csf"), used)) | |||||
const uint32_t hab_csf[768]; // placeholder for HAB signature | |||||
__attribute__ ((section(".ivt"), used)) | __attribute__ ((section(".ivt"), used)) | ||||
const uint32_t ImageVectorTable[8] = { | const uint32_t ImageVectorTable[8] = { | ||||
0x402000D1, // header | |||||
(uint32_t)vector_table, // docs are wrong, needs to be vec table, not start addr | |||||
0x432000D1, // header | |||||
(uint32_t)&ResetHandler,// program entry | |||||
0, // reserved | 0, // reserved | ||||
(uint32_t)DCDData, // dcd | |||||
0, // dcd | |||||
(uint32_t)BootData, // abs address of boot data | (uint32_t)BootData, // abs address of boot data | ||||
(uint32_t)ImageVectorTable, // self | (uint32_t)ImageVectorTable, // self | ||||
0, // command sequence file | |||||
(uint32_t)hab_csf, // command sequence file | |||||
0 // reserved | 0 // reserved | ||||
}; | }; | ||||
. = ORIGIN(FLASH) + 0x1000; | . = ORIGIN(FLASH) + 0x1000; | ||||
KEEP(*(.ivt)) | KEEP(*(.ivt)) | ||||
KEEP(*(.bootdata)) | KEEP(*(.bootdata)) | ||||
KEEP(*(.vectors)) | |||||
KEEP(*(.startup)) | KEEP(*(.startup)) | ||||
*(.flashmem*) | *(.flashmem*) | ||||
*(.progmem*) | *(.progmem*) | ||||
.data : { | .data : { | ||||
*(.rodata*) | *(.rodata*) | ||||
*(.data*) | *(.data*) | ||||
. = ALIGN(16); | |||||
} > DTCM AT> FLASH | } > DTCM AT> FLASH | ||||
.bss ALIGN(4) : { | .bss ALIGN(4) : { | ||||
. = ALIGN(32); | . = ALIGN(32); | ||||
} > RAM | } > RAM | ||||
.text.csf : { | |||||
FILL(0xFF) | |||||
. = ALIGN(4); | |||||
KEEP(*(.csf)) | |||||
} > FLASH | |||||
_stext = ADDR(.text.itcm); | _stext = ADDR(.text.itcm); | ||||
_etext = ADDR(.text.itcm) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx); | _etext = ADDR(.text.itcm) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx); | ||||
_stextload = LOADADDR(.text.itcm); | _stextload = LOADADDR(.text.itcm); | ||||
_flexram_bank_config = 0xAAAAAAAA | ((1 << (_itcm_block_count * 2)) - 1); | _flexram_bank_config = 0xAAAAAAAA | ((1 << (_itcm_block_count * 2)) - 1); | ||||
_estack = ORIGIN(DTCM) + ((16 - _itcm_block_count) << 15); | _estack = ORIGIN(DTCM) + ((16 - _itcm_block_count) << 15); | ||||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data); | |||||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data) + SIZEOF(.text.csf); | |||||
_teensy_model_identifier = 0x24; | _teensy_model_identifier = 0x24; | ||||
.debug_info 0 : { *(.debug_info) } | .debug_info 0 : { *(.debug_info) } |
{ | { | ||||
ITCM (rwx): ORIGIN = 0x00000000, LENGTH = 512K | ITCM (rwx): ORIGIN = 0x00000000, LENGTH = 512K | ||||
DTCM (rwx): ORIGIN = 0x20000000, LENGTH = 512K | DTCM (rwx): ORIGIN = 0x20000000, LENGTH = 512K | ||||
RAM (rwx): ORIGIN = 0x20200000, LENGTH = 512K | |||||
RAM (rwx): ORIGIN = 0x20202000, LENGTH = 504K | |||||
FLASH (rwx): ORIGIN = 0x60000000, LENGTH = 7936K | FLASH (rwx): ORIGIN = 0x60000000, LENGTH = 7936K | ||||
ERAM (rwx): ORIGIN = 0x70000000, LENGTH = 16384K | ERAM (rwx): ORIGIN = 0x70000000, LENGTH = 16384K | ||||
} | } | ||||
. = ORIGIN(FLASH) + 0x1000; | . = ORIGIN(FLASH) + 0x1000; | ||||
KEEP(*(.ivt)) | KEEP(*(.ivt)) | ||||
KEEP(*(.bootdata)) | KEEP(*(.bootdata)) | ||||
KEEP(*(.vectors)) | |||||
KEEP(*(.startup)) | KEEP(*(.startup)) | ||||
*(.flashmem*) | *(.flashmem*) | ||||
*(.progmem*) | *(.progmem*) | ||||
.data : { | .data : { | ||||
*(.rodata*) | *(.rodata*) | ||||
*(.data*) | *(.data*) | ||||
. = ALIGN(16); | |||||
} > DTCM AT> FLASH | } > DTCM AT> FLASH | ||||
.bss ALIGN(4) : { | .bss ALIGN(4) : { | ||||
*(.externalram) | *(.externalram) | ||||
} > ERAM | } > ERAM | ||||
.text.csf : { | |||||
FILL(0xFF) | |||||
. = ALIGN(4); | |||||
KEEP(*(.csf)) | |||||
} > FLASH | |||||
_stext = ADDR(.text.itcm); | _stext = ADDR(.text.itcm); | ||||
_etext = ADDR(.text.itcm) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx); | _etext = ADDR(.text.itcm) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx); | ||||
_stextload = LOADADDR(.text.itcm); | _stextload = LOADADDR(.text.itcm); | ||||
_flexram_bank_config = 0xAAAAAAAA | ((1 << (_itcm_block_count * 2)) - 1); | _flexram_bank_config = 0xAAAAAAAA | ((1 << (_itcm_block_count * 2)) - 1); | ||||
_estack = ORIGIN(DTCM) + ((16 - _itcm_block_count) << 15); | _estack = ORIGIN(DTCM) + ((16 - _itcm_block_count) << 15); | ||||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data); | |||||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data) + SIZEOF(.text.csf); | |||||
_teensy_model_identifier = 0x25; | _teensy_model_identifier = 0x25; | ||||
.debug_info 0 : { *(.debug_info) } | .debug_info 0 : { *(.debug_info) } |